Abstract: An electronic component with insulative tape-held solder forms is disclosed. Electronic components may be any of the integrated circuit chips, chip packages and printed circuit boards. The solder forms are coupled to conductive pads of the electronic component through through-holes in the insulative tape. The solder forms may be shaped as balls, cylinders, polygonal boxes, barrels, or hour-glasses. The insulative tape is thermally conductive and heat resistant. The tape may be made of an organic material such as an elastomer. The tape may further have impregnated materials such as ceramic, aluminum nitride, or solder flux to improve its thermal, mechanical, and/or electrical properties.

Abstract: A semiconductor device having metal leads 14 with improved reliability comprising metal leads 14 on a substrate 12, a low-dielectric constant material 18 at least between the metal leads 14, and dummy leads 16 proximate the metal leads 14. Heat from the metal leads 14 is transferable to the dummy leads 16, and the dummy leads 16 are capable of dissipating the heat. The low-dielectric constant material 18 has a dielectric constant of less than 3.5. An advantage of the invention is improved reliability of metal leads for circuits using low-dielectric constant materials.

Abstract: An integrated electro-optical package including a plurality of organic light emitting devices (LEDs) directly interconnected to external driver circuits utilizing a printed circuit board, having formed therein a plurality of plated through-hole vias and a method of fabricating the integrated electro-optical package. The organic LEDs are fabricated on a supporting substrate and include vertical interconnections to driver and control circuits mounted on an uppermost surface of a printed circuit board (PCB). The vertical interconnections are formed utilizing plated through-hole conductive vias formed in the printed circuit board, conductive leads, and conductive epoxy. A hermetic seal is formed by positioning a sealing ring formed on the printed circuit board in sealing contact with a sealing area on the surface of the substrate so as to hermetically seal the organic light emitting devices.

Abstract: An electronic component includes a substrate (11) having a device surface (13) and opposite ends (14, 15) adjacent to the device surface (13), an electronic device (16) supported by the device surface (13), and an interconnect substrate (30) overlying a first end (14) of the substrate (11) and electrically coupled to the electronic device (16). The electronic component can be manufactured by inserting the second end (15) of the substrate (11) into one of a plurality of holes (23) in a carrier (20) wherein the device surface (13) and the carrier (20) form an angle greater than approximately five degrees.

Abstract: An aluminum or copper heat sink is attached to a ceramic cap or exposed semiconductor chip using flexible-epoxy to provide improved thermal performance. The aluminum may be coated by anodizing or chromate conversion or the copper may be coated with nickel. Such structures are especilly useful for CQFP, CBGA, CCGA, CPGA, TBGA, PBGA, DCAM, MCM-L, single layer ceramic, and other chip carrier packages as well as for flip chip attachment to flexible or rigid organic circuit boards. These adhesive materials withstand thermal cycle tests of 0.degree. to 100.degree. C. for 1,500 cycles, -25.degree. to 125.degree. C. for 400 cycles, and -40.degree. to 140.degree. C. for 300 cycles; and withstand continuous exposure at 130.degree. C. for 1000 hours without loss of strength. Flexible-epoxies have a modulus of elasticity below 100,000 psi and a glass transition temperature below 25.degree. C., are much stronger than typical silicone adhesives, and do not contaminate the module or circuit board with silicone.

Abstract: A multilayer decoupling capacitor structure is disclosed, having a first decoupling capacitor with one electrode formed in a conductively doped silicon substrate and a second electrode made of conductively doped polysilicon. A third bifurcated conductive layer disposed above the second electrode in conjunction with a fourth conductive layer above the third layer form a second and third decoupling capacitor. The first decoupling capacitor serves to decouple circuitry associated with dynamic random access memory cells, while the second and third decoupling capacitors provide decoupling for further circuitry.

Abstract: A semiconductor device with a carrier body on which a substrate is fastened by means of a glue layer, which substrate is provided at its first side facing the carrier body with a semiconductor element and with a pattern of conductor tracks comprising contact electrodes for external contacting from the second side of the substrate facing away from the carrier body. The substrate is provided with windows at the areas of the contact electrodes for external contacting from the second side. The process steps preceding the gluing of the substrate to the carrier body are carried out in a clean room suitable for the manufacture of semiconductor elements, whereas the remaining process steps are preferably carried out in a final mounting room. Expensive lithographical equipment need not be available in both rooms, because the comparatively large windows can be formed by means of a simple contact mask.

Abstract: A semiconductor device includes a field insulating film, a channel stopper, and a diffusion layer. The field insulating film is formed on one major surface of a semiconductor substrate of a first conductivity type to surround an element region. The channel stopper of the first conductivity type is formed immediately below the field insulating film. The diffusion layer of an opposite conductivity type is formed to be adjacent to the channel stopper. The impurity concentration peak position of the diffusion layer substantially coincides with that of the channel stopper.

Abstract: A thin film electronic imager device has a repaired area between an upper conductive layer and an underlying component in the array in which portions of the upper conductive layer and a dielectric layer have been removed such that the upper conductive layer is electrically isolated from the underlying component. The repaired area has a bottom level having a surface comprising material of the underlying component and an intermediate step level having a surface comprising the dielectric layer material that extends around the periphery of the repaired area. The lateral dimension of the intermediate step level is greater than the lateral dimension of the bottom level such that the width of the intermediate level step surface is in the range between about 1 .mu.m and 3 .mu.m. Formation of the structure in the repair area is done by removing material by laser ablation to set back the upper conductive layer from the sidewall of the dielectric material in the region in which the defect was excised.

Abstract: In an insulated-gate type semiconductor device, the gate of an insulated-gate type field effect transistor and its protection element are formed separately from each other. In order to electrically connect the gate with the protection element, a contact region is formed to come into contact with the protection element. On the metallic wiring pattern formed on the contact region, a position recognizing pattern is formed to recognize position of the semiconductor device. Using the metallic wiring pattern, a testing region is also formed to test the withstand voltage. Without increasing the chip size of the semiconductor device, the position recognizing pattern can be formed for the position of the semiconductor device and the testing region for withstand voltage testing can be formed.

Abstract: An electronic packaging interface between conductors critically spaced on a carrier that are bonded to contact locations on a substrate surface. The conductors are cantilevered with each adjacent conductor bonded to a contact location that is a different distance from the carrier. Each conductor remains in the plane of the support of the carrier to the vicinity of its respective contact location where it is shaped to extend nearly vertically toward the substrate then horizontally across the contact location exerting pressure on the contact location.

Abstract: The present invention provides for an improved package for a laser diode. The package has portions of its inner surfaces covered with a non-reflecting material, such as simple black paint, non-reflective metals or specific anti-reflection coatings. Such non-reflecting materials surprisingly enhances the performance of packaged laser diodes used as pumping lasers for fiber amplifiers, for example.

Abstract: An improved semiconductor apparatus having conductive metallic protrusions formed on a bonding pad, thus improving an interconnection between a bonding pad and a bump formed on a substrate, which includes conductive metallic protrusions formed on said bonding pad of said substrate.

Abstract: A bipolar variable resistance device suitable for integrated circuit applications includes a silicon substrate, and a resistive layer covering the silicon substrate, the resistive layer being doped with impurities of a first polarity and of a second polarity. A dielectric layer covers the resistive layer. A conductive layer covers the dielectric layer. The device is used to change the resistance of the resistive layer by varying a control voltage applied to the conductive layer.

Abstract: A n-channel MOSFET device is formed with a selective high energy boron implantation into the N region of the n- channel where a photoresist is employed to cover the central portion over the channel. Small n- regions are formed near the channel source interface. These small n- regions have the advantages of preventing punch through. The selective implant regions have the additional advantages that the JFET resistance is not increased as a result of forming a punch through prevention region near the source channel boundary. Also disclosed in this invention is a p-type DMOS where a novel boron implantation is applied to reduce the threshold voltage. The boron is selectively implanted into the n-type channel near the source, i.e., a threshold sensitive region. The threshold voltage is reduced without unduly lowering the drain to source breakdown voltage.

Abstract: Semiconductor-on-glass integrated circuits may include photodetectors which are stimulated by backside light passing through the glass substrate; this provides information reception by optical communication. Bipolar and field effect transistors are shielded from the light by their buried layers. Further, LEDs integrated together with photodetectors permits all optical communication among glass substrate chips. Alternative uses of glass substrate include thermal isolation for efficient thermally regulated integrated circuits.

Abstract: A DRAM cell and a process for formation of a capacitor of a DRAM cell.

Abstract: An active matrix substrate comprises an insulation substrate, a plurality of pixel electrodes arranged in a matrix form on the insulation substrate, a switching element provided for each of the pixel electrodes, gate signal lines for supplying a signal to the switching elements, and source signal lines for supplying a data signal to the pixel electrodes via the corresponding switching elements. Each switching element is a thin film transistor (TFT) including a gate electrode, an insulating layer formed on the insulation substrate to cover the gate electrode, a semiconductor layer formed on the insulating layer opposite to the gate electrode, a source electrode formed on one end of the semiconductor layer, one of the source signal lines overlapping the source electrode, and a drain electrode formed on the other end of the semiconductor layer, one of the gate signal lines overlapping the drain electrode.

Abstract: A semiconductor device having a plated heat sink structure is provided, in which an Au layer (5) high in thermal expansion coefficient is formed on the lower surface of a GaAs substrate (1) having a source electrode (2), a gate electrode (3) and a drain electrode (4) of a field effect transistor on the upper surface, and, a W layer (6) low in thermal expansion coefficient is formed on the lower surface of the Au layer (5). Warping of the device after mounted on a package is reduced on the ground of such a plated heat sink structure.

Abstract: An ohmic hole injecting electrode or contact for diode structures is disclosed. It is formed of multilayer composite materials and gives superior results in this application. The composite materials include a layer of a high work function inorganic material and a layer of conductive polyaniline ("PANI"). In preferred embodiments, the anode has substantial transparency. These preferred materials can function as transparent electrodes in light-related diodes such as LEDs and photovoltaic cells where they exhibit lower turn on voltages and higher efficiencies.