Patents Examined by Cathy F. Lam
  • Patent number: 5939206
    Abstract: Disclosed is an apparatus which comprises at least one semiconductor chip mounted on a substrate, said substrate comprising a porous, electrically conductive member having electrophoretically deposited thereon a coating of a polymeric material. In one embodiment, the semiconductor chips are thermal ink jet printhead subunits.
    Type: Grant
    Filed: August 29, 1996
    Date of Patent: August 17, 1999
    Assignee: Xerox Corporation
    Inventors: Gary A. Kneezel, Ram S. Narang, Timothy J. Fuller, Peter J. John
  • Patent number: 5928768
    Abstract: This invention provides a silicon nitride circuit board in which a metal circuit plate is bonded to a high thermal conductive silicon nitride substrate having a thermal conductivity of not less than 60 W/m K, wherein a thickness D.sub.s of the high thermal conductive silicon nitride substrate and a thickness D.sub.M of the metal circuit plate satisfy a relational formula D.sub.s .ltoreq.2D.sub.M. The silicon nitride circuit board is characterized in that, when a load acts on the central portion of the circuit board which is held at a support interval of 50 mm, a maximum deflection is not less than 0.6 mm until the silicon nitride substrate is broken. The silicon nitride circuit board is characterized in that, when an anti-breaking test is performed to the circuit board which is held at a support interval of 50 mm, an anti-breaking strength is not less than 500 MPa.
    Type: Grant
    Filed: September 4, 1996
    Date of Patent: July 27, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuo Ikeda, Hiroshi Komorita, Yoshitoshi Sato, Michiyasu Komatsu, Nobuyuki Mizunoya
  • Patent number: 5928769
    Abstract: This invention provides an aluminum nitride wiring substrate in which a wiring metal layer for forming a signal wiring layer is densified to micropattern a signal wiring portion of an aluminum nitride package incorporating a semiconductor element therein and to increase the signal processing speed of the semiconductor element itself, the electric resistance of the wiring metal layer is reduced while keeping high thermal conductivity and insulating characteristics inherent in the aluminum nitride material to make it possible to mount a high-speed and high-output semiconductor element, and the wiring metal layer is prevented from defective wire continuity, odd appearance, or etc, and a method for the production thereof.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: July 27, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jun Monma, Hironori Asai
  • Patent number: 5929728
    Abstract: A technique for forming imbedded microwave structures in a microwave circuit package is presented. In one method, windows are punched, stamped or molded into metal laminate plates. A metal laminate layer is formed by fusing each of the metal laminate plates one on top of another, preferably using a diffusion bonding technique. The metal laminate layer is fused on top of a metal base plate, which is adhered to a ceramic substrate, and a shielded cover is fused on top of the metal laminate layer to form the imbedded waveguide structure as the base plate, metal laminate plates, and cover plate are fused together. In another method, indented cavities are formed in a shielded cover. The shielded cover is then fused, preferably using a diffusion bonding technique, to a metal base plate, which is adhered to a ceramic substrate.
    Type: Grant
    Filed: June 25, 1997
    Date of Patent: July 27, 1999
    Assignee: Hewlett-Packard Company
    Inventors: Ronald J. Barnett, Anthony R. Blume
  • Patent number: 5928767
    Abstract: A thin film printed board precursor containing a laminate of a dielectric thermosetting resin film layer and a heat and electrically conductive metal foil layer in direct adhesive bonding with a side of the resin film, optionally containing a supporting layer comprising one or more of fiber, fabric and thermoplastic polymer in contact with the other side of the resin layer, wherein the dielectric thermosetting resin layer has an unimpeded thickness that is at least equal to that of the foil layer bonded to it.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 27, 1999
    Assignee: Dexter Corporation
    Inventors: William F. Gebhardt, Rocco Papalia
  • Patent number: 5928567
    Abstract: A solvent-free liquid conductive material designed to protect electrical components, such as printed circuit boards from high pulse static electricity. The solvent-free liquid conductive material comprises a liquid silicone polymer, powdered metallic compound, non-conductive inorganic powder and a curing agent. The conductive material is applicable to both additively and subtractively processed printed circuit boards.
    Type: Grant
    Filed: March 11, 1997
    Date of Patent: July 27, 1999
    Assignee: The Whitaker Corporation
    Inventors: Thomas Harald Flottman, Francis Joseph Nuzzi, David Bernard James
  • Patent number: 5927505
    Abstract: Substrates having a wide range of thickness, and intended to be overmolded with a plastic package body, are accommodated in a common mold. The top surface of the substrate is provided with a dam structure, which may be formed as an additional layer on the substrate, and which is preferably in the form of a square ring. A groove (channel) is machined (e.g., by routing) into the surface of the dam structure. The top mold half, having a cavity for forming the package body, is provided with a sealing structure at the periphery of the cavity. The sealing structure has a ridge fitting into the channel of the dam structure. The depth of the groove in the dam structure is readily adjusted to ensure uniform clamping pressure of the top mold half on the substrate, so that liquid molding compound is contained within the cavity and so that undue pressure is not exerted on the substrate.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: July 27, 1999
    Assignee: LSI Logic Corporation
    Inventors: Chok J. Chia, Seng-Sooi Lim, Maniam Alagaratnam
  • Patent number: 5925445
    Abstract: The present invention provides a printed wiring board on which a bear chip is bonded in face-down. The printed wiring board has wiring patterns extending over the printed wiring board, wherein a plurality of wirings are provided which extend radially and outwardly from a center area of the printed wiring board, and wherein each of the wirings comprises at least a bear chip mounting pad region for contacting bumps of the bear chip, at least an external wiring pad region for connecting to an external wiring, and at least a covered region being covered by at least an insulation layer and the covered region separating between the bear chip mounting pad region and the external wiring pad region and a sealing material is filled within a space defined between the printed wiring board and the bear chip.
    Type: Grant
    Filed: July 14, 1997
    Date of Patent: July 20, 1999
    Assignee: NEC Corporation
    Inventor: Motoji Suzuki
  • Patent number: 5914216
    Abstract: A multilayer circuit board having a resolution in the range of 25-80 .mu.m, and blind via-holes having an aspect ratio in the range of 2.0-0.6 for effecting access between the layers, wherein an insulating layer between said layers having the blind via-holes has a glass transition temperature in the range of 150-220.degree. C., and an epoxy group photosensitive resin composition is used therefor. A photosensitive resin composition having a preferable resolution and heat resistance is obtained. A multilayer circuit board is provided in which the thermal stress generated in the steps of a reflow process, a gold wire bonding process and a repairing process in a bare chip mounting process was reduced, and peeling off of the conductor wiring and deformation of the multilayer circuit board caused by mechanical stresses during the heating processes were suppressed. Accordingly, a decrease in the size and weight of an electronic apparatus is possible.
    Type: Grant
    Filed: July 18, 1997
    Date of Patent: June 22, 1999
    Assignees: Hitachi, Ltd., Hitachi Chemical Company, Ltd.
    Inventors: Satoru Amou, Masao Suzuki, Tokihito Suwa, Mineo Kawamoto, Akio Takahashi, Masanori Nemoto, Hiroyuki Fukai, Mitsuo Yokota, Shiro Kobayashi, Masashi Miyazaki
  • Patent number: 5910354
    Abstract: A metallurgical interconnect composite is provided defined by a compliant, metallurgical, open cell, porous substrate which has a plurality of Z-axis conductive pathways extending from one side of the substrate to the other side. Each conductive pathway terminates in a solder covered surface area.
    Type: Grant
    Filed: March 4, 1997
    Date of Patent: June 8, 1999
    Assignee: W.L. Gore & Associates, Inc.
    Inventors: Carmine G. Meola, Daniel D. Johnson, Donald R. Banks, Joseph G. Ameen
  • Patent number: 5910355
    Abstract: A pressure sensitive sparkless switching device includes a layer of piezoresistive cellular polymer foam, at least two conductive layers, and an insulative spacer element having at least one opening. When pressure is applied to the device the piezoresistive foam disposes itself through the opening of the spacer element and makes electrical contact between the conductive layers. The resistance of the piezoresistive foam varies with the amount of pressure applied to provide an analog as well as on-off function. The device may also provide multiple switching, and shear detection capabilities.
    Type: Grant
    Filed: October 23, 1997
    Date of Patent: June 8, 1999
    Inventor: Lester E. Burgess
  • Patent number: 5904975
    Abstract: A printed circuit board in accordance with the invention includes an electrically insulated board. A plurality of patterns include electrically conductive members are provided on the board and have electrode units for electrical connection. The electrode units are provided adjacent to each other and are separated at a tip section of the pattern. Electrically insulated covering members cover the pattern except for the electrode units. Electrically insulated separation members are provided in the space between the electrode units.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: May 18, 1999
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Akio Ogura
  • Patent number: 5904978
    Abstract: An electrically conductive composite article is provided having a polytetrafluoroethylene fibril matrix and a predetermined volume. The electrically conductive composite article comprises electrically conductive particles, and electrically nonconductive, energy expanded hollow polymeric particles. The volume percent of the electrically conductive particles is at least 20 volume percent. The electrically conductive composite article is continuously electrically conductive throughout its entire structure. Accordingly, electric current freely flows through the composite article due to the low resistivity of the article. The electrically conductive composite article may additionally include an elastomer material disposed within the article in a discontinuous fashion.
    Type: Grant
    Filed: December 15, 1995
    Date of Patent: May 18, 1999
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: James R. Hanrahan, Michael P. Kienzle, Mark S. Spencer
  • Patent number: 5900312
    Abstract: A package for mounting an integrated circuit chip includes a body having at least a first region and a second region. The first region has a first coefficient of thermal expansion (CTE), and the second region has a second, different CTE. The first region approximately matches the CTE of the integrated circuit chip mounted on the package, and the second region approximates the CTE of the printed wiring board to which the package is mounted.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: May 4, 1999
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: Mark F. Sylvester
  • Patent number: 5900308
    Abstract: In a microstrip line dielectric filter, a principal layer of a conductor constituting a microstrip line circuit consists of a Cu plating layer and the thickness of the conductor is 10 .mu.m or less. In another embodiment, the thickness of the conductor is determined in relation to a center frequency of a wave transmitted through the filter so as to be within the range defined by a hatched area in the graph of FIG. 6.
    Type: Grant
    Filed: October 1, 1996
    Date of Patent: May 4, 1999
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Kazumasa Koike, Tatsuya Takemura
  • Patent number: 5895235
    Abstract: A device, notably a transponder, comprising an electronic arrangement and a coating formed by an envelope defining a pocket and by a solidified binding in which is embedded the electronic arrangement. The envelope presents an opening having served for the introduction of the electronic arrangement and the binding during the manufacture of the device. The external surface of the device in the region of the opening is formed by the solidified binding. For the manufacture of the device such has described hereabove, it is envisaged to use a reservoir acting to fill the pocket by the binding and to recover a surplus of provided binding, this surplus of binding and the reservoir being separated from the device after the binding has at least partially solidified.
    Type: Grant
    Filed: October 7, 1997
    Date of Patent: April 20, 1999
    Assignee: EM Microelectronic-Marin SA
    Inventor: Francois Droz
  • Patent number: 5888631
    Abstract: The present invention relates to assembly techniques and the resulting products which are thermally stable, have high structural integrity, and compensate for thermal stresses that occur between the various components of the package. This is accomplished, in-part, by designing the package so that the coefficient of thermal expansion (CTE) of a stiffening ring which is mounted on the package substrate matches the CTE of the substrate and optional lid. Further, the particular adhesives used to bond the stiffening ring are chosen to match their CTE to that of the substrate, ring and lid. Moreover, the substrate is designed so that its CTE, at least in-part, matches that of the chip, and also that of the stiffening ring.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: March 30, 1999
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: Mark F. Sylvester
  • Patent number: 5888630
    Abstract: A method of manufacturing a multi-layered structure includes forming first and second layers, patterning the first layer, determining a distribution of material in at least one area of the first layer, and altering the material content of one of the first and second layers in at least one of the first layer area and a corresponding area of the second layer to approximately match the material content of the first layer and second layers.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: March 30, 1999
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: Mark F. Sylvester, David B. Noddin
  • Patent number: 5885683
    Abstract: There is disclosed an electrical component having at least one end for making electrical contact with another component, including a plurality of electrically conductive fibers in a matrix to provide a plurality of electrical point contacts at the at least one end of the electrical component, wherein the matrix is prepared from a composition composed of methyl methacrylate monomer and a trimer of hydroxyethyl methacrylate, diphenylmethane diisocyanate, and hydroxyethyl methacrylate, wherein the electrical component has a laser processed region at least substantially free of the matrix, wherein there is minimal residue generated by the laser processing in removing the matrix from the laser processed region.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: March 23, 1999
    Assignee: Xerox Corporation
    Inventor: Joseph A. Swift
  • Patent number: 5885710
    Abstract: A flexible strip transmission line is disclosed. The flexible strip transmission lines consists of a plurality of flexible layers enabling the transmission line to be folded or repeatably bent. The central layer consists of a flexible dielectric material. On opposing side of the dielectric layer are first and second flexible ground planes formed of a metalized fabric. The flexible ground plane layers are bonded to the dielectric material using a bonding agent such as silicone adhesive. An abrasion resistant material is connected to the outer surface of the flexible ground plane layers to provide a protective exterior shell.
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: March 23, 1999
    Assignee: Ericsson, Inc.
    Inventors: James D. MacDonald, Jr., Walter M. Marcinkiewicz