Patents Examined by Cheryl R. Figlin
  • Patent number: 5550325
    Abstract: A printed-circuit board includes an insulating substrate, at least one insulating layer formed on the substrate, a circuit pattern formed on the layer, and a protective coating layer formed on the insulating layer having the circuit pattern formed thereon. The circuit pattern has a location to be cut, if necessary. A material of the protective coating layer is at least partially eliminated from two zones which are disposed at sides of the location to be cut, and a material of the insulating layer may be further at least partially eliminated from those zones.
    Type: Grant
    Filed: September 6, 1994
    Date of Patent: August 27, 1996
    Assignee: Fujitsu Limited
    Inventor: Shinji Matsuda
  • Patent number: 5491301
    Abstract: A shielding method which utilizes a three dimensional structure and is effective to a source of the electromagnetic radiation noise, and a circuit board employing the same are obtained. Further, for the purpose of making the shielding function at an enclosure level unnecessary and realizing the recycling of enclosure materials by using this circuit board, in a circuit board structure having at least a signal layer, a power source layer and a ground layer, a signal line on the signal layer which is sandwiched between the two conductor layers made up of the power source layer and the ground layer, or the power source layers or the ground layers, is enclosed in a three dimensional manner with the conductor layers, thereby to form a single or double electrical closed loop current path or paths. By adopting this structure, there is obtained the effect that the electromagnetic radiation noise radiated from the circuit board is greatly reduced.
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: February 13, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Akiba, Kunio Matsumoto, Makoto Iida, Takashi Maruyama, Tsutomu Hara, Hitoshi Yoshidome, Kazuo Hirota
  • Patent number: 5478972
    Abstract: An interlayer connection wiring penetrating each of resin films constituting a multilayer circuit board and a surface wiring connected to the interlayer connection wiring are formed in predetermined positions on surfaces of each resin film. The resin films are laminated while being positioned so that the interlayer connection wiring of one of each adjacent pair of the circuit bases is superposed on a part of the surface wiring of the other, and are thereafter treated under a high-temperature and high-pressure condition to be combined with each other. If a resin film formed of a thermoplastic resin is adopted, the laminated resin films are combined by intermixing the interfaces of each adjacent pair of resin films. As the resin films shrink when the laminated resin films is cooled to ordinary temperature, a compressive force is applied to the contact surfaces of the interlayer connection wiring and the surface wiring.
    Type: Grant
    Filed: August 25, 1994
    Date of Patent: December 26, 1995
    Assignee: Fujitsu Limited
    Inventors: Daisuke Mizutani, Kishio Yokouchi
  • Patent number: 5478971
    Abstract: An object of the invention is to economically and easily manufacture a thin film diode of back-to-back connection type having a symmetric voltage-ampere characteristic. First conducting layers of a metallic circuit board to become a wiring and an island conductor, respectively, are electrically connected with each other via a second conducting layer. The first conducting layers are electrically isolated from each other by anodizing the second conducting layer. An anodized insulating layer is formed by oxidized parts of the first conducting layers and the oxidized second conducting layer. The not-anodized part of one of the first conducting layers becomes a wiring and the not-anodized part of the other of the first conducting layers becomes an island conductor. The island conductor is considered as a first conductor and second and third conductors are formed on the anodized insulating layer on the first conductor. Thereby, a two-terminal element of a back-to-back type is completed.
    Type: Grant
    Filed: July 29, 1994
    Date of Patent: December 26, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masahito Gotou, Kiyoshi Okano
  • Patent number: 5473118
    Abstract: A printed circuit board assembly having a coverlay film which is a composite film consisting of a porous fluoropolymer film coated with a thermoplastic or heat-curing adhesive is disclosed. The coverlay film has excellent conformability and adhesion to the printed circuit board and low dielectric constant.
    Type: Grant
    Filed: June 30, 1994
    Date of Patent: December 5, 1995
    Assignee: Japan Gore-Tex, Inc.
    Inventors: Sunao Fukutake, Kazuhiko Ohashi, Akira Urakami
  • Patent number: 5471013
    Abstract: A strain relief for an electrical supply cord of an electrical appliance includes a first member pivotally connected to the housing of the appliance. The member includes a generally planar surface. A second member is connected to the housing and has a generally planar surface facing and parallel to the planar surface of the first member. The planar surfaces are spaced from each other to define an electrical supply cord receiving slot. An electrical supply cord is movably disposed in the slot in a direction parallel to the longitudinal axis of the cord. Movement of the cord in either longitudinal direction causes the first member to rotate relative to the second member so that as the planar surface of the first member moves relative to the planar surface of the second member the width of the cord receiving slot is reduced.
    Type: Grant
    Filed: July 6, 1993
    Date of Patent: November 28, 1995
    Assignee: Black & Decker Inc.
    Inventor: Michael J. Marchetti
  • Patent number: 5471017
    Abstract: A no fixture method to cure die attach for bonding IC dies (16) to substrates in which a solvent is applied to top and bottom surfaces of a thermoplastic die attach film (14), prior to component placement of the die (16) on a lead frame die support pad or on a printed circuit board PCB (12). The die attach film (14) is bonded to the IC die (16) and the lead frame, or to the IC die (16) and the printed circuit board PCB (12) upon drying of the solvent.
    Type: Grant
    Filed: May 31, 1994
    Date of Patent: November 28, 1995
    Assignee: Texas Instruments Incorporated
    Inventor: Linden T. Halstead
  • Patent number: 5471016
    Abstract: In an apparatus (1) with at least one battery (12, 13) mounted on a printed circuit board (14) the printed circuit board (14) has mounting portions (23, 24, 25, 26) which can be broken off this printed circuit board, solder lugs (19, 20, 21, 22) which project from terminals (15, 16, 17, 18) of the battery (12, 13) being fixedly connected to said mounting portions by a soldered joint (27) each.
    Type: Grant
    Filed: March 18, 1994
    Date of Patent: November 28, 1995
    Assignee: U.S. Philips Corporation
    Inventors: Erich Krainer, Martin Sonnek
  • Patent number: 5468918
    Abstract: A conductor member for an electric circuit includes a conductive plastic mold in which carbon fibers or graphite fibers are dispersedly contained, and a metallic layer at least partially plated on the surface of said conductive plastic mold. The conductor member is provided on the surface of an insulating substrate to provide an electric circuit body. Thus, the conductor member for an electric circuit and the electric circuit body can be easily formed in a three-dimensional circuit because of its simple fabrication and excellent processing. Further, the film of metal plating can be made at a high speed and is hard to break because of the intimate contact of the plated metal.
    Type: Grant
    Filed: December 16, 1993
    Date of Patent: November 21, 1995
    Assignee: Yazaki Corporation
    Inventors: Toshiaki Kanno, Makoto Katsumata, Hidenori Yamanashi, Hitoshi Ushijima
  • Patent number: 5468920
    Abstract: A printed circuit board is installable into a slot of a cardedge connector such that contacts of the connector ride along electrically conductive, raised pads of the card. Each pad includes frontal edge segments which are inclined generally rearwardly toward a center axis of the pad so that if any of the contacts are laterally offset with respect to the center axis of its respective pad during installation, the offset contact will be re-directed toward the center axis in response to making engagement with one of the frontal edge segments.
    Type: Grant
    Filed: July 22, 1994
    Date of Patent: November 21, 1995
    Assignee: Apple Computer, Inc.
    Inventor: Mark P. August
  • Patent number: 5466891
    Abstract: The present invention provides a floating shield for a high voltage bushing. Preferably the bushing is conically shaped and has a composite housing for substantially optimizing the electrical performance of the bushing according to the invention. The floating shield is preferably suspended within the bushing housing by a supporting insulator placed in a low electrical stress region of the bushing. In a preferred embodiment, the supporting insulator is disposed between a ground grading shield and the bushing housing. The composite housing preferably provides a protective inner tube made of a fiber reinforced material and an outer silicone rubber housing having weather sheds formed in a helix on the surface of the housing.
    Type: Grant
    Filed: April 8, 1994
    Date of Patent: November 14, 1995
    Assignee: ABB Power T&D Company Inc.
    Inventors: Willie B. Freeman, David S. Johnson, Klaus B. Froehlich
  • Patent number: 5464950
    Abstract: An aluminum nitride circuit board includes an aluminum nitride ceramic body. An inner conductor metal which is to be used as a wiring material is formed in the aluminum nitride ceramic body. The inner conductor metal is mainly made of copper, a melting point of which is lower than a firing temperature of the aluminum nitride ceramic. A layer mainly made of a periodic table IVa group metal or compound, such as titanium, zirconium, or hafnium, is formed in an interface between the aluminum nitride ceramic body and the inner conductor metal.
    Type: Grant
    Filed: September 3, 1993
    Date of Patent: November 7, 1995
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yoichi Harayama, Koishiro Hayashi
  • Patent number: 5463189
    Abstract: An installation clip has a base member that fastens to first electrical cable already secured to a structural member in order to mount one or more second electrical cables indirectly to the structural member. A clip structure is disposed on the base member and has a pair of resilient retaining arms that extend outwardly from the base member in opposed, spaced-apart relation to define a clip channel into which the second electrical cable(s) can be placed. Shoulders may be formed on the distal ends of the retaining arms to define an inlet into the clip channel, and lips may be disposed on the shoulders to form a V-shaped opening into the clip channel. The retaining arms may also have opposed central flanges that project into the clip channel parallel to the base member to form upper and lower regions, and a spacer may also be disposed on the base member to separate the lower region into a pair of subregions. These regions are each sized to receive a second electrical cable.
    Type: Grant
    Filed: December 23, 1993
    Date of Patent: October 31, 1995
    Inventors: Bernard F. Deneke, James W. Rumbold, Clark B. Scott
  • Patent number: 5463190
    Abstract: A conductive adhesive (120) for electrically and mechanically bonding circuit terminals (105) includes a polymer (121) having a predetermined curing temperature range, a first conductive particulate material (125) suspendable in the polymer (121) for providing substantially uniform conductivity throughout the conductive adhesive (120), and a second conductive particulate material (130) suspendable in the polymer (121) for metallurgically bonding together particles of the first particulate material (125). The first conductive particulate material (125) provides substantially uniform conductivity throughout the conductive adhesive (120) and includes metallic particles having a melting point above the curing temperature of the polymer. The second conductive particulate material (130) welds together particles of the first particulate material (125) and includes metallic particles having a melting point within the curing temperature range of the polymer (121).
    Type: Grant
    Filed: April 4, 1994
    Date of Patent: October 31, 1995
    Assignee: Motorola, Inc.
    Inventors: Robert T. Carson, Arnold W. Hogrefe, Frank J. Juskey, Jr.
  • Patent number: 5463191
    Abstract: A circuit board design featuring a fine pitch ball grid array ("BGA") having a simplified construction. The circuit board comprises: (1) an insulating substrate, the substrate having a via therethrough, (2) a conductive layer located over the substrate, the via passing through the layer and laterally uninterrupted through the circuit board, (3) a first solder having a first melting point located within and substantially blocking the via and (4) a second solder having a second melting point located over the blocked via, the second melting point lower than the first melting point, the first solder remaining substantially solid and preventing the second solder from substantially entering the via when the first and second solders are heated to a temperature between the first and second melting points. The present invention eliminates precision drilling required by current blind via BGA pad designs.
    Type: Grant
    Filed: March 14, 1994
    Date of Patent: October 31, 1995
    Assignee: Dell USA, L.P.
    Inventors: James S. Bell, Deepak Swamy
  • Patent number: 5461200
    Abstract: Long flexible members such as hoses, electric cords and cables tend to be springy and elastic. They are not easily coiled and stored. They tend to straighten out when bent into a desired shape. They tend to tangle and interfere with operations. The invention incorporates an elongate wire element running parallel to the long axis of the flexible member. The wire element is encased in the covering of the flexible member. The wire element is a conformable shape-retaining material such as a compliant soft iron or steel. It renders the entire member shape-retaining so that it may be conveniently coiled for storage or positioned for use. An embodiment for retrofitting an existing flexible member provides the wire element encased in a covering which wraps around a flexible member and then seals closed to form a shape retaining sleeve about the member.
    Type: Grant
    Filed: June 13, 1994
    Date of Patent: October 24, 1995
    Inventor: James Norcia
  • Patent number: 5461202
    Abstract: A flexible wiring board includes a printed conductive circuit layer formed on an insulating film, a metallic layer formed on thed printed conductive circuit layer, and an insulating layer formed on the metallic layer. A method of making a flexible wiring board includes the steps of forming a conductive circuit layer by screen printing a wiring pattern using a conductive paste, baking the printed wiring pattern, and forming a metallic layer on the printed conductive circuit layer by a plating method.
    Type: Grant
    Filed: October 5, 1993
    Date of Patent: October 24, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Naoki Sera, Toshiharu Fukui, Kouji Tanabe, Futoshi Matsui
  • Patent number: 5459287
    Abstract: To facilitate the registered connection between a BGA package and an associated multi-tiered circuit board, a spaced series of vias are formed transversely through the board substrate between its opposite first and second sides. A spaced series of relatively shallow, circularly cross-sectioned socket areas, offset from the vias, are also formed on the first side of the circuit board. The sockets have diameters slightly larger that those of the generally ball-shaped leads of the BGA package, and are positioned on the same centerline pattern as the leads. After the vias and sockets are formed, a metal plating material is deposited on their interiors and around their open ends on the first board side, with the plating being extended across the first board side between associated socket and via pairs.
    Type: Grant
    Filed: May 18, 1994
    Date of Patent: October 17, 1995
    Assignee: Dell USA, L.P.
    Inventor: Deepak Swamy
  • Patent number: 5455390
    Abstract: A component for mounting semiconductor chips or other microelectronic units includes a flexible top sheet with an array of terminals on it, and with flexible leads extending downwardly from the terminals. A compliant dielectric support layer surrounds the leads, holding the lead tips in precise locations. The leads are desirably formed from wire such as gold wire, and have eutectic bonding alloy on their tips. The component can be laminated to a chip or other unit under heat and pressure to form a complete subassembly with no need for individual bonding to the contacts of the chip. The subassembly can be tested readily and provides compensation for thermal expansion.
    Type: Grant
    Filed: February 1, 1994
    Date of Patent: October 3, 1995
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, John W. Smith, Jr.
  • Patent number: 5455393
    Abstract: A multilayered printed wiring board includes a plurality of inner layer circuits, ground layers, first insulating layers, a second insulating layer, a surface layer circuit, and a parts mounting pad. The inner layer circuits are arranged parallel to each other in a flat manner in at least one inner layer. The ground layers are formed on and under the inner layer circuits to sandwich the inner layer circuits. The first insulating layers are respectively formed between the ground layers and the inner layer circuits to insulate the inner layer circuits from each other and the inner layer circuits from the ground layers. The second insulating layer is formed at least on an uppermost one of the ground layers and serving as a surface layer. The surface layer circuit is selectively formed on the second insulating layer.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: October 3, 1995
    Assignee: NEC Corporation
    Inventors: Tutomu Ohshima, Hidebumi Ohnuki, Ryo Maniwa