Abstract: An OLED display panel is provided and defined as: a display region, a bending region, and a driving bonding region, wherein the driving bonding region has: a driving chip; a flexible circuit board configured to achieve a connection between the driving chip and a motherboard; and a reinforcing plate disposed on and covered with a surface of the substrate wiring layer of the driving bonding region, wherein a chamber is formed in a bottom portion of the reinforcing plate, and the driving chip is located in the chamber.

Abstract: Present disclosure provides a phase change memory structure, including a transistor region, a phase change material over the transistor region, a heater over the transistor region and in contact with the phase change material, and a dielectric layer surrounding the heater and the phase change material. The heater includes a first material having a first thermal conductivity, the first material disposed at a periphery of the heater, and a second material having a second thermal conductivity greater than the first thermal conductivity, the second material disposed at a center of the heater. Present disclosure also provides a method for manufacturing the phase change memory structure described herein.

Abstract: A memory device including a via opening through a dielectric layer and an inert electrode having a conformal thickness present on sidewalls but recessed from the top of the via and a base surface of the via opening through the dielectric layer. A metal oxide layer provides a filament forming layer for the memory device and is present in direct contact with the inert electrode. The metal oxide layer also has a conformal thickness and has vertically orientated portions on the portion of the inert electrode overlying the sidewalls of the via opening, and horizontally orientated portions on the portion of the inert electrode overlying the base of the via opening. A reactive electrode is in direct contact with the metal oxide layer. Switching of the memory device includes a laterally orientated direction across the vertically orientated portion of the metal oxide layer in regions not modified by patterning of the conformal metal-oxide layer.

Abstract: Production of an integrated circuit including an electrical contact on SiC is disclosed. One embodiment provides for production of an electrical contact on an SiC substrate, in which a conductive contact is produced on a boundary surface of the SiC substrate by irradiation and absorption of a laser pulse on an SiC substrate.

Abstract: The disclosure discloses an organic electroluminescent display panel, a method for manufacturing the same, and a display device, where organic light-emitting layers of display sub-pixels and virtual sub-pixels may be created on an underlying substrate through evaporation using a fine metal mask and a shielding mask arranged in a stack, and the area of the organic light-emitting layer of a non-rectangular shaped virtual sub-pixel among the virtual sub-pixels is smaller than the area of the organic light-emitting layer of a display sub-pixel capable of emitting light in the same color.

Abstract: A bonding structure (100) of the present invention includes a substrate (110), a metal film (120), a semiconductor element (130). The substrate (110), the metal film (120), and the semiconductor element (130) are laminated in order just mentioned. The metal film (120) contains a metal diffused through stress migration, and the substrate (110) and the semiconductor element (130) are bonded together with the metal film (120) therebetween.

Abstract: An organic thin film transistor includes a substrate, a hydrophobic layer, an oxide layer, a hydrophilic layer, a semiconductor layer, and a source/drain layer. The hydrophobic layer covers a surface of the substrate. The oxide layer is located on the hydrophobic layer and has plural segments. The hydrophilic layer is located on the segments of the oxide layer, and the oxide layer is located between the hydrophilic layer and the hydrophobic layer. The semiconductor layer is located on the hydrophilic layer, and the hydrophilic layer is located between the semiconductor layer and the oxide layer. The source/drain layer connects across the semiconductor layer on the segments of the oxide layer.

Abstract: In the cases of performing programming by forming a two-terminal-type variable resistance element on a semiconductor device, it has been difficult to control the programming, and malfunctions have often occurred. This switching element includes at least a first variable resistance element, a second variable resistance element, a first rectifying element, and a second rectifying element, one end of the first variable resistance element and one end of the second variable resistance element are respectively connected to one end of the first rectifying element and one end of the second rectifying element, and each of the rectifying elements has two terminals.

Abstract: Non-volatile memory (NVM) devices, resistive random access memory (RRAM) devices and methods for fabricating such devices are provided. In an exemplary embodiment, a non-volatile memory (NVM) device includes a first electrode and a second electrode positioned above the first electrode. Further, the NVM device includes a variable resistance material layer positioned between the first electrode and the second electrode. The variable resistance material layer contains magnesium oxide.

Abstract: Provided is an electrode assembly which may be manufactured by providing a first substrate and a second substrate, plasma treating the first substrate, forming an electrode on the first substrate, and thermally compressing the first substrate and the second substrate, with the electrode therebetween, wherein each of the first substrate and the second substrate includes a fluorine-based polymer.

Abstract: Disclosed are an organic light-emitting display panel and an organic light-emitting display device. The organic light-emitting display panel includes a display area, a middle area of the display panel, an array substrate, pixels arranged in an array, and first signal lines and second signal lines for providing the pixels with signals and extending in a first direction, in the display area of the array substrate, a first quantity of pixels corresponding to a first signal line is less than a second quantity of pixels corresponding to a second signal line, and first transparent conductive lines are electrically connected with the first signal lines in the middle area.

Abstract: A semiconductor device including reentrant isolation structures and a method for making such a device. A preferred embodiment comprises a substrate of semiconductor material forming at least one isolation structure having a reentrant profile and isolating one or more adjacent operational components. The reentrant profile of the at least one isolation structure is formed of substrate material and is created by ion implantation, preferably using oxygen ions applied at a number of different angles and energy levels. In another embodiment the present invention is a method of forming an isolation structure for a semiconductor device performing at least one oxygen ion implantation.

Abstract: The present invention relates to organic electronic devices, and more specifically to organic field effect transistors, comprising a dielectric layer that comprises a polycycloolefinic polymer and a diazirine compound.

Abstract: A substrate processing method is for forming a metal film on a target substrate by using a plasma. The method includes loading a target substrate having a silicon-containing layer on a surface thereof into a processing chamber which is pre-coated by a film containing a metal, introducing hydrogen gas and a gaseous compound of the metal and halogen into the processing chamber, generating a plasma, and forming a metal film on the target substrate. The method further includes performing a first reduction process of forming an atmosphere of a plasma obtained by activating hydrogen gas in the processing chamber, unloading the target substrate from the processing chamber, performing a second reduction process of forming an atmosphere of a plasma obtained by activating hydrogen gas in the processing chamber, and loading a next target substrate into the processing chamber.

Abstract: Provided herein are atomic layer deposition (ALD) methods of depositing cobalt in a feature. The methods involve two-step surface treatments during an ALD cycle, with one step involving the reaction of a co-reactant gas with an adsorbed cobalt precursor and the other step involving a growth-inhibiting reactant gas on the cobalt surface. The growth-inhibiting reactant gas significantly lowers cobalt growth rate, producing a highly conformal cobalt film. The described ALD processes enable improved controllability in film nucleation, step coverage, and morphology by the separate surface treatment and low process temperature. The methods are applicable to a variety of feature fill applications including the fabrication of metal gate/contact fill in front end of line (FEOL) processes as well as via/line fill in back end of line (BEOL) processes.

Abstract: The invention relates to an optoelectronic device (1) comprising at least one outer surface (2) containing silicone (20), chemical compounds, comprising an anchor group (3) and a head group (4), being bonded to the silicone via the anchor group, and the adhesion of the regions of the silicone (2) present on the outer surface being reduced owing to the head groups of the chemical compounds. A method for producing an optoelectronic device is also disclosed.

Abstract: Structures for interconnects and methods for forming interconnects. A dual-damascene opening is formed in a dielectric layer and a first liner is formed on the dielectric layer at one or more sidewalls of the dual-damascene opening. A first conductor layer is formed in a portion of the dual-damascene opening. The first liner is removed from the one or more sidewalls of the dual-damascene opening vertically between the first conductor layer and a top surface of the dielectric layer. After the first liner is removed, a second liner is formed on the dielectric layer at the one or more sidewalls of the dual-damascene opening between the first conductor layer and the top surface of the dielectric layer. A second conductor layer is formed in the dual-damascene opening between the first conductor layer and the top surface of the dielectric layer. The first and second liner materials differ in composition.

Abstract: Provided is an inkjet adhesive which is applied using an inkjet device, wherein the adhesive can suppress generation of voids in the adhesive layer and, after bonding, can enhance adhesiveness, moisture-resistant adhesion reliability, and cooling/heating cycle reliability. An inkjet adhesive according to the present invention comprises a photocurable compound, a photo-radical initiator, a thermosetting compound having one or more cyclic ether groups or cyclic thioether groups, and a compound capable of reacting with the thermosetting compound, and the compound capable of reacting with the thermosetting compound contains aromatic amine.

Abstract: Provided is a display device including: a capacitor having a first electrode, a first insulating film over the first electrode, and a second electrode over the first insulating film; and a first transistor over the capacitor. The first transistor includes the second electrode, a second insulating film over the second electrode, an oxide semiconductor film over the second insulating film, and a first source electrode and a first drain electrode over the oxide semiconductor film. The first source electrode and the first drain electrode are electrically connected to the oxide semiconductor film.

Abstract: A mounting substrate (40) has a patterned metal layer defining a plurality of top metal bond pads for bonding to bottom metal bond pads of LED dies. A solder mask layer (52) is formed over the mounting substrate, where the mask has openings that expose the top metal bond pads and protects metal traces on the substrate. The mask layer is a highly reflective white paint. The exposed top metal bond pads are then wetted with solder. The LED dies' bottom metal bond pads are then soldered to the exposed top metal bond pads, such that the mask layer surrounds each LED die to reflect light. A reflective ring (60) is affixed to the substrate to surround the LED dies. A viscous phosphor material (62) then partially fills the ring and is cured. All downward light by the LED dies and phosphor is reflected upward by the ring and solder mask layer.