Abstract: The invention relates to a process for treating a structure of semiconductor-on-insulator type successively comprising a support substrate, a dielectric layer and a semiconductor layer having a thickness of less than or equal to 100 nm, the semiconductor layer being covered with a sacrificial oxide layer, comprising measuring, at a plurality of points distributed over the surface of the structure, the thickness of the sacrificial oxide layer and of the semiconductor layer, so as to produce a mapping of the thickness of the semiconductor layer and to determine, from the measurements, the average thickness of the semiconductor layer, selective etching of the sacrificial oxide layer so as to expose the semiconductor layer, and carrying out a chemical etching of the semiconductor layer, the application, temperature and/or duration conditions of which are adjusted as a function of the mapping and/or of the mean thickness of the semiconductor layer, so as to thin, at least locally, the semiconductor layer by a thic

Abstract: A semiconductor lighting device may include a substrate populated with at least one semiconductor light source, wherein at least one reflective surface region of the substrate is covered with a light-reflecting layer, and wherein the light-reflecting layer has an aluminum carrier coated in a reflection-intensifying manner.

Abstract: A method of fabricating a semiconductor device includes providing an assembly substrate including a split plane defining a handle region and a transfer region, a film layer coupled to the transfer region, and one or more active devices coupled to the film layer. The method also includes providing a device substrate including one or more bonding regions and joining the assembly substrate to the device substrate. The method further includes splitting the assembly substrate to remove the handle region.

Abstract: A memristor including a dopant source is disclosed. The structure includes an electrode, a conductive alloy including a conducting material, a dopant source material, and a dopant, and a switching layer positioned between the electrode and the conductive alloy, wherein the switching layer includes an electronically semiconducting or nominally insulating and weak ionic switching material. A method for fabricating the memristor including a dopant source is also disclosed.

Abstract: A memory cell is disclosed. The memory cell includes a transistor and a capacitor. The transistor includes a source region, a drain region, and a channel region including an indium gallium zinc oxide (IGZO, which is also known in the art as GIZO) material. The capacitor is in operative communication with the transistor, and the capacitor includes a top capacitor electrode and a bottom capacitor electrode. Also disclosed is a semiconductor device including a dynamic random access memory (DRAM) array of DRAM cells. Also disclosed is a system including a memory array of DRAM cells and methods for forming the disclosed memory cells and arrays of cells.

Abstract: Provided is a thin film transistor capable of improving reliability in the thin film transistor including an oxide semiconductor layer. A thin film transistor including: a gate electrode; a gate insulating film formed on the gate electrode; an oxide semiconductor layer forming a channel region corresponding to the gate electrode on the gate insulating film; a channel protective film formed at least in a region corresponding to the channel region on the oxide semiconductor layer; and a source/drain electrode. A top face and a side face of the oxide semiconductor layer are covered with the source/drain electrode and the channel protective layer on the gate insulating film.

Abstract: Atomic layer deposition processes for forming germanium oxide thin films are provided. In some embodiments the ALD processes can include the following: contacting the substrate with a vapor phase tetravalent Ge precursor such that at most a molecular monolayer of the Ge precursor is formed on the substrate surface; removing excess Ge precursor and reaction by products, if any; contacting the substrate with a vapor phase oxygen precursor that reacts with the Ge precursor on the substrate surface; removing excess oxygen precursor and any gaseous by-products, and repeating the contacting and removing steps until a germanium oxide thin film of the desired thickness has been formed.

Abstract: A multi-wavelength distributed Bragg reflector (DBR) semiconductor laser is provided where DBR heating elements are positioned over the waveguide in the DBR section and define an interleaved temperature profile that generates multiple distinct reflection peaks corresponding to distinct temperature dependent Bragg wavelengths associated with the temperature profile. Neighboring pairs of heating elements of the DBR heating elements positioned over the waveguide in the DBR section are spaced along the direction of the axis of optical propagation by a distance that is equal to or greater than the laser chip thickness b to minimize the impact of thermal crosstalk between distinct temperature regions of the interleaved temperature profile.

Abstract: The object of the present invention is to provide an organic transistor using an organic semiconductor having excellent transistor properties, and a method for producing the organic transistor, the present invention providing, first, an organic transistor including a gate electrode (b), an insulating layer (c), an organic semiconductor layer (d) which contacts the insulating layer (c) and has a channel formation area, and source/drain electrodes (e), which are formed on (a) a substrate, wherein the organic semiconductor layer (d) contains a fluorine-based compound (surfactant), and, secondly, a method for producing an organic transistor comprising a gate electrode (b), an insulating layer (c), an organic semiconductor layer (d) which contacts the insulating layer (c) and has a channel formation area, and source/drain electrodes (e), which are formed on (a) a substrate, the method comprising: a step in which the organic semiconductor layer (d) is formed on the insulating layer (c) by printing or coating an org

Abstract: A thin film transistor having low off-state current and excellent electrical characteristics can be manufactured. In an inverted staggered thin film transistor including a semiconductor film in which at least a microcrystalline semiconductor region and an amorphous semiconductor region are stacked, a conductive film and an etching protective film are stacked over the semiconductor film; a mask is formed over the etching protective film; first etching treatment in which the etching protective film, the conductive film, and the amorphous semiconductor region are partly etched is performed; then, the mask is removed. Next, second etching treatment in which the exposed amorphous semiconductor region and the microcrystalline semiconductor region are partly dry-etched is performed using the etched etching protective film as a mask so that the microcrystalline semiconductor region is partly exposed to form a back channel region.

Abstract: Some embodiments include transistor constructions having a first insulative structure lining a recess within a base. A first conductive structure lines an interior of the first insulative structure, and a ferroelectric structure lines an interior of the first conductive structure. A second conductive structure is within a lower region of the ferroelectric structure, and the second conductive structure has an uppermost surface beneath an uppermost surface of the first conductive structure. A second insulative structure is over the second conductive structure and within the ferroelectric structure. A pair of source/drain regions are adjacent an upper region of the first insulative structure and are on opposing sides of the first insulative structure from one another.

Abstract: A supercontinuum optical source comprises a laser source apparatus comprising at least one laser, the laser source apparatus configured for providing first and second signals; a modulator apparatus downstream of at least one laser of the laser source apparatus for modulating at least one of the first and second signals, the modulator apparatus including at least one modulator; a combiner downstream of the modulator apparatus for combining the first and second signals; an amplifier downstream of the combiner for amplifying the first and second signals after combination; a nonlinear element downstream of the amplifier for receiving the first and second signals after amplification, the nonlinear optical element providing spectral broadening responsive to the first signal and wherein the second signal does not substantially contribute to spectral broadening; and an output for outputting spectrally broadened light from the optical supercontinuum source.

Abstract: An LED epitaxial structure includes a substrate, a buffer layer and an epitaxial layer. The buffer layer is grown on a top surface of the substrate, and the epitaxial layer is formed on a surface of the buffer layer. The epitaxial layer has a first n-type epitaxial layer and a second n-type epitaxial layer. The first n-type epitaxial layer is formed between the buffer layer and the second n-type epitaxial layer. The first n-type epitaxial layer has a plurality of irregular holes therein. The first n-type epitaxial layer has a doping concentration which varies along a thickness direction of the first n-type epitaxial layer.

Abstract: A method for producing a semiconductor component includes providing a semiconductor body with a first surface and a second surface opposite the first surface, forming an insulation trench which extends into the semiconductor body from the first surface and which in a horizontal plane of the semiconductor body has a geometry such that the insulation trench defines a via region of the semiconductor body, forming a first insulation layer on one or more sidewalls of the insulation trench, removing semiconductor material of the semiconductor body from the second surface to expose at least parts of the first insulation layer, to remove at least parts of the first insulation layer, or to leave at least partially a semiconductor layer with a thickness of less than 1 ?m between the first insulation layer and the second surface, and forming first and second contact electrodes on the via region.

Abstract: A wafer level package having a pressure sensor and a fabrication method thereof are provided. A wafer having the pressure sensor is bonded to a lid, and electrical connecting pads are formed on the wafer. After the lid is cut, wire-bonding and packaging processes are performed. Ends of bonding wires are exposed and serve as an electrical connecting path. A bottom opening is formed on a bottom surface of the wafer, in order to form a pressure sensor path.

Abstract: A field effect transistor includes a semiconductor substrate having a protrusion with at least one inclined surface, a gate insulator disposed at least on a portion of the inclined surface, and a gate conductor disposed on the gate insulator, wherein the semiconductor substrate comprises doped regions sandwiching a channel region, wherein the at least one inclined surface has a first crystal orientation in the channel region, and the inclined surface has an included angle to a vertical plane with a second crystal orientation. The hole mobility and the electron mobility are substantially the same in the channel region having a crystalline orientation off from the (110) crystal orientation.

Abstract: A photoelectrical element comprises: a photoelectric conversion layer; a semiconductor layer formed on the photoelectric conversion layer; a conductive structure formed on the semiconductor layer; and a thermal-electrical structure formed inside the conductive structure, wherein the conductive structure comprises a transparent conductive layer formed on the semiconductor layer and a metal pad formed on the transparent conductive layer; wherein the thermal-electrical structure is formed inside the transparent conductive layer, and/or between the transparent conductive layer and the semiconductor layer, and/or between the transparent conductive layer and the metal pad, and/or inside the transparent conductive layer corresponding to the metal pad.

Abstract: When an end-face-emitting photonic crystal laser element 10 is seen in an X axis, one end of an upper electrode E2 overlaps a laser light exit surface SF, the upper electrode E2 and an opposite end face SB are separated from each other, the upper electrode E2 is separated from both lateral end faces SR, SL, and one end of an active layer 3B overlaps the laser light exit surface SF.

Abstract: A device includes a plurality of intra-device insulation regions having a first height; and a plurality of semiconductor fins horizontally spaced apart from each other by the plurality of intra-device insulation regions. A portion of the plurality of semiconductor fins is disposed above the plurality of intra-device insulation regions. The device further includes a first inter-device insulation region and a second inter-device insulation region with the plurality of semiconductor fins disposed therebetween. The first and the second inter-device insulation regions have a second height greater than the first height.

Abstract: An organic light-emitting display device and a method of manufacturing the same. The organic light-emitting display device has a structure including an organic layer between a pixel electrode and an opposite electrode, the organic layer including a emissive layer and an insulating layer defining a light emission area. Accordingly, the insulating layer included in the organic layer functions as a pixel-defining layer, and thus, “edge open”, which is generated when forming an emissive layer on a thick pixel-defining layer according to the comparable art, may be reduced or prevented.