Abstract: A fin field effect transistor (FET) including a fin structure and a method for forming the fin FET are provided. In an exemplary method, the fin FET can be formed by forming at least one fin seed, including a top surface and sidewalls, on a substrate. A first semiconductor layer can then be formed at least on the sidewalls of the at least one fin seed. A second semiconductor layer can be formed on the first semiconductor layer. The second semiconductor layer and the at least one fin seed can be made of a same material. The first semiconductor layer can be removed to form a fin structure including the at least one fin seed and the second semiconductor layer.

Abstract: A gas laser oscillator including a discharge tube provided in a gas channel through which a laser gas circulates; an output command part outputting a power output command; a power supply part applying to the discharge tube a discharge tube voltage corresponding to a power output command value; a voltage detector detecting the discharge tube voltage; and a discharge start judging part judging if a discharge has been started in the discharge tube based on a ratio of change of the discharge tube voltage. The output command part increases the power output command value in steps by an increment obtained by dividing a power output command value corresponding to a discharge start voltage serving as a predetermined reference by a number of steps of 2 or more, at a step time interval determined by using as a reference the time required until the power supply part responds to the power output command.

Abstract: A laser diode arrangement having at least one semiconductor substrate, having at least two laser stacks each having an active zone and having at least one intermediate layer. The laser stacks and the intermediate layer are grown monolithically on the semiconductor substrate. The intermediate layer is arranged between the laser stacks. The active zone of the first laser stack can be actuated separately from the active zone of the at least one further laser stack.

Abstract: A system and method for triggering data acquisition in a semiconductor laser system including outputting electromagnetic energy from the semiconductor laser over a range of wavelengths according to a signaling path. The signaling path includes a plurality of discrete data inputs to the semiconductor laser for outputting electromagnetic energy over a range of wavelengths and the signaling path includes one or more perturbances in transitioning from one wavelength to another wavelength along the signaling path. A series of triggering signals are generated for input to a measurement system by the semiconductor laser. The electromagnetic energy output from the semiconductor laser is detected based on the series of triggering signals. The detected electromagnetic energy is compared with a valid data vector, wherein the valid data vector includes one or more criteria and/or values that is used to differentiate valid data from invalid data corresponding to the detected electromagnetic energy.

Abstract: A semiconductor substrate can be patterned to define a trench and a feature. In an embodiment, the trench can be formed such that after filling the trench with a material, a bottom portion of the filled trench may be exposed during a substrate thinning operation. In another embodiment, the trench can be filled with a thermal oxide. The feature can have a shape that reduces the likelihood that a distance between the feature and a wall of the trench will be changed during subsequent processing. A structure can be at least partly formed within the trench, wherein the structure can have a relatively large area by taking advantage of the depth of the trench. The structure can be useful for making electronic components, such as passive components and through-substrate vias. The process sequence to define the trenches and form the structures can be tailored for many different process flows.

Abstract: An integrated circuit structure includes a semiconductor substrate, and a first metal layer over the semiconductor substrate. The first metal layer has a first minimum pitch. A second metal layer is over the first metal layer. The second metal layer has a second minimum pitch smaller than the first minimum pitch.

Abstract: A method is provided for fabricating a fin field-effect transistor. The method includes providing a semiconductor substrate, and forming a plurality of fins with hard mask layers and an isolation structure. The process also includes forming a first dummy gate layer on the fins and the isolation structure, and polishing the first dummy gate layer until the hard mask layer is exposed. Further, the method includes removing the hard mask layer to expose a top surface of the fins, and forming a second dummy gate material layer on the first dummy gate material layer. Further, the method also includes etching the second dummy gate layer and the first dummy gate layer to form a dummy gate on each of the fins.

Abstract: Various embodiments of the invention relate to a CMOS device having (1) an NMOS channel of silicon material selectively deposited on a first area of a graded silicon germanium substrate such that the selectively deposited silicon material experiences a tensile strain caused by the lattice spacing of the silicon material being smaller than the lattice spacing of the graded silicon germanium substrate material at the first area, and (2) a PMOS channel of silicon germanium material selectively deposited on a second area of the substrate such that the selectively deposited silicon germanium material experiences a compressive strain caused by the lattice spacing of the selectively deposited silicon germanium material being larger than the lattice spacing of the graded silicon germanium substrate material at the second area.

Abstract: A semiconductor device includes an IGBT having a semiconductor body including a transistor cell array in a first area. A junction termination structure is in a second area surrounding the transistor cell array at a first side of the semiconductor body. An emitter region of a first conductivity type is at a second side of the semiconductor body opposite the first side. The device further includes a diode. One of the diode anode and cathode includes the body region. The other one of the anode and the cathode includes a plurality of distinct first emitter short regions of a second conductivity type at the second side facing the transistor cell array, and at least one second emitter short region of the second conductivity type at the second side facing the junction termination structure. The at least one second emitter short region is distinct from the first emitter short regions.

Abstract: Angled directional ion beams are directed to sidewalls of a gate structure that straddles at least one semiconductor fin. The directions of the angled directional ion beams are contained within a vertical plane that is parallel to the sidewalls of the at least one semiconductor. A pair of gate spacers are formed on sidewalls of the gate structure by accumulation of the deposited dielectric material from the angled directional ion beams and without use of an anisotropic etch, while the sidewalls of the semiconductor fins parallel to the directional ion beams remain physically exposed. A selective epitaxy process can be performed to form raised active regions by growing a semiconductor material from the sidewalls of the semiconductor fins.

Abstract: Apparatus, systems, and methods using an optically pumped gas filled hollow fiber laser can be implemented in a variety of applications. In various embodiments, operation of an optically pumped gas filled hollow fiber laser is based on population inversion in the gas. Additional apparatus, systems, and methods are disclosed.

Abstract: A semiconductor device includes a substrate having a first side and a second side such that the first and second sides face each other, a through via plug penetrating the substrate, an insulating film liner, and an antipollution film. The insulating film liner is between the through via plug and the substrate and the insulating film liner has a recessed surface with respect to the second side. The antipollution film covers the second side and the antipollution film is on the recessed surface and between the through via plug and the substrate.

Abstract: A display device includes an electrode layer formed at a predetermined position on a substrate, an insulating film having a through-hole formed on the top of the electrode layer, and a wiring film connected to the electrode layer via the through-hole formed in the insulating film. Based on a surface of the substrate, the through-hole includes a first taper portion having a first taper angle, a second taper portion formed higher than the first taper portion and having a second taper angle different from the first taper angle, and a third taper portion formed higher than the second taper portion and having a third taper angle different from the second taper angle.

Abstract: Methods and apparatuses are disclosed for forming a post-passivation interconnect (PPI) guard ring over a circuit in a wafer forming a wafer level package (WLP). A circuit device comprises a guard ring and an active area. A passivation layer is formed on top of the circuit device over the guard ring and the active area, wherein the passivation layer contains a passivation contact connected to the guard ring. A first polymer layer is formed over the passivation layer. A PPI opening is formed within the first polymer layer or within the passivation layer over the passivation contact. A PPI guard ring is formed filling the PPI opening in touch with the passivation contact and extending on top of the first polymer layer or the passivation layer.

Abstract: Disclosed herein are various methods of forming replacement gate structures with a recessed channel region. In one example, the method includes forming a sacrificial gate structure above a semiconducting substrate, removing the sacrificial gate structure to thereby define an initial gate opening having sidewalls and to expose a surface of the substrate and performing an etching process on the exposed surface of the substrate to define a recessed channel in the substrate. The method includes the additional steps of forming a sidewall spacer within the initial gate opening on the sidewalls of the initial gate opening to thereby define a final gate opening and forming a replacement gate structure in the final gate opening.

Abstract: An optical device includes a plate-like optical element made of a calcium fluoride crystal, a holding member to sandwich and hold the optical element, a seal member provided between the holding member and one surface of the optical element in close contact therewith, and a cushioning member provided between the holding member and the other surface of the optical element in contact therewith. The cushioning member is made of one of a 304 stainless steel, a 303 stainless steel, a 316 stainless steel, a Hastelloy™ alloy, a carbon steel for machine construction S45C, and Inconel™.

Abstract: The present invention provides a molded package for a light emitting device including a molded resin and first and second leads, the exposed surface of the first lead having a first and second edge portions opposed to each other so as to put a mounting area therebetween in a first direction, the first and second edge portions respectively having one first cutout and second cutouts, the mounting area having a size not less than a distance between the first and the second cutouts and less than a distance between the first the second edge portions in the first direction.

Abstract: This invention discloses a semiconductor power device formed in a semiconductor substrate. The semiconductor power device further includes a channel stop region near a peripheral of the semiconductor substrate wherein the channel stop region further includes a peripheral terminal of a diode corresponding with another terminal of the diode laterally opposite from the peripheral terminal disposed on an active area of the semiconductor power device. In an embodiment of this invention, the semiconductor power device is an insulated gate bipolar transistor (IGBT).

Abstract: A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer if formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

Abstract: Provided are a user-selectable laser and an optical transmitter including the same. The user-selectable laser is an external cavity laser including a semiconductor laser diode for outputting an optical signal, and a wavelength selection filter. The user-selectable laser may allow a user to select a wavelength selection filter which is optically coupled with the semiconductor laser diode and selectively causes oscillation at the wavelength of an optical signal output from the semiconductor laser diode.