Patents Examined by Craig S Goldschmidt
  • Patent number: 11144222
    Abstract: A method, computer program product, and computing system for partitioning an address space of a storage object of a log-structured file system into a plurality of slices, wherein the log-structured file system includes a plurality of storage objects in a plurality of storage tiers. One or more physical data blocks of the storage object may be allocated to each of the plurality of slices. A read temperature associated with at least one slice of the plurality of slices may be determined. A read temperature associated with each physical data block allocated to the at least one slice may be determined. At least one physical data block allocated to the at least one slice may be retiered between the plurality of storage tiers based upon, at least in part, the read temperature associated with each physical data block of the one or more physical data blocks allocated to the at least one slice.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: October 12, 2021
    Assignee: EMC IP Holding Company, LLC
    Inventors: Nickolay Dalmatov, Kirill Bezugly
  • Patent number: 11144467
    Abstract: Embodiments of the present disclosure relate to an apparatus, comprising a first memory controller, to receive a signal from a component coupled with the first memory controller, where the signal indicates that data is to bypass a volatile memory device coupled with the first memory controller and be written to a byte-addressable write-in-place persistent memory device coupled with the first memory controller; determine, in response to the received signal, whether a write buffer in a second memory controller, coupled with the first memory controller, is empty; direct, if the write buffer is empty, the data to the write buffer for temporary storage prior to storage in the persistent memory device, to bypass the volatile memory device; and direct, if the write buffer is not empty, the data to the volatile memory device.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: October 12, 2021
    Assignee: Intel Corporation
    Inventors: Yanru Li, Ali Taha, Chia-Hung S. Kuo
  • Patent number: 11144220
    Abstract: Affinity sensitive storage of data corresponding to a doubly mapped redundant array of independent nodes, e.g., a doubly mapped cluster, in a real storage system, e.g., a real cluster, is disclosed. Different mappings of data to a doubly mapped cluster corresponding to real cluster storage locations can result in different levels of affinity between real disks and/or real nodes of the real cluster. A data storage scheme can be selected based on disk affinity scores and node affinity scores to provide access to stored data that can be more resilient against a real disk and/or a real node becoming less accessible. Further, data recovery from a real disk/node that has become less accessible can be improved where data is stored based on the disclosed disk affinity scores and/or node affinity scores.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: October 12, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Mikhail Danilov, Yohannes Altaye
  • Patent number: 11137918
    Abstract: Dynamically managing control information in a storage device, including: querying, by an array management module executing on a storage array controller, the storage device for a location of control information for the storage device, the control information describing the state of one or more memory blocks in the storage device; and issuing, by the array management module in dependence upon the location of the control information for the storage device, a request to retrieve the control information for the storage device.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: October 5, 2021
    Assignee: Pure Storage, Inc.
    Inventor: Eric D. Seppanen
  • Patent number: 11137919
    Abstract: Disclosed are devices, method and/or systems for responding to a request for accessing a portion of a memory prior to completion of a requested operation to place the portion of the memory in an initialized state. In one example implementation, a memory controller may delay initiation of a write operation addressed to a particular portion of the memory until completion of a pending request to initialize the particular portion of the memory. In another example implementation, a memory controller may return values to service a request for a read operation comprising values representing an initialized state without accessing the particular portion of the memory responsive to a presence of a pending request to initialize the particular portion of the memory.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: October 5, 2021
    Assignee: ARM Ltd.
    Inventors: Wei Wang, Wendy Arnott Elsasser, Stephan Diestelhorst
  • Patent number: 11138125
    Abstract: A method for controlling a cache comprising receiving a request for data and determining whether the requested data is present in a first portion of the cache, a second portion of cache, or not in the cache. If the requested data is not located in the MRU portion of the cache, moving the data into the first portion of the cache.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: October 5, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventor: Shih-Lien Linus Lu
  • Patent number: 11137936
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for processing data on a memory controller. One of the methods comprises obtaining a first request and a second request to access respective data corresponding to the first and second requests at a first memory device of the plurality of memory devices; and initiating interleaved processing of the respective data; receiving an indication to stop processing requests to access data at the first memory device and to initiate processing requests to access data at a second memory device, determining that the respective data corresponding to the first and second requests have not yet been fully processed at the time of receiving the indication, and in response, storing, in memory accessible to the memory controller, data corresponding to the requests which have not yet been fully processed.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: October 5, 2021
    Assignee: Google LLC
    Inventors: Amin Farmahini, Benjamin Steel Gelb, Gurushankar Rajamani, Sukalpa Biswas
  • Patent number: 11137940
    Abstract: A capacity control module which manages a physical storage area provided by each of storage devices in a cluster by dividing the physical storage area into a physical storage area having a predetermined size, in a plurality of storage nodes configuring a storage system, and, a storage control module which receives an I/O request from a higher-level device are provided, two storage control modules, which are arranged in different storage nodes and configure a redundancy configuration, are managed as a storage control module pair, the capacity control module preferentially allocates each of the physical storage areas in the vicinity of an arrangement destination of each of the storage control modules configuring the storage control module pair, to the storage control module pair, and storage data is read from or is written on the physical storage area, according to a command applied from the storage control module.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: October 5, 2021
    Assignee: Hitachi, Ltd.
    Inventors: Shintaro Ito, Yuko Matsui, Masakuni Agetsuma, Hideo Saito, Takeru Chiba, Takahiro Yamamoto
  • Patent number: 11138101
    Abstract: Systems, apparatuses and methods may provide for detecting an issued request in a queue that is shared by a plurality of domains in a memory architecture, wherein the plurality of domains are associated with non-uniform access latencies. Additionally, a destination domain associated with the issued request may be determined. Moreover, a first set of additional requests may be prevented from being issued to the queue if the issued request satisfies an overrepresentation condition with respect to the destination domain and the first set of additional requests are associated with the destination domain. In one example, a second set of additional requests are permitted to be issued to the queue while the first set of additional requests are prevented from being issued to the queue, wherein the second set of additional requests are associated with one or more remaining domains in the plurality of domains.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: October 5, 2021
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, Thomas Willhalm, Raj K. Ramanujan, Brian J. Slechta
  • Patent number: 11137923
    Abstract: One embodiment facilitates thin-provisioning in a distributed storage system. During operation, the system receives, by a first network switch, data to be written to a storage component of the first network switch. The system writes, by the first network switch, the data to the storage component. The system performs, by an integrated circuit residing on the first network switch, a data reduction process which reduces a size of the data to obtain reduced data. The system encodes, by the integrated circuit, the reduced data based on an encoding mechanism to obtain encoded data, wherein the encoded data can be written to non-volatile memory of one or more storage devices.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: October 5, 2021
    Assignee: ALIBABA GROUP HOLDING LIMITED
    Inventor: Shu Li
  • Patent number: 11138131
    Abstract: Techniques are provided to adjust the behavior of a cache based on a count of cache misses for items recently evicted. In an embodiment, a computer responds to evicting a particular item (PI) from a cache by storing a metadata entry for the PI into memory. In response to a cache miss for the PI, the computer detects whether or not the metadata entry for the PI resides in memory. When the metadata entry for the PI is detected in memory, the computer increments a victim hit counter (VHC) that may be used to calculate how much avoidable thrashing is the cache experiencing, which is how much thrashing would be reduced if the cache were expanded. Either immediately or arbitrarily later, the computer adjusts a policy of the cache based on the VHC's value. For example, the computer may adjust the capacity of the cache based on the VHC.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: October 5, 2021
    Assignee: Oracle International Corporation
    Inventors: Justin Matthew Lewis, Zuoyu Tao, Jia Shi, Kothanda Umamageswaran
  • Patent number: 11137927
    Abstract: Methods, computing systems and computer program products implement embodiments of the present invention that include defining multiple storage capabilities for a set of storage resources in multiple storage systems, the storage resources including storage space, and identifying two of the storage systems including one or more storage capabilities required by a first logical volume. A first given identified storage system is configured to store the first logical volume, and a second given identified storage system is configured to store a second logical volume, the second given storage system different from the first given storage system. Upon storing data to the first logical volume, the data can be mirrored to the second logical volume. In some embodiments, a software defined storage system can be configured including defined services, wherein the first given storage system includes a first given service, and wherein the second given storage system includes a second given service.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: October 5, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Miron Aloni, Ohad Atia, Amelia Avraham, Shay Berman, Ran Harel, Erez A. Theodorou
  • Patent number: 11137924
    Abstract: Techniques are disclosed for providing a distributed file storage system that permits containerized applications running in distinct container hosts to read/write to the same storage volume. In one embodiment, a file sharing volume service is configured to use a container orchestrator to start a respective file server for each shared storage volume mounted for use by user-level containerized application(s). The file sharing volume service further manages the file server by creating and updating a metadata entry that specifies (1) a count of a number of times the shared storage volume has been mounted for use, and (2) a port number exposed for use in mounting path(s) to access the shared storage volume. Upon receiving a request to run a containerized application with the shared storage volume, the file sharing volume service updates the metadata entry to increase the count, and retrieves and uses the port number to mount path(s) for accessing the shared storage volume.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: October 5, 2021
    Assignee: VMware, Inc.
    Inventors: Mark Sterin, Prashant Dhamdhere, Miao Luo, Shivanshu Goswami, Tushar Thole
  • Patent number: 11137945
    Abstract: A logical unit of non-volatile data storage is provided for persistently storing metadata. The logical unit is provided by allocating RAID (Redundant Array of Independent Disks) extents to the logical unit, and allocating logical block addresses for the logical unit from within a logical address space of the logical unit to store blocks of metadata written to the logical unit. In response to detecting that a stored indication of a last allocated logical block address for the logical unit has been lost, two RAID extents that were last allocated to the logical unit are identified, and a binary search is performed across logical block addresses within the two RAID extents that were last allocated to the logical unit to locate the last allocated logical block address for the logical unit within the logical address space of the logical unit.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: October 5, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Vamsi K. Vankamamidi, Philippe Armangau, Ashok Tamilarasan, Geng Han
  • Patent number: 11137929
    Abstract: An apparatus is configured to initiate a first replication session to replicate data of a first consistency group in a first storage system to a second consistency group in a second storage system, to create an additional consistency group linked to the second consistency group in the second storage system, and to initiate a second replication session to replicate data of the additional consistency group to another consistency group in a third storage system. The additional consistency group linked to the second consistency group in some embodiments is periodically updated against the second consistency group. For example, in one or more embodiments the second consistency group is updated based at least in part on an active snapshot set of the first replication session, and the additional consistency group is updated based at least in part on the second consistency group.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: October 5, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Xiangping Chen, Aharon Blitzer
  • Patent number: 10976945
    Abstract: Methods, systems, and apparatuses related to memory operation with multiple sets of latencies are disclosed. A memory device or system that includes a memory device may be operable with one or several sets of latencies (e.g., read, write, or write recovery latencies), and the memory device or system may apply a set of latencies depending on which features of the memory device are enabled. For example, control circuitry may be configured to enable one or more features during operations on a memory array, and the control circuitry may apply a set of latency values based on a number or type of features that are enabled. The sets of latency values may depend, for example, on whether various control features (e.g., dynamic voltage frequency scaling) are enabled, and a device may operate within certain frequency ranges irrespective of other characteristics (e.g., mode register values) or latencies applied.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: April 13, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Dean D. Gans, Yoshiro Riho, Shunichi Saito, Osamu Nagashima
  • Patent number: 10976933
    Abstract: Provided are a storage device, a storage system, and a method of operating the same. A storage device communicably connected to a host may include a non-volatile memory configured to store at least one piece of boot data necessary for booting the storage device; and a device controller configured to receive an interface initialize command (IFIC) from the host, predict requested boot data requested by the host from among the at least one piece of boot data based on the IFIC, and control the non-volatile memory to read the requested boot data.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: April 13, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-min Lee, Sung-ho Seo, Hwa-seok Oh, Kyung-phil Yoo, Seong-yong Jang
  • Patent number: 10956063
    Abstract: A virtual storage system according to an aspect of the present invention includes multiple storage systems each including: a storage controller that accepts a read/write request for reading or writing from and to a logical volume; and multiple storage devices. The storage system defines a pool that manages the storage device capable of allocating any of storage areas to the logical volume, and manages the capacity (pool capacity) of the storage areas belonging to the pool, and the capacity (pool available capacity) of unused storage areas in the pool. Furthermore, the storage system calculates the total value of the pool available capacities of the storage systems included in the virtual storage system, and provides the server with the total value as the pool available capacity of the virtual storage system.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: March 23, 2021
    Assignee: HITACHI, LTD.
    Inventors: Akira Yamamoto, Hiroaki Akutsu, Tomohiro Kawaguchi
  • Patent number: 10956074
    Abstract: A data storage method is provided according to an exemplary embodiment of the disclosure. The method is configured for a rewritable non-volatile memory module. The method includes: performing a data merge operation; adjusting a data receiving amount per unit time for receiving to-be-written data from a host system according to a data storage state of the rewritable non-volatile memory module; storing the received to-be-written data into a buffer memory during the data merge operation being performed; and storing the data stored in the buffer memory into the rewritable non-volatile memory module.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: March 23, 2021
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Shao-Hsien Liu, Chien-Han Kuo
  • Patent number: 10956370
    Abstract: Techniques for data processing a data set may comprise: performing first processing that forms a first compression unit, wherein the first compression unit includes a data chunks including a first data chunk having a first entropy value less than an entropy threshold, the first processing including: receiving a second data chunk; determining, in accordance with criteria, whether to add the second data chunk to the first compression unit; and responsive to determining to add the second data chunk to the first compression unit, adding the second data chunk to the first compression unit; and compressing the first compression unit as a single compressible unit. The second chunk may be added if its entropy value is less than the entropy threshold and if entropy values of the first and second chunks are similar. The second chunk may be added if the resulting compression unit provides sufficient storage/compression benefit.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: March 23, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Ivan Bassov, Sorin Faibish, Istvan Gonczi