Patents Examined by Dan Fiul
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Patent number: 5987236Abstract: A method for obtaining a solution for a structure to be analyzed is disclosed. The method operates by dividing the structure into two or more substructures, and preparing at least two different calculation techniques for calculating a solution for each of the substructures from boundary conditions. One of the calculation techniques is selected separately for each of the substructures according to characteristics of analysis conditions corresponding to each of the substructures. A solution is separately calculated for each of the substructures according to boundary conditions by using the selected calculation technique, until the solutions for all of the substructures fall within respective ranges that are predetermined in accordance with each of the substructures. The set of solutions for the substructures is then used as the solution for the structure. A corresponding system and computer program are also disclosed.Type: GrantFiled: November 22, 1995Date of Patent: November 16, 1999Assignee: Canon Kabushiki KaishaInventor: Ko Yoneda
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Patent number: 5983011Abstract: In order to simulate, using a computer, a profile of sputter deposition on a contact hole formed on a semiconductor wafer, a plurality of trajectories of particles emitted from a sputter target are calculated. One of the trajectories is directed to a first coordinate point which is included in the profile of sputter deposition and with which an amount of sputter deposition is calculated. Thereafter, a plurality of shadow judgment planes are successively defined with respect to all coordinate points, after which a check is made to determine if the above mentioned one of the plurality of trajectories crosses each of said plurality of shadow judgment planes.Type: GrantFiled: September 2, 1997Date of Patent: November 9, 1999Assignee: NEC CorporationInventors: Hiroaki Yamada, Toshiyuki Ohta
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Patent number: 5978575Abstract: A remote terminal emulator (RTE) is provided in which substantially all of the time elapsing during an emulated use of a computer system under test is categorized and reported. The time required by the computer system under test to respond to command signals transmitted by the RTE is recorded as a receive time and is measured from completion of the transmission of the command signals to recognition of a pattern specified by the RTE as signifying completion of the response by the computer system under test. As a result, the receive time recorded reflects the time required by the computer system under test to (a) process and carry out the command transmitted by the RTE and (b) transmit response data back to the RTE.Type: GrantFiled: July 7, 1995Date of Patent: November 2, 1999Assignee: Sun Microsystems, Inc.Inventor: Allan N. Packer
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Patent number: 5974241Abstract: A method for simulating an integrated circuit design that automatically generates an interface between a test bench and a device design for simulation. The method determines that the signal format and timing information of the test bench conforms to the constraints of some target ATE. If the information conforms, an array of buffers is created to provide the interface. Each of the buffers are defined according to the signal timing information. The interface is then incorporated into a test bench stimuli generator and the design is simulated. In this manner, the method allows for the generation of a simulation that can be then reproduced on any target ATE.Type: GrantFiled: June 17, 1997Date of Patent: October 26, 1999Assignee: LSI Logic CorporationInventor: Gene T. Fusco
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Patent number: 5966515Abstract: A system and method for emulating a target system's hardware using highly parallel software emulation. Target system hardware under the control of program instructions is emulated using parallel software activity routines. Each of the program instructions is sequentially provided to a series of the activity routines, where each activity routine is a stage of a software emulation pipeline. Each activity routine emulates a particular function designated by the particular program instruction of the target system. The information is forwarded from each of the stages of the series of activity routines to their successive stages in the series. Each stage forwards its associated information to its respective successive stage when the stage has completed its designated activity, and has recognized that its respective successive stage has completed its respective function and is ready to accept more information.Type: GrantFiled: December 31, 1996Date of Patent: October 12, 1999Assignee: Unisys CorporationInventor: Merwin Herscher Alferness
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Patent number: 5966526Abstract: With a purpose of providing a simulation device for fostering a virtual creature where a virtual creature is grown while disciplining or training the virtual creature when a player conducts a corresponding treatment in response to a call or a request from the virtual creature in a screen, the device is provided with mark display units displaying a plurality of kinds of treatments in respect of fostering the virtual creature individually by marks and key switches for inputting a corresponding treatment by selecting a specific mark from the plurality of marks, is provided with a storing unit for storing control data in respect of fostering the virtual creature, a control unit reading corresponding control data from the storing unit when the treatment in respect of fostering the virtual creature is inputted by operating the key switches and conducting control processing in respect of fostering the virtual creature based on the read control data and is provided with a display unit for displaying the fostered virtType: GrantFiled: June 11, 1997Date of Patent: October 12, 1999Assignees: Kabushiki Kaisha Bandai, Kabushiki Kaisha WizInventor: Akihiro Yokoi
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Patent number: 5963734Abstract: Method and apparatus for performing point to point verification of devices in a SCADA system are provided. An intelligent electronic device (IED), having two modes of operation--normal and simulation--provides simulated IED data to a SCADA device on command. The IED is capable of continuing to perform its normal functions of monitoring a process under control during the simulation mode. The IED accepts simulation data either locally through a user interface or from a SCADA device over/through a communication port. The simulation data is then stored in a memory area of the IED. During simulation mode, the IED does not update the memory area but rather provides data from this area to a SCADA device on command.Type: GrantFiled: April 3, 1997Date of Patent: October 5, 1999Assignee: ABB Power T&D Company Inc.Inventors: William J. Ackerman, Steven A. Kunsman
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Patent number: 5963724Abstract: The Model Editor (106) makes simulation modeling easier and more intuitive by extracting essential information and presenting it to the user, and by providing tools to investigate simulation and model robustness, in an interactive, graphical environment. Using the model editor, the user enters relationships or formulas in the equation editor (200), enters symbols in the topology editor (202), and interconnects them (1804). Relationships can be hidden for screen efficiency (1806). Selecting a symbol highlights the corresponding relationships in the equation editor through cross-coupling, and conversely selecting an equation or instance highlights the corresponding symbol in the topology editor (1808). The model editor includes parameter management tools (206) to manage equation parameters. Models or portions thereof that are reused donate the parameter management data to the new model (1810). Following editing and parameter management, the user can perform model robustness and verification.Type: GrantFiled: February 16, 1996Date of Patent: October 5, 1999Assignee: Analogy, Inc.Inventors: H. Alan Mantooth, Christopher M. Wolff
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Patent number: 5960190Abstract: An ICE system for emulating a device includes an EPROM storing control code, at least one RAM storing user code and data, a processor alternatively executing the control code and user code, and memory map switch logic dynamically switching the memory address map of the processor between monitor and user state configurations so as to minimally impact the target environment by maximizing the available memory address space for the user code and data when the processor is executing the user code.Type: GrantFiled: February 12, 1997Date of Patent: September 28, 1999Assignee: Zilog, Inc.Inventor: Craig MacKenna
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Patent number: 5946482Abstract: The present disclosure provides a method and apparatus for using frequency domain data, such as S-parameters, in a time-based simulator. S-parameters are either input to the simulator, or are empirically measured, at selected frequencies. Preferably, the selected frequencies are related to one another by a logarithmic scale, providing for determination of a system transfer function which is accurate across a very wide range of frequencies, from near zero hertz, to frequencies on the order of a hundred gigahertz. The transfer function preferably takes the form of a fitted polynomial, obtained using FDSI techniques. In addition, recursive convolution may be employed to operate in the time domain on inverse Laplace Transforms of the fitted transfer function and time-domain simulator test signals.Type: GrantFiled: May 16, 1997Date of Patent: August 31, 1999Assignee: Hewlett-Packard CompanyInventors: Lee A. Barford, Norman H. Chang, Boris Troyanovsky
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Patent number: 5937184Abstract: A synthesis method allows a designer to choose hardware or software for critical and noncritical paths in an application specific subsystem implementation. From an abstract specification, a method is synthesized choosing the most efficient paths, hardware or software, in terms of performance and cost. In its design, a software path may be chosen when most efficient and a hardware path when most efficient, creating a hybrid design.Type: GrantFiled: April 1, 1996Date of Patent: August 10, 1999Assignee: International Business Machines CorporationInventor: Sreenivasa Devarakonda Rao
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Patent number: 5937180Abstract: An integrated circuit which can function in a number of different operating modes is set to a setting mode by a control signal on the control signal input. The circuit includes a signal sequence generator which in the setting mode generates setting signal sequences on four of the address connections of the circuit. An operating mode is selected by coupling one of the address connections with a setting signal input on a signal sequence detector in the circuit. The signal sequence detector interprets the setting signal sequence from the signal sequence generator and sets control outputs, on the signal sequence detector to different combinations of "low" and "high" signal levels respectively in dependence on the sequence received in the detector, whereafter the circuit switches to an operating mode in which the address conductors forward signals in accordance with the operating mode.Type: GrantFiled: December 20, 1996Date of Patent: August 10, 1999Assignee: Telefonaktiebolaget LM EricssonInventor: Dan Lindqvist
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Patent number: 5926401Abstract: A weather effects generator that generates weather data based on real-world weather data, and provides this data to a host simulator. The type of data provided and the spatial distribution of the data depend on the type of simulation. A real world database is accessed to obtain a dataspace of weather data elements, each having a location parameter and various weather-related parameters. For visual display simulators, the data elements are preprocessed to obtain color, transparency, and texture values for each data element. The preprocessed data elements are further processed to obtain a prioritized display list of those data elements that correspond to field-of-view data provided by the simulator. Each data element in this list is assigned a graphics primitive that can be rasterized in accordance with the color and transparency values. Simulators other than visual display simulators provide location data and receive data representing the weather effects at that location.Type: GrantFiled: January 28, 1997Date of Patent: July 20, 1999Assignee: Southwest Research InstituteInventors: Bruce C. Montag, Dennis J. Wenzel, Richard P. Weyrauch
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Patent number: 5919242Abstract: A prescription farming control system includes a navigation controller and a product delivery controller for controlling the rate of operation of a number of agricultural product delivery mechanisms mounted on an applicator vehicle as a function of the global position of the vehicle in an agricultural field. Information is stored in computer memory on board the vehicle to define a number of layers corresponding to each of the delivery mechanisms, each layer including a number of zones representing different levels of activity of the corresponding mechanism. Each zone is defined by a plurality of vertices, rather than on a pixel-by-pixel basis. The navigation controller receives satellite positioning data to combine with pseudorange correction data received from a fixed ground station to determine a corrected accurate global position of the vehicle. A graphics coprocessor includes active invisible graphics memory page onto which each layer is sequentially drawn and interrogated.Type: GrantFiled: May 14, 1992Date of Patent: July 6, 1999Assignee: Agri-line Innovations, Inc.Inventors: Martin W. Greatline, Stanley E. Greatline
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Patent number: 5918036Abstract: The invention provides a simulation method of a silicide reaction for use with production of semiconductor devices which sufficiently verifies production of silicide of a high resistance value. In the simulation method, a high melting point metal having a first film thickness is attached to a silicon layer having a first width and heat treatment of the high melting point metal and the silicon layer is performed, and then, a minimum value of the first width with which a silicide reaction of the high melting point metal is not suppressed. Thereafter, a yield strength of the high melting point metal with the first film thickness is calculated, and then, and a silicide reaction force at an interface between the high melting point metal and the silicon is calculated from the yield strength and the minimum value of the first width.Type: GrantFiled: May 13, 1997Date of Patent: June 29, 1999Assignee: NEC CorporationInventor: Yoshihisa Matsubara
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Patent number: 5907830Abstract: An electronic coupon distribution system providing on-line coupon information for a potential consumer using a personal computer connected to a host computer. A potential consumer using a personal computer and a modem connects to a host computer via the Internet or directly. The potential consumer may specify product preferences or search and view coupons of interest to the consumer. The consumer may then download from the host computer coupon information that may be printed on the potential consumer's printer connected to his personal computer. Information identifying the downloaded coupon is coded or encrypted onto the printed coupon to prevent unauthorized reproduction. The coupon distribution system may be used to obtain additional information about the potential consumer for future marketing purposes. The present invention greatly facilitates and makes economical distribution of coupons or certificates.Type: GrantFiled: February 13, 1996Date of Patent: May 25, 1999Inventors: Peter Engel, Andrew Engel
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Patent number: 5905657Abstract: A method, computer system, and computer program for simulation based interpretation of geological data stored in a geoscience model. Data is acquired and interpreted to produce a geoscience model. A simulator is applied to a simulation input model to produce synthetic data. The synthetic data is compared to the acquired data, which was used to build the geoscience model. The geoscience model is edited to reduce the difference between the acquired data and the synthetic data.Type: GrantFiled: December 19, 1996Date of Patent: May 18, 1999Assignee: Schlumberger Technology CorporationInventor: George William Celniker
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Patent number: 5903477Abstract: A simulation apparatus, using the moment method and at high speed, simulates the intensity of an electromagnetic field, etc. of a time domain. A transforming unit obtains a frequency spectrum by segmenting time series data of a wave source and applying a Fourier transform thereto. A calculating unit calculates the mutual impedance at a sampling frequency, generates an approximate expression of the mutual impedance from the calculated mutual impedance and the sampling frequency and calculates the mutual impedance at respective frequencies obtained by the transforming unit by using the generated approximate expression. A simulating unit finds a current spectrum flowing in each element, according to the moment method, from the mutual impedance calculated by the calculating unit and the frequency spectrum obtained by the transforming unit and finds the spectrum of a voltage, an electric field, and a magnetic field from the found current spectrum.Type: GrantFiled: February 19, 1997Date of Patent: May 11, 1999Assignee: Fujitsu LimitedInventors: Shinichi Otsu, Makoto Mukai
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Patent number: 5894565Abstract: A field programmable gate array has a matrix of programmable logic cells and a bus network of local and express bus lines. The bus network effectively partitions the matrix into blocks of cells with each block having its own distinct set of local bus lines. Express bus lines extend across more than one block of cells by means of repeater switch units that also connect local bus lines to express bus lines. The grouping of cells into blocks with repeaters aligned in rows and columns at the borders between blocks creates spaces at the corners of blocks that can be filled with RAM blocks, other memory structures, specialized logic structures or other dedicated function elements that are connected to the bus network. The RAM blocks can be single or dual port SRAM addressed through the bus lines. Pairs of adjacent columns of RAM blocks may be commonly addressed by the same set of bus lines. Other specialized or dedicated logic might also fill those corner spaces.Type: GrantFiled: May 20, 1996Date of Patent: April 13, 1999Assignee: Atmel CorporationInventors: Frederick C. Furtek, Martin T. Mason, Robert B. Luking
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Patent number: 5893074Abstract: An schedule-control method for managing and controlling projects is described. The method is implemented on components including an electronic user interface, relational database, and computational component. These components are designed to process input data in a well-defined format called a receivable/deliverable (rec/del) format. Using this format, the project is broken down into a series of smaller components or "tasks". Each task involves a contract between a supplier and a receiver, and results in the production of a "product". Suppliers and receivers can enter up-to-the-minute input data in the rec/del format concerning a particular product. Input data are entered through the electronic user interface which can be e-mail or a user-interface computer program. Data are entered into tables of the relational database in the rec/del format. The input data are then rapidly processed with the computational component to generate output data indicating the status of the project.Type: GrantFiled: January 29, 1996Date of Patent: April 6, 1999Assignee: California Institute of TechnologyInventors: Michael Hughes, Glen Gira, Reed Wilcox