Abstract: A synchronous input/output (I/O) computing system includes a processor and a memory unit that stores program instructions. The system purges one or more address translation entries in response to the processor executing the program instructions to issue, via an operating system running on the synchronous I/O computing system, a synchronous I/O command indicating a request to perform a transaction. The program instructions further command the operating system to select a device table entry from a device table, load the entry into the DTC, request required address translation entries, install the required address translation entries in the address translation cache, and transfer data packets corresponding to the transaction. The program instructions further command the operating system to automatically purge the address translation cache entries associated with a transaction in response to detect that the transaction is completed.

Abstract: A processor includes a decode unit to decode a memory copy instruction that indicates a start of a source memory operand, a start of a destination memory operand, and an initial amount of data to be copied from the source memory operand to the destination memory operand. An execution unit, in response to the memory copy instruction, is to copy a first portion of data from the source memory operand to the destination memory operand before an interruption. A descending copy direction is to be used when the source and destination memory operands overlap. In response to the interruption, when the descending copy direction is used, the execution unit is to store a remaining amount of data to be copied, but is not to indicate a different start of the source memory operand, and is not to indicate a different start of the destination memory operand.

Abstract: A computer-implemented method for managing a memory control unit includes receiving a command at the memory control unit. The command includes a command type that either requires or does not require buffering resources. The method further includes determining, via the memory control unit, a number of available memory tags from a first set of memory tags that are associated with the buffering resources. The method includes determining, via the memory control unit, a number of available memory tags from a second set of memory tags that are not associated with the buffering resources. The method also includes dynamically adjusting, via the memory control unit, assignment of memory tags for use in the second set of memory tags based on the command type, the number of available memory tags from the first set of memory tags, and the number of available memory tags from the second set of memory tags.

Abstract: A storage device includes a nonvolatile memory, a cache memory, and a processor configured to load, from the nonvolatile memory into the cache memory, a fragment of each layer of an address mapping corresponding to a target logical address, and access the nonvolatile memory at a physical address mapped from the target logical address, by referring to the fragments of the layers of the address mapping loaded into the cache memory. The layers are arranged in a hierarchy and each layer of the address mapping except for the lowermost layer indicates correspondence between each of segmented logical address ranges mapped in the layer and a physical location of an immediately-lower layer in which said each segmented logical address range is further mapped in a narrower range. The lowermost layer indicates correspondence between each logical address mapped therein and a physical location of the nonvolatile memory associated therewith.

Abstract: There is disclosed a method performed by a computer system for managing a location of an object in a hierarchical storage that includes a plurality of storage layers. In the method, the computer system receives a selection of one storage layer for storing a selected object from among the plurality of the storage layers via a network connected to the computer system. The computer system also moves the selected object to the one storage layer from other storage layer currently that stores the selected object among the plurality of the storage layers. The computer system further excludes the selected object from targets of a predetermined space management that is being applied to objects in the hierarchical storage.

Abstract: In various embodiments, apparatuses and methods are disclosed to keep a memory clock gated when the data for a current memory address is the same as the data in the immediate previous memory address. For a write function, new data will only be written into the current memory address if it is different from the data in the immediate previous memory address. Similarly, for a read function, the data will only be read out of the current memory address if it is different from the data in the immediate previous memory address. Each row in the memory may have one associated status bit outside the memory. Data may only be written to or read from the current memory address when the status bit is set. Clock gating the memory ports may reduce the overall power consumption of the memory.

Abstract: Various embodiments of the present invention provide a method and apparatus for reusing a storage block of a file system. The file system is based on a thin provision storage configuration and shares a storage pool with a further file system. The method comprises detecting an unused storage block in a storage space of the file system in response to a predefined trigger event. The method further comprises in response to an unused storage block being detected in the storage space, providing the unused storage block to the storage pool for being reused. According to various embodiments of the present invention, effective utilization of the storage space of the storage pool is achieved.

Abstract: Provided are methods and systems for memory decompression using a hardware decompressor that minimizes or eliminates the involvement of software. Custom decompression hardware is added to the memory subsystem, where the decompression hardware handles read accesses caused by, for example, cache misses or requests from devices to compressed memory blocks, by reading a compressed block, decompressing it into an internal buffer, and returning the requested portion of the block. The custom hardware is designed to determine if the block is compressed, and determine the parameters of compression, by checking unused high bits of the physical address of the access. This allows compression to be implemented without additional metadata, because the necessary metadata can be stored in unused bits in the existing page table structures.

Abstract: The present invention provides a method and system for caching time series data. A computer system for caching time series data is disclosed. The computer system comprises one or more processors, at least one cache, and a computer readable storage medium. The computer readable storage medium contains instructions that, when executed by the one or more processors, causes the one or more processors to perform a set of steps comprising fetching the time series data from a time series data source, calculating one or more expiry timestamps, grouping the plurality of time series datum in to one or more time data chunks based on the one or more expiry timestamps, and storing a copy of the time series data and the one or more expiry timestamps in the at least one cache.

Abstract: Providing memory bandwidth compression using adaptive compression in central processing unit (CPU)-based systems is disclosed. In one aspect, a compressed memory controller (CMC) is configured to implement two compression mechanisms: a first compression mechanism for compressing small amounts of data (e.g., a single memory line), and a second compression mechanism for compressing large amounts of data (e.g., multiple associated memory lines). When performing a memory write operation using write data that includes multiple associated memory lines, the CMC compresses each of the memory lines separately using the first compression mechanism, and also compresses the memory lines together using the second compression mechanism. If the result of the second compression is smaller than the result of the first compression, the CMC stores the second compression result in the system memory. Otherwise, the first compression result is stored.

Abstract: A system and method are described for conveying to a user the value it would receive by implementing an integrated system to protect and manage its data. An integrated system can combine archiving, backup, snapshot management, reporting, secure data access, eDiscovery and data analytics, among other functions, thus simplifying data protection and data management for an organization. The system generates a value dashboard, exhibiting value data, including data and graphics portraying the benefits to a user of implementing an integrated data management and protection system. Value may be evaluated with reference to simplification and efficiency, risk reduction, and unlocking data value.

Abstract: A mechanism is provided for replicating data in a data storage system that comprises a first data storage device, a second data storage device, and a third data storage device arranged to receive write requests from the first data storage device and second data storage device. The first data storage device or the second data storage device is selected using a characteristic of the first data storage device and the second data storage device. The first data storage device receives a first write request and sends the first write request to the second data storage device, and the second data storage device receives a second write request and sends the second write request to the first data storage device. The data storage device selected using the characteristic sends a write request to the third storage device in response to a notification the non-selected data storage device has completed the update.

Abstract: A computer-executable method, computer program product and system for managing metadata in a distributed data storage system, wherein the distributed data storage system includes a first node and one or more data storage arrays, the computer-executable method, computer program product and system comprising partitioning management of metadata created in the distributed data storage system into one or more portions of metadata, wherein the first node manages a first portion of the one or more portions of metadata, and storing the metadata using the first node.

Abstract: An apparatus includes a scheduler module operatively coupled to each memory block from a set of memory blocks via a shared address bus. The scheduler module is configured to receive a group of memory commands from a set of memory controllers. Each memory controller from the set of memory controllers is uniquely associated with a different memory block from the set of memory blocks. The scheduler module is configured to classify each memory command from the group of memory commands into a category based at least in part on memory commands previously sent to the set of memory blocks via the shared address bus. The scheduler module is configured to select an order in which to send each memory command from the group of memory commands to the set of memory blocks via the shared address bus based at least in part on the category of each memory command.

Abstract: A method includes obtaining a set of pending transaction information from a set of storage units regarding a plurality of pending transactions. A pending transaction information includes information regarding an encoded data slice and a computing device issuing a data access request. The method further includes identifying an incomplete transaction based on the set of pending transaction information. The method further includes determining whether to complete the incomplete transaction based on information regarding the requesting computing device. The method further includes, when the incomplete transaction is not to be completed, instructing the storage units to discard a corresponding data access request associated with the incomplete transaction.

Abstract: Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing data flow management on a computing device. Embodiment methods may include initializing a buffer partition of a first memory of a first heterogeneous processing device for an output of execution of a first iteration of a first operation by the first heterogeneous processing device on which a first iteration of a second operation assigned for execution by a second heterogeneous processing device depends. Embodiment methods may include identifying a memory management operation for transmitting the output by the first heterogeneous processing device from the buffer partition as an input to the second heterogeneous processing device. Embodiment methods may include allocating a second memory for storing data for an iteration executed by a third heterogeneous processing device to minimize a number of memory management operations for the second allocated memory.

Abstract: Described embodiments provide methods and systems for tracking performance of a storage system including one or more system resources. One or more threads may be generated to operate the storage system. Each of the one or more threads may be associated with one of a plurality of tasks of the storage system. When an operating state of one of the one or more threads is changed, one or more performance counters of the storage system may be updated. A performance snapshot may be generated by capturing a state of the tasks associated with the threads and the performance counters.

Abstract: Efficiently storing low priority data in high priority storage devices is described. A system receives a request from an application to store a data chunk received from the application. The system determines a priority of the application. The system executes a write command to store the data chunk to a high priority storage device. If the application is low priority and the identifier of the received data chunk is a duplicate of any of the identifiers of the data chunks that were previously stored in the high priority storage device, the system stores, into the high priority storage device, the received data chunk as a low priority reference to a data chunk that was previously stored in the high priority storage device.

Abstract: Systems and methods for managing data structures in a flash memory. A library is provided that supports read requests and write requests. The library allows reads and writes to be implemented without requiring the client to understand how the data structure is implemented in the flash memory.

Abstract: Systems and methods for balancing maintenance and programming host data across multiple maintenance source blocks in a non-volatile memory are disclosed. A memory system may include non-volatile memory and a controller configured to execute one or more of the steps of selecting a fixed plurality of maintenance source blocks for executing a balance cycle of maintenance and host writes across the selected fixed plurality of maintenance source blocks. The method interleaves moving of valid data from source blocks with host data writes to achieve a balance of free space generation and consumption for the balance cycle, while periodically reevaluating an overall interleave ratio and/or substituting other previously programmed blocks for one of the previously selected plurality during the balance cycle.