Patents Examined by Daniel C Chappell
-
Patent number: 11954345Abstract: A system and method for two-level indexing for key-value persistent storage. The method may include: sorting two or more key-value pairs to form a sorted key-value pair set; determining an address of a first key-value pair of the key-value pairs, the first key-value pair including a first key and a first value; determining an address of a second key-value pair of the key-value pairs, the second key-value pair including a second key and a second value; and training a first linear regression model to generate a first line corresponding to the key-value pairs, the training including training the first linear regression model with key-value pairs including the first key-value pair and the second key-value pair.Type: GrantFiled: February 9, 2022Date of Patent: April 9, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Omkar Desai, Changho Choi, Yangwook Kang
-
Patent number: 11934687Abstract: The present disclosure generally relates to a multi-disk drive comprising a plurality of media surfaces and a plurality of heads, wherein a head of the plurality of heads is configured to be actuated over each surface of the plurality of media surfaces. The multi-disk drive further comprises control circuitry configured to write data to a first media surface of the plurality of media surfaces using a first head of the plurality of heads, and after all of an available memory of the first media surface has been filled, write data to a second media surface of the plurality of media surfaces using a second head of the plurality of heads. The control circuitry is further configured to permanently disable write access to one or more media surfaces of the plurality of media surfaces, while continuing to permit read access to the plurality of media surfaces.Type: GrantFiled: May 12, 2022Date of Patent: March 19, 2024Assignee: Western Digital Technologies, Inc.Inventors: Erhard Schreck, Sukumar Rajauria, Robert Smith
-
Patent number: 11934678Abstract: In some examples, a system identifies resource contention for a resource in a storage system, and determines that a workload collection that employs data reduction is consuming the resource. The system identifies relative contributions to consumption of the resource attributable to storage volumes in the storage system, where the workload collection that employs data reduction are performed on data of the storage volumes. The system determines whether storage space savings due to application of the data reduction for a given storage volume of the storage volumes satisfy a criterion, and in response to determining that the storage space savings for the given storage volume do not satisfy the criterion, the system indicates that the data reduction is not to be applied for the given storage volume.Type: GrantFiled: July 22, 2022Date of Patent: March 19, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Manu Sharma, Sudheer Vanapalli, Jaffer Sherif Rajasab, Gautam Kaistha, Manoj Srivatsav, Mayukh Dutta
-
Patent number: 11922011Abstract: A data item is programmed to a first set of management units (MUs) associated with a first portion of one or more memory devices. The first portion includes memory cells of a first type. The first set of MUs is associated with a first physical address. A mapping is generated in a virtual MU data structure that associates the first physical address with a set of virtual MUs associated with the one or more memory devices. An entry associated with the data item is added to a logical-to-physical (L2P) table associated with the one or more memory devices. The entry includes an identifier associated with the set of virtual MUs associated with the one or more memory devices. A detection is made that the data item is programmed to a second set of MUs associated with a second portion of the one or more memory devices. The second portion includes memory cells of a second type. The second set of MUs is associated with a second physical address.Type: GrantFiled: September 1, 2021Date of Patent: March 5, 2024Assignee: Micron Technology, Inc.Inventors: Johnny A. Lam, Samyukta Mudugal, Sanjay Subbarao, Byron D. Harris, Daniel A. Boals
-
Patent number: 11914903Abstract: A device may include an interconnect interface, a memory system including one or more first type memory devices to receive first data, one or more second type memory devices to receive second data, and an accelerator configured to perform an operation using the first data and the second data. The memory system may further include a cache configured to cache the second data for the one or more second type memory devices. A device may include an interconnect interface, a memory system coupled to the interconnect interface to receive data, an accelerator coupled to the memory system, and virtualization logic configured to partition one or more resources of the accelerator into one or more virtual accelerators, wherein a first one of the one or more virtual accelerators may be configured to perform a first operation on a first portion of the data.Type: GrantFiled: October 8, 2021Date of Patent: February 27, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yang Seok Ki, Krishna T. Malladi, Rekha Pitchumani
-
Patent number: 11907112Abstract: Embodiments of the present disclosure disclose a method and apparatus for calculating tensor data based on a computer, a medium, and a device. The method includes: determining, from a second tensor, a dimension different from a dimension of a first tensor based on dimensions of the first tensor and dimensions of the second tensor; updating stride in the different dimension to a predetermined value; reading a to-be-operated data block of the second tensor from a buffer module based on updated stride with the predetermined value in each dimension of the second tensor, where the to-be-operated data block is a data block for which padding processing is performed; and performing binary operation on the first tensor based on the to-be-operated data block of the second tensor. According to the present disclosure, broadcasting may be conveniently achieved without difficulty of hardware design being increased.Type: GrantFiled: November 24, 2020Date of Patent: February 20, 2024Assignee: Horizon (Shanghai) Artificial Intelligence Technology Co., LtdInventors: Haoqian He, Weina Lu, Chao He
-
Patent number: 11880605Abstract: Systems and methods are described for managing ephemeral storage of a virtual machine (VM) to provide victim caches for virtual storage appliances running on the VM. According to one embodiment, a central service may run within the VM and be responsible for managing allocation and reclamation of ephemeral storage space of the VM to/from the virtual storage appliances. Responsive to startup of a new virtual storage appliance on the VM, the new virtual storage appliance may request space from the central service to inform creation of its victim cache. In connection with servicing the request, the central service may take into consideration various factors including one or more of the total aggregate size of multiple local ephemeral drives associated with the VM, remaining available ephemeral storage space, the number of active virtual storage appliances, and the SLO of the virtual storage appliance seeking to establish its victim cache.Type: GrantFiled: February 15, 2022Date of Patent: January 23, 2024Assignee: NetApp, Inc.Inventors: Mrinal K. Bhattacharjee, Shivali Gupta, Neha Saini
-
Patent number: 11868267Abstract: A system includes a first memory component having a particular access size associated with performance of memory operations, a second memory component to store a logical to physical data structure whose entries map management segments to respective physical locations in the memory component, wherein each management segment corresponds to an aggregated plurality of logical access units having the particular access size, and a processing device, operably coupled to the memory component. The processing device can perform memory management operations on a per management segment basis by: for each respective management segment, tracking access requests to constituent access units corresponding to the respective management segment, and determining whether to perform a particular memory management operation on the respective management segment based on the tracking.Type: GrantFiled: March 30, 2022Date of Patent: January 9, 2024Assignee: Micron Technology, Inc.Inventors: Edward C. McGlaughlin, Gary J. Lucas, Joseph M. Jeddeloh
-
Patent number: 11868615Abstract: According to one embodiment, a compression device includes a first storage unit, a second storage unit, a calculation unit, and a comparison unit. The first storage unit stores addresses associated with hash values, respectively. The second storage unit includes storage areas specified by the addresses, respectively. The calculation unit determines a hash function to be used for first data in accordance with at least a part of the first data, and calculates a hash value using the hash function and at least a part of second data included in the first data. The comparison unit acquires third data from a storage area in the second storage unit specified by a first address, and compares the second data with the third data. The first address is stored in the first storage unit and is associated with the hash value.Type: GrantFiled: September 9, 2021Date of Patent: January 9, 2024Assignee: Kioxia CorporationInventors: Youhei Fukazawa, Kohei Oikawa, Sho Kodama, Keiri Nakanishi, Takashi Miura, Daisuke Yashima, Masato Sumiyoshi, Zheye Wang
-
Patent number: 11870868Abstract: A common storage management device for a system including a common storage and at least one computer includes at least one processor, the at least one computer storing a plurality of applications configured to write and read data in the common storage. The at least one processor is configured to manage a reservation of a storage space of the common storage in response to a request from the plurality of applications to reserve the storage space for storing the data. The at least one processor is configured to notify one application of the plurality of applications of a request to reduce data size of the data for which the storage space is required to be reserved per one request, when the one application requests to reserve the storage space for the data and free storage space is insufficient for reserving the storage space for the data.Type: GrantFiled: September 27, 2021Date of Patent: January 9, 2024Assignee: DENSO CORPORATIONInventors: Yusuke Tanaka, Yuka Ito, Hajime Nomura, Daishi Miyata
-
Patent number: 11847341Abstract: According to one embodiment, a memory card includes a nonvolatile memory including a data storage region and storing a table in which a logical address received from a host device is mapped to a physical address in the data storage region, and a controller configured to control the nonvolatile memory. The controller exchanges a first logical address with a second logical address based on a first command and data received from the host device.Type: GrantFiled: September 10, 2021Date of Patent: December 19, 2023Assignee: Kioxia CorporationInventors: Hidekazu Nanzawa, Tomoya Fukuzumi, Yuichi Emoto
-
Patent number: 11847340Abstract: A memory system includes a semiconductor memory device including a plurality of memory cells, and a controller configured to control an operation of the semiconductor memory device and communicate with a host. The controller includes a condition storage, a condition monitor, and a host interface. The condition storage stores at least one condition related to an internal state of the memory system. The condition monitor monitors whether the at least one condition is satisfied, and outputs a confirmation signal when the at least one condition is satisfied. The host interface outputs a condition confirmation message indicating that the at least one condition is satisfied to the host, in response to the confirmation signal.Type: GrantFiled: August 12, 2021Date of Patent: December 19, 2023Assignee: SK hynix Inc.Inventor: Yun Seung Nam
-
Patent number: 11842060Abstract: A specification of content to be stored in a cloud storage is received at a client-side component. A portion of the content is divided into a plurality of data chunks. One or more data chunks of the plurality of data chunks that are to be sent via a network to be stored in the cloud storage are identified. It is determined whether a batch size of the one or more identified data chunks meets a threshold size. Based on the determination of whether the batch size meets the threshold size, a cloud storage destination among a plurality of different cloud storage destinations associated with different performance tiers is selected.Type: GrantFiled: August 13, 2021Date of Patent: December 12, 2023Assignee: Cohesity, Inc.Inventors: Anubhav Gupta, Praveen Kumar Yarlagadda, Venkata Ranga Radhanikanth Guturi, Zhihuan Qiu, Sarthak Agarwal
-
Patent number: 11836389Abstract: Embodiments described herein provide systems and methods that allow for the archiving of computer data and computer files by aggregating archival content on various types of Removable Digital Storage Media. The system that supports the archiving is a triplex data structuring system providing at least three separate data pools working in synchrony for the stability of the data. Various methods are described to write data, to read data, to virtualize the data, to store data chronologically, to aggregate small files, to screen for malware, and to create various modes of redundancy that allow for the reconstruction of the system even after catastrophic failures.Type: GrantFiled: June 26, 2020Date of Patent: December 5, 2023Assignee: Tape Management Systems, Inc.Inventors: Alfred Bonner, Harrison Pardee Lantz
-
Patent number: 11829636Abstract: A method comprising directing, via a memory manager, an address associated with data to be written to a cold memory map, receiving the data at a memory device, and writing the data to the memory device in response to the memory manager identifying the data as cold data in response to writing the address associated with the data to the cold memory map.Type: GrantFiled: September 1, 2021Date of Patent: November 28, 2023Assignee: Micron Technology, Inc.Inventor: Robert M. Walker
-
Patent number: 11829621Abstract: Disclosed herein are system, method, and computer program product aspects for managing a storage system. In an aspect, a host device may generate a configuration corresponding to a file and transmit the configuration to a memory device, such as 3D NAND memory. The configuration instructs the memory device to refrain from transmitting a logic-to-physical (L2P) dirty entry notification to the host device. The L2P dirty entry notification corresponds to the file. The host device may also generate a second configuration corresponding to the file and transmit the second configuration to the memory device. The second configuration instructs the memory device to resume transmitting the L2P dirty entry notification corresponding to the file to the host device.Type: GrantFiled: May 4, 2021Date of Patent: November 28, 2023Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Kaiyao Cao, Yaping Zhang, Xiuli Sun
-
Patent number: 11829602Abstract: An apparatus includes at least one processing device configured to obtain information characterizing which of a plurality of storage nodes of a distributed storage system stores respective ones of a plurality of different logical blocks of a logical storage volume of the distributed storage system. The at least one processing device is further configured, for each of a plurality of input-output operations directed to a particular one of the logical blocks of the logical storage volume, to identify, based at least in part on the obtained information, which of the plurality of storage nodes of the distributed storage system stores the particular logical block, to select a path to the identified storage node, and to send the input-output operation to the identified storage node over the selected path.Type: GrantFiled: March 16, 2022Date of Patent: November 28, 2023Assignee: Dell Products L.P.Inventors: Sanjib Mallick, Kurumurthy Gokam, Mohammad Salim Akhtar
-
Patent number: 11822811Abstract: Techniques involve obtaining, at a first network interface card coupled with a first device, information related to a plurality of data blocks to be written to a second device, the information including sizes of the plurality of data blocks and a plurality of destination addresses in a memory of the second device where the plurality of data blocks will be written. The techniques further involve generating a write request for the plurality of data blocks based on the information, the write request indicating at least the plurality of destination addresses and the sizes of the plurality of data blocks. The techniques further involve sending the write request to a second network interface card coupled with the second device, so that the plurality of data blocks are written to the plurality of destination addresses. Such techniques reduce the number of communications thus improving system performance and reducing hardware resource consumption.Type: GrantFiled: September 15, 2021Date of Patent: November 21, 2023Assignee: EMC IP Holding Company LLCInventors: Yinlong Lu, Haohan Zhang, Yang Liu, Dezheng Zhang, Chen Bian
-
Patent number: 11816364Abstract: Performance degradation of an application that is caused by another computing process that shares infrastructure with the application is detected. The application and the other computing device may execute via different virtual machines hosted on the same computing device. To detect the performance degradation that is attributable to the other computing process, certain storage segments of a data storage (e.g., a cache) shared by the virtual machines is written with data. A pattern of read operations are then performed on the segments to determine whether an increase in read access time has occurred. Such a performance degradation is attributable to another computing process. After detecting the degradation, a metric that quantifies the detected degradation attributable to the other computing process is provided to an ML model, which determines the actual performance of the application absent the degradation attributable to the other computing process.Type: GrantFiled: January 13, 2022Date of Patent: November 14, 2023Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Brian Paul Kroth, Carlo Aldo Curino, Andreas Christian Mueller
-
Patent number: 11816025Abstract: A hardware accelerator may be used for assisting a separate processor in performing sparse embedding vector lookup operations, each non-zero index of a sparse embedding vector referencing a respective dense embedding vector. The hardware accelerator comprises: a plurality of Dynamic Random Access Memory (DRAM) modules, each DRAM module comprising a distinct packaged device or chiplet; one or more memory controllers, each memory controller being configured to address a subset of the plurality of DRAM modules, each memory controller and associated subset of the DRAM modules defining a memory channel; and processing logic, arranged to control the one or more memory controllers. More than one dense embedding vector may be read from multiple memory channels in parallel and/or multiple copies of a dense embedding vector are stored in a memory channel.Type: GrantFiled: October 5, 2020Date of Patent: November 14, 2023Assignee: Myrtle Software LimitedInventors: Graham Hazel, Oliver Bunting, Douglas Reid, Elizabeth Corrigan