Abstract: A method for obtaining boot logs is provided. The method includes: determining an operating state of a target device, where the operating state includes: a normal operation state and an abnormal operation state; and in response to the operating state being the normal operation state, obtaining boot logs from a first target memory device in a BMC system of the target device, where the first target memory device is a transitory memory device, and the boot log is all logs of the target device in a boot process; or in response to the operating state being the abnormal operation state, obtaining the boot logs from a second target memory device in the target device, where the second target memory device is a memory device in the target device. An apparatus for obtaining boot logs and a method for transferring boot logs are further provided.

Abstract: Embodiments of the present disclosure provide a voltage compensation method, an apparatus, storage medium, and a program product. Voltage values at both ends of a conductive line between a power supply apparatus and a processing apparatus, and a current value on the conductive line are determined; a current resistance value of the conductive line is determined according to the voltage values at both ends of the conductive line and the current value; and a compensation is performed on a shutdown voltage value and/or a charging voltage value of the processing apparatus according to the current resistance value and the current value of the conductive line. As such, the shutdown voltage value and/or the charging voltage value of the power supply apparatus side can be ensured to remain constant, effectively protecting the power supply apparatus and the processing apparatus, and ensuring the use experience of the terminal device.

Abstract: This disclosure reduces power consumption of a vehicle. An information processing apparatus of this disclosure acquires information on a remaining battery level of a vehicle. The information processing apparatus determines, for each of multiple types of processing executed by one or more electronic control units of the vehicle, an execution mode to be set after a running system of the vehicle stops, according to the remaining battery level.

Abstract: Particular embodiments described herein provide for an electronic device that includes a battery, a display, an embedded controller to determine a battery condition and set an indicator when then battery condition is at a low power state, and a basic input/output system (BIOS), where, before an operating system stage of a boot process, the BIOS sets a brightness of the display at a native brightness if the indicator is not set and sets the brightness of the display at a low power brightness to reduce the brightness of the display if the indicator is set. In an example, the embedded controller sets the indicator before the central processing unit is reset during the boot process.

Abstract: To achieve an electronic module capable of reducing dark current, which is current flowing when the electronic module is turned off, and contributing to prevention of battery wear of a vehicle or the like. Therefore, the electronic module connected to a first electronic module via a communication line includes: a microcomputer; a power supply IC that supplies power to the microcomputer; a power supply control circuit that supplies power from a battery power supply to the power supply IC; a control line connected to the communication line; and a first switch circuit that connects the control line and the power supply control circuit.

Abstract: The present embodiment relates to a power management circuit and timing controller for a display device. The power management circuit optimizes power consumption by receiving analysis information from a timing controller capable of analyzing image data and changing an operating condition for a power conversion circuit based on the analysis information.

Abstract: A dual-input power supply has two power paths that connect a server in a data center to electrical power. Each power path has a first stage that comprises a power-factor correction circuit. The power paths share a common second stage that comprises a dc/dc converter. The first stages of the power paths collectively define a pair of first stages that is disposed either within a package that is off the motherboard or without a package and on the motherboard. Similarly, the second stage is disposed either within a package that is off the motherboard or without a package and on the motherboard.

Abstract: An information handling system stores a knob table, and determines time series data for one or more applications being executed. The information handling system extracts features associated with the system, and determines a system type for the information handling system. The system determines a running average power level based on the time series data, the extracted features, and the system type. Based on the determined running average power level, the information handling system determines a configuration knob to optimize the system. The configuration knob is determined from the knob table in the memory.

Abstract: Disclosed herein are scientific instrument utilization tracking systems, as well as related methods, computing devices, and computer-readable media. For example, in some embodiments, a method of tracking utilization of a scientific instrument may include: receiving, at a computing system, first data from a power sensor associated with the scientific instrument, wherein the power sensor monitors power consumption by the scientific instrument; generating, by the computing system based on the first data, multiple power consumption ranges associated with corresponding operational states of the scientific instrument; receiving, at the computing system, second data from the power sensor associated with the scientific instrument; and outputting, by the computing system, indications of the operational states over time of the scientific instrument based on the second data and the power consumption ranges.

Abstract: A system on chip includes a processing unit including the first processing circuit and a second processing circuit, a connection circuit configured to form a path connecting one of the first processing circuit and the second processing circuit to an external capacitor, and a controller configured to control the connection circuit based on a state of at least one of the first processing circuit and the second processing circuit.

Abstract: A system including a power bus configured to supply power to a plurality of server racks arranged within a space of a building, a first power source connection positioned at a first side of the building and configured to supply power from a first power source to the power bus, a second power source positioned at a second side of the building different from the first side and configured to supply power from a second power source to the power bus, and a plurality of diverter switches arranged within the power bus. Each diverter switch may be configured to receive a respective control signal and, responsive to the respective control signal, redirect power within the power bus.

Abstract: Apparatuses, devices, and systems for controlling power supply to a load are described. A system can include a power stage and a power management integrated circuit (PMIC). The PMIC can include a controller configured to determine a load is operating under a low power mode. The controller can, in response to the load operating under the low power mode, operate the PMIC to supply power to the load. The controller can determine the load is operating under a high power mode. The controller can, in response to the load operating under the high power mode, operate at least one of the PMIC and the power stage to supply power to the load.

Abstract: A rebooting system includes: a processing apparatus configured to perform processing; and an operation panel configured to receive an operation on the processing apparatus. The processing apparatus includes first power supply control circuitry that controls power supply in the processing apparatus, a timer, first circuitry including a first kernel, and a first communication interface that communicates a signal with the operation panel. The operation panel includes second power supply control circuitry that controls power supply in the operation panel, and a second communication interface that communicates a signal with the processing apparatus. In response to receipt of a signal indicating a communication error between the operation panel and the processing apparatus, the first power supply control circuitry starts the timer and notifies the first kernel of the communication error.

Abstract: According to an embodiment, a method for testing a scan chain is provided. The method includes receiving a first clock signal and a first scan enable signal and generating a second and third clock signal based on the first clock signal and the first scan enable signal. The third clock signal is delayed by a clock pulse from the second clock signal. The first, second, and third clock signal have the same duty cycle. The method further includes providing the second clock signal and the second scan enable signal to, respectively, a clock terminal and scan enable input of a first scan flip-flop of the scan chain. The method further includes providing the third clock signal and a third scan enable signal to, respectively, a clock terminal and a scan enable input of a last scan flip-flop of the scan chain.

Abstract: A method for recovering from a power failure includes detecting a power collapse at a first voltage regulator supplying a first subsystem. The method also includes coupling a supply voltage rail or a voltage supply node of the first subsystem to a second voltage source, in response to detecting the power collapse at the first voltage regulator. The method further includes receiving power, at the first subsystem, from the second voltage source in response to the coupling of the first subsystem to the second voltage source.

Abstract: An information handling system may initiate a secure boot process in response to a launch of a new virtual machine, and assign an identifier to the new virtual machine. In response to determining that the new virtual machine is to be associated with an authorized certificates database and an unauthorized certificates database, the system may compile a list of certificates for the new virtual machine. In response to determining that a first certificate from the list of certificates is to be included in the authorized certificates database, the system adds the first certificate to the authorized certificates database. In response to determining that a second certificate from the list of certificates is to be included in the unauthorized certificates database, the system adds the second certificate to the unauthorized certificates database.

Abstract: A method and architecture for configuring data in a power management integrated circuit (PMIC), and a display panel are disclosed. By means of the method for configuring data, the times of rewriting reading and loading module code for architectures of different models are reduced. A same configuration format is used for each reading and loading module model, facilitating porting of the storage module or the reading and loading module into different models. For different models, only the configuration information is required to be rewritten, and the reading and loading module performs corresponding actions according to the corresponding settings, facilitating the control of products.

Abstract: The present disclosure relates to a method for managing the supply of electrical power to Ethernet devices. The Ethernet devices are connected to a management system via an Ethernet cable supplying them with current. When input information is received by the management system, the management system determines, on the basis of a first list of the Ethernet devices, whether it has to interrupt the supply of power to one or more of the Ethernet devices or, conversely, to re-establish the supply of power thereto.

Abstract: Systems and methods for managing performance in heterogenous computing platforms of IHSs (Information Handling Systems) are described. In an illustrative, non-limiting embodiment, a heterogeneous computing platform includes devices and a memory storing firmware instructions. Based on execution of these firmware instructions by a respective device, a corresponding firmware service is provided such that one of the devices operates as an orchestrator. The orchestrator receives reports of changes in context of operation of the IHS by a user and determines a power allocation that is mapped to the reported user context, where the mapping allocates available power to the plurality of devices of the heterogeneous computing platform. The orchestrator configures the power that available for use by one or more of the plurality of devices of the heterogeneous computing platform, and thus adjusts the performance of the IHS in response to the change in user context.

Abstract: An image forming system includes an information processing apparatus configured to output, to an image forming apparatus, information about an image forming job to form an image on a recording medium, the image forming apparatus being configured to be operable in a plurality of power modes including a normal power mode in which the information is output and a power saving mode in which power consumption is less than the normal power mode; an image forming apparatus includes a storage unit configured to store the information about two or more image forming jobs output from the information processing apparatus; and an image forming unit configured to form an image on the recording medium based on the information stored in the storage unit.