Patents Examined by Danny Chan
  • Patent number: 11747852
    Abstract: A method and apparatus for managing overclocking in a data center includes determining a frequency limit of a first processor of a first server in the data center. The voltage of the first processor is lowered to a stability point, and the frequency is lowered. The first server is tested for stability. Based upon the results of the test, the voltage and frequency modifications are deployed to a second processor of a second server in the data center.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: September 5, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Amitabh Mehra, Jeffrey N. Burley, Anil Harwani
  • Patent number: 11726794
    Abstract: To obtain a highly reliable electronic control device capable of reliably causing a microcomputer to perform normal termination and normal re-activation by controlling a power supply voltage. According to the present invention, an electronic control device 25 includes a microcomputer 18, a power supply control unit 20 that controls a power supply voltage of the microcomputer, and a capacitor 19 provided between the power supply control unit and the microcomputer. The power supply control unit 20 includes a power supply unit 24 that supplies a first power supply voltage V1 to the microcomputer by turning ON an activation signal for activating the microcomputer, and stops the supply of the power supply voltage by turning the activation signal OFF, a reset control unit 14 that generates a Low reset signal by turning the activation signal OFF, and a discharge control unit 12 that discharges electric charges of the capacitor when acquiring the Low reset signal.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: August 15, 2023
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Masahiro Doi, Yuri Moizumi, Takeo Yamashita
  • Patent number: 11709532
    Abstract: A shared battery system includes a battery having unique identification information, a communication unit communication-connected with a user terminal to receive user information from the user terminal, and an authentication unit configured to perform user authentication based on the user information. A controller is configured to control the authentication unit to perform the user authentication when a communication connection with the user terminal is made, to control the battery to supply electrical energy to a shared mobility device based on a use approval of the shared mobility device when the battery is mounted to the mobility device, to acquire usage information of the shared mobility device therefrom when the electrical energy is supplied to the shared mobility device, and to control the communication unit to transmit the acquired usage information of the shared mobility device and status information of the battery.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: July 25, 2023
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Cheon Maeng, Young Ki Kim, Sung Un Kim, Jae Yong Lee, Sung Jin Choi
  • Patent number: 11703920
    Abstract: A system including a power bus configured to supply power to a plurality of server racks arranged within a space of a building, a first power source connection positioned at a first side of the building and configured to supply power from a first power source to the power bus, a second power source positioned at a second side of the building different from the first side and configured to supply power from a second power source to the power bus, and a plurality of diverter switches arranged within the power bus. Each diverter switch may be configured to receive a respective control signal and, responsive to the respective control signal, redirect power within the power bus.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: July 18, 2023
    Assignee: Google LLC
    Inventors: Drazena Brocilo, Selver Corhodzic
  • Patent number: 11693745
    Abstract: An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to detect a power-up state of the memory device following a power loss event; detect a read error with respect to data residing in a block of the memory device, wherein the block is associated with a current voltage offset bin; and perform temporal voltage shift (TVS)-oriented calibration for associating the block with a new voltage offset bin.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: July 4, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Bruce A. Liikanen, Shane Nowell, Steven Michael Kientz
  • Patent number: 11687431
    Abstract: An apparatus comprises a processing device configured to receive a request to boot a given computing device to a primary environment and, responsive to receiving the request, to obtain first inventory information for components of the given computing device utilizing a preinstallation environment of the given computing device. The processing device is also configured to analyze the first inventory information and second inventory information to determine whether there any changes in the components of the given computing device prior to booting the given computing device to the primary environment, the second inventory information being previously stored in a support environment of the given computing device. The processing device is further configured to generate notifications based at least in part on determining that there are one or more changes in the components of the given computing device, and to provide the notifications at a user interface of the given computing device.
    Type: Grant
    Filed: January 18, 2021
    Date of Patent: June 27, 2023
    Assignee: Dell Products L.P.
    Inventors: Parminder Singh Sethi, Lakshmi Saroja Nalam
  • Patent number: 11664660
    Abstract: A disclosed apparatus may include (1) a first plurality of power feeds that are electrically ORed to form an channel input, wherein the channel input is electrically coupled to a first channel of a power supply, (2) a first plurality of switches electrically coupled inline on the first plurality of power feeds, wherein the first plurality of switches are individually programmable to open or close electrical continuity, (3) a second plurality of power feeds that are electrically ORed to form an additional channel input, wherein the additional channel input is electrically coupled to a second channel of the power supply, and (4) a second plurality of switches electrically coupled inline on the second plurality of power feeds, wherein the second plurality of switches are individually programmable to open or close electrical continuity. Various other apparatuses, systems, and methods are also disclosed.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: May 30, 2023
    Assignee: Juniper Networks, Inc.
    Inventors: David K. Owen, Jaspal S. Gill, Marshall J. Lise, Katsuhiro Okamura
  • Patent number: 11665230
    Abstract: Provided is a process of managing rack-mounted computing devices in a data center with a distributed peer-to-peer management system, the process including: determining roles of data-center management computing devices in a distributed peer-to-peer data-center management system; receiving, via an out-of-band network, a data-center management command at a given data-center management computing device; distributing, based on at least some of the roles, via the out-of-band network, the data-center management command.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: May 30, 2023
    Assignee: Vapor IO Inc.
    Inventors: Andrew Brian Cencini, Steven White, Cole Malone Crawford
  • Patent number: 11656676
    Abstract: In one embodiment, a processor includes: a first plurality of intellectual property (IP) circuits to execute operations; and a second plurality of integrated voltage regulators, where the second plurality of integrated voltage regulators are oversubscribed with respect to the first plurality of IP circuits. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: May 23, 2023
    Assignee: Intel Corporation
    Inventors: Rolf Kuehnis, Matthew Long, Julien Sebot
  • Patent number: 11650646
    Abstract: A system comprising a power source, a RASPBERRY PI Hardware Attached on Top (RPI HAT) with an Uninterruptable Power Supply (UPS), and a RASPBERRY PI (RPI) is provided. The power source provides power to the RPI via the RPI HAT. The RPI HAT comprises a super-capacitor (SC) back-up system comprising an SC power bank and compatibility circuitry configured to charge the SC power bank to a sufficient level such that the SC power bank is usable as a back-up power supply in response to the loss of power from the power source. The SC back-up system is electrically coupled to the power source such that the power source is capable of charging the SC power bank and the SC power bank discharges and provides power to the RPI in response to a loss of power from the power source to the RPI.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: May 16, 2023
    Assignee: Florence Corporation
    Inventor: Maroof Choudhury
  • Patent number: 11650827
    Abstract: An embodiment is able to simplify the design and manufacturing process by unifying the step of writing boot loaders to the integrated circuits.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: May 16, 2023
    Assignee: SILICON WORKS CO., LTD.
    Inventor: Gyu Chul Lee
  • Patent number: 11644879
    Abstract: Example implementations relate to a power control system for controlling transmission of power from one or more power supply devices to one or more loads of a modular server enclosure. The power control system includes an electronic fuse and a threshold control unit. The electronic fuse is connected between one or more loads and the one or more power supply devices of the modular server enclosure. The threshold control unit is connected to the electronic fuse and to the one or more power supply devices. The threshold control circuit dynamically adjusts a threshold current for the electronic fuse based on a power supply capacity of the one or more power supply devices. The electronic fuse controls the transmission of the power from the one or more power supply devices to the one or more loads based on threshold current and a load current drawn by the one or more loads.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: May 9, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Vincent W. Michna, Nilashis Dey
  • Patent number: 11644880
    Abstract: A method, device, and system for balancing a supply current in a Power Supply Units (PSUs). The system includes a plurality of PSUs connected in parallel to a power bus. The method includes detecting a falling edge in a common Load Share (LS) signal and, in response to detecting the falling edge of the LS signal, enabling a field effect transistor (FET) and starting a timer. Prior to starting the timer, a time trigger is determined for the timer based on a current output level of a power source in the PSU. The method includes outputting a current at the current output level for the duration of the time trigger and, at the time trigger, releasing the FET and resetting the timer. The PSU includes a processor that monitors the LS signal. The LS signal determines a timing for outputting current by the PSU.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: May 9, 2023
    Assignee: Dell Products L.P.
    Inventors: Thomas R. Thibodeau, Haijin Zhang, Cui Xizhi
  • Patent number: 11644862
    Abstract: A system and method for synchronizing multiple integrated circuit (IC) chips for an input device having a display device integrated with a capacitive sensing device. A first one of the IC chips is a master IC chip and a second one of the IC chips is a slave IC chip. The master IC chip is configured to transmit synchronization signals to and from the slave IC chip, such that capacitive frames are acquired by each of the IC chips at substantially the same time, the initiation of the sensing signals is synchronized for each of the IC chips and the clock signals of the slave IC chips are synchronized with the clock signal of the master IC chip.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: May 9, 2023
    Assignee: Synaptics Incorporated
    Inventors: Jeremy Roberson, David Sobel
  • Patent number: 11630498
    Abstract: The present invention provides a power supply system and power supply method thereof for Power over Ethernet. The power supply system is configured to: calculate a static allocation remaining power and a dynamic allocation remaining power of power sourcing equipment; and determine whether a consuming power of powered device is greater than the static allocation remaining power and the dynamic allocation remaining power. When the consuming power is less than or equal to the static allocation remaining power and is less than or equal to the dynamic allocation remaining power, the powering system is configured to perform a static powering procedure. When the consuming power is greater than the static allocation remaining power and is less than or equal to the dynamic allocation remaining power, the powering system is configured to perform a dynamic powering procedure.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: April 18, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Pengchao Teng, Mingcai Xu, Yulun Liu
  • Patent number: 11599185
    Abstract: Energy consumption is reduced within an Internet of Things (IoT) device, without degrading operating performance of the corresponding internal circuitry. A first internal supply voltage (VDDa) used to supply the internal circuitry is reduced from a VDD supply voltage to a lower voltage during an idle state, thereby reducing leakage currents in the internal circuitry. The first internal supply voltage (VDDa) may be reduced to a voltage that is one threshold voltage (Vtp) lower than the VDD supply voltage. A second internal supply voltage (VSSa) used to supply the internal circuitry is increased from the VSS supply voltage to a voltage higher than the VSS supply voltage during the idle state, thereby further reducing leakage currents in the internal circuitry. The second internal supply voltage (VSSa) may be increased to a voltage that is one threshold voltage (Vtn) higher than the VSS supply voltage.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: March 7, 2023
    Assignee: Synopsys, Inc.
    Inventors: Jamil Kawa, Thu Nguyen
  • Patent number: 11579896
    Abstract: Arrangements for autonomously re-initializing one or more applications after a detected change in device state are provided. In some examples, a configuration file may be received from one or more computing devices, such as a server, hosting one or more client-facing applications. In some examples, the configuration file may be modified. For instance, one or more properties or attributes may be modified or added to identify applications that have an always running status and identifying a custom class having automatic start enabled. A modified configuration file may be generated and transmitted to the one or more devices. Accordingly, upon detecting a change of device state (e.g., reboot, refresh, or the like) the modified configuration file may reboot and cause the identified applications to automatically or autonomously re-load, re-initialize and recompile prior to receiving a first request for access from a customer or user device.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: February 14, 2023
    Assignee: Bank of America Corporation
    Inventors: Krishna Kumar Purushothama Kurup, Susanta Kumar Nayak, Shyam Kottayil Panaghat
  • Patent number: 11580048
    Abstract: Various aspects of the subject technology relate to systems, methods, and machine-readable media for DDR reference voltage training. The method includes receiving a data stream, the data stream including pulses generated from a reference voltage in relation to a voltage input logic low and a voltage input logic high of an input stream. The method also includes receiving a clock signal, the clock signal including an in-phase signal and a quadrature-phase signal, the in-phase signal orthogonal to the quadrature-phase signal. The method also includes utilizing the in-phase signal and the quadrature-phase signal of the clock signal in relation to the data stream to obtain a stream of in-phase samples and a stream of quadrature-phase samples. The method also includes adjusting the reference voltage based on a relationship of the stream of in-phase samples to the stream of quadrature-phase samples.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: February 14, 2023
    Inventors: Thomas E. Wilson, Scott Huss, Hari Anand Ravi, Sachin Ramesh Gugwad, Balbeer Singh Rathor
  • Patent number: 11573621
    Abstract: A set of read operations and a set of write operations for a set of drives in a storage system during a first time window is monitored. A write intensity of a first drive in the set is calculated based on the monitoring. The first drive is classified as a candidate for power reduction based on the write intensity. A write-intensive extent is identified on the first drive based on the monitoring. The write extensive extent is migrated to a second drive in the set of drives, and power to the first drive is reduced.
    Type: Grant
    Filed: July 25, 2020
    Date of Patent: February 7, 2023
    Assignee: International Business Machines Corporation
    Inventors: Lee Jason Sanders, Alexander Henry Ainscow, Kushal S. Patel, Sarvesh S. Patel
  • Patent number: 11567554
    Abstract: A pipeline includes a first portion configured to process a first subset of bits of an instruction and a second portion configured to process a second subset of the bits of the instruction. A first clock mesh is configured to provide a first clock signal to the first portion of the pipeline. A second clock mesh is configured to provide a second clock signal to the second portion of the pipeline. The first and second clock meshes selectively provide the first and second clock signals based on characteristics of in-flight instructions that have been dispatched to the pipeline but not yet retired. In some cases, a physical register file is configured to store values of bits representative of instructions. Only the first subset is stored in the physical register file in response to the value of the zero high bit indicating that the second subset is equal to zero.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: January 31, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jay Fleischman, Michael Estlick, Michael Christopher Sedmak, Erik Swanson, Sneha V. Desai