Abstract: An apparatus prevents electrical arcing between a motor including a rotating shaft and an associated bearing within a motor housing. A brush is formed of a conductive fabric for electrically connecting the rotating shaft to the motor housing. The conductive fabric may comprise randomly arranged or non-woven conductive fibers in contact or woven conductive fibers. The fabric may comprise a wool or felt. The apparatus may be applied to a fan. A related method is also disclosed.

Abstract: The present disclosure discloses an apparatus for protection against electrostatic discharge and a method of manufacturing the same. The apparatus comprises: a first input/output pad electrically connected to an input/output pin and comprising an input/output protection circuit provided between a power source line and a ground line, wherein the input/output protection circuit is configured to release an electrostatic discharge current generated at the input/output pin; and a second input/output pad which is an empty pad electrically connected to the input/output pin and an RF input/output terminal of an internal RF circuit and is configured to receive a signal from the input/output pin and transmit the signal to the internal RF circuit. With the above apparatus, parasitic capacitive load can be minimized while electrostatic protection is performed on the RF circuit.

Abstract: Methods and devices for insulation monitoring of an ungrounded IT power supply system having at least two phase conductors includes determining an insulation resistance separately for each phase conductor using a separate response value. In one embodiment of the invention, relevant current and voltage distributions are calculated. In another embodiment, a change time window is set within which a second response value is activated. In yet another embodiment, an option of shutting down/continuing operation of the IT power supply system is offered.

Abstract: Provided is a lightning suppression type arrester that can easily increase a quantity of negative charges required for lightning suppression while simplifying workability associated with installation as much as possible. A lightning suppression type arrester for suppressing lightning on a structure includes a charged body made of a conductive material provided in an electrically insulated state on a top of the structure, a first electrode body including a capacitor electrically connected to the charged body, the capacitor being installed on a ground and electrically connected to the ground, and a second electrode body opposed to the first electrode body via an electrical insulating layer to store an electric charge by a capacitance between the first electrode body and the second electrode body, in which the second electrode body is electrically connected to the charged body.

Abstract: A simple, low-cost circuit is disclosed that provides the requisite triple redundancy for a spark protection circuit for a battery-operated device having an on-board battery charger that is intended for use in hazardous atmospheres. The circuit complies with the IEC standard for intrinsically safe products.

Abstract: In certain aspects of the disclosure, a protection circuit includes a first input/output (I/O) pin, a second I/O pad, a shunt clamp coupled to the first I/O pad, and a resistor coupled between the shunt clamp and the second I/O pad. The resistor has a first dynamic resistance at a voltage of 100 millivolts across the resistor, the resistor has a second dynamic resistance at a voltage of three volts across the resistor, and the second dynamic resistance is at least five times greater than the first dynamic resistance.

Abstract: A current limiting circuit for controlling current from a power supply to a load having a capacitance includes an inductor, a transistor coupled in a current path with the inductor, and a control circuit. The transistor includes a control terminal. The control circuit is coupled to sense a voltage across the inductor and coupled to the control terminal of the transistor. The control circuit is configured to turn off the transistor when the voltage across the inductor is greater than a threshold to restrict current from a power supply, and turn on the transistor when a defined parameter is met to allow current from the power supply to charge the load capacitance. Other example current limiting circuits are also disclosed.

Abstract: A semiconductor device includes a thyristor disposed in a semiconductor body. The thyristor has an anode, a cathode, a first bipolar transistor located on an anode side, and a second bipolar transistor located on a cathode side. The first and second bipolar transistors are nested and connected between the anode and the cathode. A MOS transistor is disposed in the semiconductor body. The MOS transistor is coupled between a collector region and an emitter region of the second bipolar transistor. The MOS transistor has a gate region connected to the cathode via a resistive semiconductor region that incorporates at least a part of a base region of the second bipolar transistor.

Abstract: A semiconductor circuit has a primary circuit that causes the light emitting element to emit light in accordance with a current flowing through a control target, and that causes the light emitting element to emit light brighter when an overcurrent flows through the control target; and a secondary circuit that is electrically insulated from the primary circuit, outputs a voltage according to a light emission amount of the light emitting element, and outputs an overcurrent detection signal indicating the brighter light emission in the light emitting element.

Abstract: The invention relates to a circuit arrangement for combined protection of a load from temporary and transient overvoltages with emergency operation of the load in the presence of a temporary overvoltage and with integrated follow current limitation, wherein a first surge arrester, in particular a spark gap or a varistor, is provided between network-side input terminals and a second surge arrester, in particular a varistor, is provided between load-side output terminals for follow current limitation. According to the invention, at least one controlled semiconductor switch is provided in each case in the series branch between the input terminal and the output terminal and in the output-side parallel branch, wherein a mechanical switch and a series capacitance are connected in parallel with the semiconductor switch in the series branch.

Abstract: A gate driver integrated circuit includes a high-side region that operates in a first voltage domain according to a first pair of supply terminals that include a first lower supply terminal and a first higher supply terminal; a low-side region that operates in a second voltage domain according to a second pair of supply terminals; a low-voltage region the operates in a third voltage domain; at least one termination region that electrically isolates the high-side region from the low-side region and the low-voltage region; a first electrostatic device arranged in the high-side region and connected to the first pair of supply terminals; a second electrostatic device arranged in the low-side region and connected to the second pair of supply terminals; and a third electrostatic device connected to a lower supply terminal of the first pair of supply terminals and is coupled in series with the first electrostatic device.

Abstract: An integrated circuit (IC) includes an input/output (IO) circuit in a first power domain, coupled between a first and second power supply terminal, and an integrity monitor in a second power domain, coupled between a third and fourth power supply terminal. The IO circuit includes an external terminal configured to communicate signals external to the IC, and an internal circuit node configured to provide a tap signal, wherein the internal circuit node is neither the first power supply terminal nor the second power supply terminal. The integrity monitor has a counter configured to provide a count value by counting each time the tap signal reaches a threshold voltage, and is configured to provide an integrity fault indicator based at least in part on the count value, in which the integrity fault indicator indicates whether or not a signal provided or received by the external terminal is trustworthy.

Abstract: A lifting device includes a base body. The base body includes a supporting surface and defines a cavity. The cavity extends through the supporting surface. The lifting device further includes a magnetic bar, a spring, and a coil in the cavity. The spring includes a first end fixed to an end of the magnetic bar away from the supporting surface and a second end fixed on a wall of the cavity. The coil surrounds the magnetic bar. When the coil is applied with a voltage to generate an electromagnetic induction, the magnetic bar is driven to move out of the cavity from the supporting surface or move to compress the spring.

Abstract: An electrostatic protection device for protecting an input port of an electronic circuit. The electrostatic protection device includes a first stacked coil, a second stacked coil, and an input terminal, wherein the second stacked coil is inductively coupled to the first stacked coil. The first stacked coil comprises a first coil input connected to the input terminal, a first coil output port connected to a lower frequency ESD protection circuit, and a first coil termination port connected to a termination load, and wherein the lower frequency ESD protection circuit comprises a lower frequency output. The second stacked coil comprises an output port connected to a higher frequency ESD protection circuit, and wherein the higher frequency ESD protection circuit comprises a higher frequency output. The electrostatic protection device comprises a summation circuit configured for outputting a summation of the higher frequency output and the lower frequency output.

Abstract: An electrostatic discharge protection circuit including a silicon controlled rectifier and a transistor is provided. The silicon controlled rectifier includes a first end, a second end, and a third end. The first end of the silicon controlled rectifier is coupled to a first pad. The second end of the silicon controlled rectifier is coupled to a second pad. The transistor includes a first end, a second end, and a control end. The first end of the transistor is coupled to the first pad. The second end of the transistor is coupled to the second pad. The control end of the transistor is coupled to the third end of the silicon controlled rectifier.

Abstract: A device is disclosed herein. The device includes an electrostatic discharge (ESD) protection switch and an ESD driver. The ESD driver is configured to receive a first voltage and a second voltage. When a voltage difference between the first voltage and the second voltage is higher than a first voltage threshold, the ESD driver outputs a first trigger signal to turn on the ESD protection switch. When the voltage difference between the first voltage and the second voltage is lower than a second voltage threshold, the ESD driver outputs a second trigger signal to turn on the ESD protection switch.

Abstract: A voltage clamping circuit for protecting an internal circuitry comprising an input means for receiving Vin; a p-channel clamping transistor (PCT) coupled to input means for clamping Vin to prevent Vin from falling below a p-channel biasing voltage VbiasP; an n-channel clamping transistor (NCT) coupled to input means for clamping Vin to prevent Vin from rising above an n-channel biasing voltage VbiasN; and a plurality of output means for providing a first output voltage from PCT and a second output voltage from NCT; a p-channel bias circuit including a first, a second and a third bias transistor with each transistor possessing a threshold voltage Vth for providing a p-channel bias voltage to turn on PCT; and an n-channel bias circuit including a fourth, a fifth and a sixth bias transistor with each transistor possessing the threshold voltage Vth for providing an n-channel bias voltage to turn on NCT.

Abstract: An ESD protection circuit is provided, including a negative ESD protection module and a positive ESD protection module, where the negative ESD protection module includes a first resistor, a charging capacitor, a first field effect transistor, and a second field effect transistor, and the positive ESD protection module includes a fourth field effect transistor. When a negative ESD event occurs, there is a comparatively large transient voltage at a gate of a P-type enhanced GaN power device relative to a source of the P-type enhanced GaN power device. Therefore, a displacement current from the source to the gate of the P-type enhanced GaN power device is generated on the charging capacitor. A voltage drop generated by the displacement current on the first resistor may enable the first field effect transistor and the second field effect transistor to form a path when the first field effect transistor is turned on.

Abstract: An electrostatic discharge (ESD) protection circuit is coupled between first and second power supply buses. The ESD protection circuit includes a detection circuit; a pull-up circuit, coupled to the detection circuit, comprising at least a first n-type transistor; a pull-down circuit, coupled to the pull-up circuit, comprising at least a second n-type transistor; and a bypass circuit, coupled to the pull-up and pull-down circuits, wherein the detection circuit is configured to detect whether an ESD event is present on either the first or the second bus so as to cause the pull-up and pull-down circuits to selectively enable the bypass circuit for providing a discharging path between the first and second power supply buses.

Abstract: To avoid the catastrophic failure of a drive, protection circuitry is configured to limit current in the DC bus capacitors. The drive may include an isolation circuit and a protection circuit having a comparator. The protection circuit may be configured to compare the voltage measured across a DC bus capacitor with a threshold voltage and activate the isolation circuit when the DC capacitor voltage exceeds the threshold voltage. The drive may also include a low voltage circuit coupled to the isolation circuit, where the low voltage circuit is configured to interrupt the bypass signal to disengage the bypass circuit and activate the precharge circuit when the isolation circuit is activated. Accordingly, the current in the drive and to the DC bus capacitors is limited by the precharge circuit when the voltage of a capacitor in the DC bus exceeds a threshold.