Abstract: A method of manufacturing a nitride semiconductor device includes: forming a first semiconductor layer containing Al, Ga, and N and having a first thickness by doping a p-type impurity; forming a second semiconductor layer over the first semiconductor layer without doping an n-type impurity and without doping a p-type impurity, the second semiconductor layer containing Al and N and having a second thickness; and heat treating the first semiconductor layer and the second semiconductor layer. The second thickness is less than the first thickness. T band gap energy of the second semiconductor layer is greater than a band gap energy of the first semiconductor layer. After the heat treating of the first semiconductor layer and the second semiconductor layer, the second semiconductor layer contains the p-type impurity by diffusion of the p-type impurity from the first semiconductor layer.

Abstract: A light-emitting diode device is provided. First and second green conversion materials are respectively configured to convert a blue light emitted from a blue light-emitting diode to generate a first green light with a first wavelength range and a first wavelength FWHM, and a second green light with a second wavelength range and a second wavelength FWHM. The second wavelength FWHM is smaller than the first wavelength FWHM. A lower bound of the first wavelength range is smaller than a lower bound of the second wavelength range, and an upper bound of the second wavelength range is greater than an upper bound of the first wavelength range. An output light emitted from the light-emitting diode device has a spectral characteristic of less than 50% of TÜV Rheinland and more than 90% of wide color gamut.

Abstract: An LED device includes an epitaxial layered structure, a current spreading layer, a first insulating layer and a reflective structure. The current spreading layer is formed on a surface of the epitaxial layered structure. The first insulating layer is formed over the current spreading layer, and is formed with at least one first through hole to expose the current spreading layer. The reflective structure is formed on the first insulating layer, extends into the first through hole, and contacts with the current spreading layer. The current spreading layer is formed with at least one opening structure to expose the surface of the epitaxial layered structure.

Abstract: A method for etching a semiconductor structure (110) is provided, the semiconductor structure comprising a sub-surface quantum structure (30) of a first III-V semiconductor material,beneath a surface layer (31) of a second III-V semiconductor material having a charge carrier density of less than 5×1017 cm?3. The sub-surface quantum structure may comprise, for example, a quantum well, or a quantum wire, or a quantum dot. The method comprises the steps of exposing the surface layer to an electrolyte (130), and applying a potential difference between the first III-V semiconductor material and the electrolyte, to electrochemically etch the sub-surface quantum structure (30) to form a plurality of nanostructures, while the surface layer (31) is not etched. A semiconductor structure, uses thereof, and devices incorporating such semiconductor structures are further provided.

Abstract: A method for forming a light emitting diode (LED) uses aluminum-based material layers and oxidation during the LED formation. In some embodiments, the method may include forming an n-type layer of the LED on a substrate, forming at least one sidewall restriction layer of the LED on the substrate with the sidewall restriction layer comprising an aluminum-based material, forming a quantum well layer of the LED on the substrate, forming a p-type layer of the LED on the substrate, exposing the substrate to water vapor, and heating the substrate to oxidize at least an outer portion of the electron blocking layer. The aluminum-based material may include aluminum indium nitride or aluminum gallium arsenide.

Abstract: A semiconductor light-emitting element includes: an n-type semiconductor layer; an active layer; a p-side contact electrode made of Rh; a p-side electrode covering layer made of Ti or TiN that covers the p-side contact electrode; a first protective layer made of SiO2 or SiON that covers an upper surface and a side surface of the p-side electrode covering layer in a portion different from that of a first p-side pad opening; a second protective layer made of Al2O3 that covers the first protective layer, a side surface of a p-side semiconductor layer, and a side surface of the active layer in a portion different from that of a second p-side pad opening; and a p-side pad electrode that is in contact with the p-side electrode covering layer in the first p-side pad opening and the second p-side pad opening.

Abstract: A semiconductor device includes a semiconductor element, a mount portion, and a sintered metal bond. The semiconductor element includes a body and an electrode pad. The body has an obverse surface facing forward in a first direction and a reverse surface facing rearward in the first direction. The electrode pad covers the element reverse surface. The mount portion supports the semiconductor element. The sintered metal bond electrically bonds the electrode pad and the mount portion. The sintered metal bond includes a first rear edge and a first front edge spaced forward in the first direction from the first rear edge. The electrode pad includes a second rear edge and a second front edge spaced forward in the first direction from the second rear edge. The first front edge of the metal bond is spaced rearward in the first direction from the second front edge of the pad.

Abstract: A semiconductor body and a method for producing a semiconductor body are disclosed. In an embodiment a semiconductor body includes a p-conducting region, wherein the p-conducting region has at least one barrier zone and a contact zone, wherein the barrier zone has a first magnesium concentration and a first aluminum concentration, wherein the contact zone has a second magnesium concentration and a second aluminum concentration, wherein the first aluminum concentration is greater than the second aluminum concentration, wherein the first magnesium concentration is at least ten times less than the second magnesium concentration, wherein the contact zone forms an outwardly exposed surface of the semiconductor body, and wherein the barrier zone adjoins the contact zone, and wherein the semiconductor body is based on a nitride compound semiconductor material.

Abstract: A method for transferring electroluminescent structures onto a face, referred to as the accommodating face, of an accommodating substrate. The accommodating face is moreover provided with interconnections intended to individually address each of the structures. The electroluminescent structures are initially formed on a supporting substrate and are separated by tracks. It is then proposed in the present invention to form reflective walls, vertically above the tracks, which comprise a supporting polymer (the second polymer) supporting a metal film on its sides. Such an arrangement of reflective walls makes it possible to reduce the stresses exerted on the electroluminescent structures during the transfer method according to the present invention. Moreover, the reflective walls, within the meaning of the present invention, may be produced on all the electroluminescent structures resting on a supporting substrate.

Abstract: A light-emitting diode (LED) device includes a light-emitting layer having a core-shell structure that comprises a first semiconductor layer, an active layer, and a second semiconductor layer; a passivation layer formed to cover at least a portion of a side surface and a portion of an upper surface of the second semiconductor layer; a first electrode formed on a portion of the passivation layer that is located on a side surface of the light-emitting layer, the first electrode electrically connected to the first semiconductor layer and including a reflective material; and a second electrode formed on a portion of the passivation layer that is located on an upper surface of the light-emitting layer, the second electrode contacting a portion of the upper surface of the second semiconductor layer that is exposed.

Abstract: An epitaxial structure, a preparation method thereof, and a light-emitting diode (LED) are provided. The epitaxial structure includes a sapphire substrate, a GaN layer, a defect exposure layer, and a defect termination layer stacked in sequence.

Abstract: A light emitting element includes: a semiconductor layered structure; a first electrically insulating film covering surfaces of the semiconductor layered structure and defining a first opening in each of a first region and a second region of a first semiconductor layer, and defining a second opening in a portion above a second semiconductor layer; a first electrode electrically connected to the first semiconductor layer through each first opening; a second electrode electrically connected to the second semiconductor layer through the second opening; a first terminal located on the first electrode and electrically connected to the first electrode; a second terminal located on the second electrode and electrically connected to the second electrode; and a metal member located on a portion of the first electrically insulating film located over the second semiconductor layer and electrically insulated from the first terminal and the second terminal.

Abstract: A display device may include: a substrate; first and second electrode on the substrate; light emitting element between the first and second electrodes; a barrier structure on the substrate and including a first surface, a second surface, and a third surface; a light conversion layer on the barrier structure; and a passivation layer on the light conversion layer. A first space defined by the second and third surfaces may be between the substrate and the barrier structure. A second space defined by the first and second surfaces may be between the barrier structure and the passivation layer. The first and second spaces may be alternately located in the first direction. The light emitting element may be in the first space. The light conversion layer may be in the at least one second space.

Abstract: A semiconductor device includes an active region in a substrate, at least one nano-sheet on the substrate and spaced apart from a top surface of the active region, a gate above or below the nano-sheet, a gate insulating layer between the at least one nano-sheet and the gate, and source/drain regions on the active region at both sides of the at least one nano-sheet. The at least one nano-sheet includes a channel region; a gate disposed above or below the nano-sheet and including a single metal layer having different compositions of metal atoms of a surface and an inside thereof; a gate insulating layer between the nano-sheet and the gate; and source/drain regions disposed in the active region of both sides of the at least one nano-sheet.

Abstract: A method includes: introducing a gas including gallium, an ammonia gas, and a gas including a p-type impurity to a reactor and forming a first p-type nitride semiconductor layer on a first light-emitting layer in a state in which the reactor has been heated to a first temperature; lowering a temperature of the reactor from the first temperature to a second temperature; introducing an ammonia gas with a first flow rate to the reactor and increasing the temperature of the reactor from the second temperature to a third temperature; and introducing a gas including gallium, an ammonia gas with a second flow rate, and a gas including an n-type impurity to the reactor, and forming a second n-type nitride semiconductor layer on the first p-type nitride semiconductor layer in a state in which the reactor has been heated to the third temperature.

Abstract: Examples of an integrated circuit with a contacting gate structure and a method for forming the integrated circuit are provided herein. In some examples, an integrated circuit device includes a memory cell that includes a plurality of fins and a gate extending over a first fin of the plurality of fins and a second fin of the plurality of fins. The gate includes a gate electrode that physically contacts the first fin and a gate dielectric disposed between the gate electrode and the second fin. In some such examples, the first fin includes a source/drain region and a doped region that physically contacts the gate electrode.

Abstract: An optoelectronic component and a method for manufacturing an optoelectronic component are disclosed. In an embodiment an optoelectronic component includes a diffractive optical element comprising at least one conversion material and a light source configured to emit primary radiation, wherein the conversion material is encapsulated in the diffractive optical element, and wherein the conversion material is arranged in a beam path of the primary radiation and is configured to convert the primary radiation at least partially into secondary radiation.

Abstract: A bi-directional optical module includes a substrate, at least one first light-emitting diode (LED), and at least one second LED. The first LED is disposed on a surface of the substrate. The first LED has a first reflection surface and a first light-outlet surface that are opposite to each other, and the first light-outlet surface is away from the substrate relative to the first reflection surface. The second LED is disposed on the same surface of the substrate. The second LED has a second reflection surface and a second light-outlet surface that are opposite to each other, and the second light-outlet surface is close to the substrate relative to the second reflection surface. The substrate has at least one light-transparent area that is not occupied by the first LED and the second LED.

Abstract: An electronic chip, system, and method includes a power block including a power source configured to provide power to components of the electronic chip and a relay circuit coupled to the power source and a ground plane. The electronic chip further includes chip package having a first major side and a second major side, the power block secured to the second major side, the chip package comprising electrical connections, disposed on the second major side, to be secured with respect to a circuit board, and interconnect circuitry, electrically coupling the power block to ground, comprising a plurality of conductive layers, a conductive through hole, electrically connecting a first pair of the plurality of conductive layers, having a first width, and a via, electrically connecting a second pair of the plurality of conductive layers, having a second width less than the first width.

Abstract: A semiconductor device includes a first semiconductor chip including a first substrate, a plurality of first dielectric layers and a plurality of conductive lines formed in the first dielectric layers over the first substrate. The semiconductor device further includes a second semiconductor chip having a surface bonded to a first surface of the first semiconductor chip, the second semiconductor chip including a second substrate, a plurality of second dielectric layers and a plurality of second conductive lines formed in the second dielectric layers over the second substrate. The semiconductor device further includes a first conductive feature extending from the first semiconductor chip to one of the plurality of second conductive lines, and a first seal ring structure extending from the first semiconductor chip to the second semiconductor chip.