Abstract: An inventive solution directed to an apparatus and system for creating a dynamic ambient lighting experience wherein the level of brightness increases and decreases along a horizonal path to create an impression of linear movement. This simulates the traversal of the sun along its horizon. The device comprising subsection units which may be coordinated to increase or decrease length. The time and speed for dimming and brightening of light from start to finish along the length of the device may be defined by preconfigured parameters or customized to desired setting. The device creating a diurnal pattern of light transition and movement along the length of an indoor space subject to the peripheral view of the observer.

Abstract: The present disclosure provides a loop antenna system, including a back cover, a main board, a plastic back shell, and a loop antenna. The loop antenna including a first loop radiating unit, a second loop radiating unit, and a connecting member connecting the first loop radiating unit and the second loop radiating unit. Compared with the related technologies, the loop antenna system provided in the present disclosure has the following advantageous effects: by disposing a connecting member over an earphone base, the problem is solved that limitation to the thickness of a conventional entire structure results in that no bracket may be disposed over an earphone base, thereby eliminating the limitation to layout of an antenna by an earphone base. The present disclosure also provides a mobile terminal.

Abstract: A transmission/reception system 1 includes a transmission device 10 and a reception device 20 that is connected to each other through differential signal lines 30 and a signal line 40, and receives a differential signal that is sent out from the transmission device 10 using the reception device 20. The transmission device 10 includes a signal output unit 11, a request input unit 12, and a resistor 13. The signal output unit 11 sends out a differential signal from a pair of output terminals P111 and P112 that are connected to the differential signal lines 30. A common voltage of each of the pair of output terminals P111 and P112 is constant over a state where no electric power is supplied and an idle state.

Abstract: A wafer-based charged particle accelerator includes a charged particle source and at least one RF charged particle accelerator wafer sub-assembly and a power supply coupled to the at least one RF charged particle accelerator wafer sub-assembly. The wafer-based charged particle accelerator may further include a beam current-sensor. The wafer-based charged particle accelerator may further include at least a second RF charged particle accelerator wafer sub-assembly and at least one ESQ charged particle focusing wafer. Fabrication methods are disclosed for RF charged particle accelerator wafer sub-assemblies, ESQ charged particle focusing wafers, and the wafer-based charged particle accelerator.

Abstract: An optical apparatus using multi-wavelength light, includes a substrate, and a light emitting array disposed on the substrate, and comprising a plurality of light emitting devices emitting a plurality of lights having different wavelengths. The optical apparatus includes a controller configured to control the light emitting array such that the plurality of lights are modulated differently and emitted simultaneously.

Abstract: A top fed, wide band, dual pitch, quadrifilar helix antenna with hemispherical radiation pattern coverage with a reduced back lobe over a wide bandwidth is described wherein one end of the antenna's helix has a high pitch angle that adjoins the other end of the helix with a low pitch angle. The dual pitch angles provide stable radiation patterns and exceptional impedance response to support ultra-high frequency, ultra-high frequency follow-on and mobile user object system circuits. Broadband performance is further aided by providing a radome that dielectrically loads the antenna.

Abstract: A high voltage switch comprising: a high voltage power supply providing power greater than about 5 kV; a control voltage power source; a plurality of switch modules arranged in series with respect to each other each of the plurality of switch modules configured to switch power from the high voltage power supply, and an output configured to output a pulsed output signal having a voltage greater than the rating of any switch of the plurality of switch modules, a pulse width less than 2 ?s, and at a pulse frequency greater than 10 kHz.

Abstract: A system may include: a first memory device; a second memory device; a third memory device; and a fourth memory device, wherein the first memory device to the fourth memory device are configured to share a resistor for impedance matching, wherein the first memory device to the fourth memory device are coupled to have a chain shape, wherein the forth memory device generates a completion signal when performance is completed and the first memory device receives the completion signal provided from the fourth memory device.

Abstract: A memory system includes an external calibration device that has a predetermined impedance and a first memory device with a first pad for selective connection to the external calibration device. The first memory device also includes an internal calibration device having an impedance that is programmable and a second pad connected to the internal calibration device. The system further includes a second memory device having a third pad for selective connection to the second pad of the first memory device. A processing device is operatively coupled to the first memory device and the second memory device. The processing device programs the impedance of the internal calibration device of the first memory device based on the external calibration device, and programs an impedance of a termination component in the second memory device based on the impedance of the internal calibration device of the first memory device.

Abstract: A bus driver module with controlled circuit is connected to a controller area network bus for generating a high side output or a low side output, comprising a transition controlled circuit and an output driver. The transition controlled circuit comprises a first pathway controlled unit connected in parallel with a second pathway controlled unit for generating a side switching voltage. The output driver is connected in series with the transition controlled circuit and receives the side switching voltage so as to accordingly generate the output bus signal. Each of the first and second pathway controlled unit comprises a plurality of switches and can be activated depending on an input signal. By controlling the switches of the first or second pathway controlled unit to be sequentially turned on and off successively, the side switching voltage is characterized by a smooth phase transition, low common mode noise and better EMI performances.

Abstract: Various implementations described herein refer to a method for providing an integrated circuit with a real-time clock source. The method may include generating a real-time clock signal for the integrated circuit with the real-time clock source. The method may include selectively adjusting clock frequency of the real-time clock signal to save power in the integrated circuit.

Abstract: A power supply unit for an illumination device that includes a multi-mode power supply configured to supply power to an illumination device having one or more LED modules and a control circuit. The multi-mode power supply includes a primary power supply component configured to supply power to non-essential components of the illumination device, and a secondary power supply component configured to supply power to only essential components of the illumination device. The nonessential components include the one or more LED modules, and the essential components include the control circuit but not the one or more LED modules.

Abstract: A three-dimensional programmable interconnection system based on a multi-chip package includes: a programmable metal bump or pad at a bottom of the multi-chip package; a first programmable interconnect provided by an interposer of the multi-chip package; a second programmable interconnect provided by the interposer; and a switch provided by a first semiconductor chip of the multi-chip package, wherein the switch is configured to control connection between the first and second programmable interconnects, wherein the programmable metal bump or pad couples to a second semiconductor chip of the multi-chip package through the switch and the first and second programmable interconnects, wherein the first and second semiconductor chips are over the interposer.

Abstract: The present subject matter relates to devices, systems, and methods for beam steering in which a configurable antenna assembly includes a first antenna element configured to radiate in a first broadside direction and a second antenna element configured to radiate in an endfire direction. In some embodiments, the configurable antenna assembly further includes a third antenna element configured to radiate in a second broadside direction substantially opposite to the first broadside direction. Such devices, systems, and methods can further be configured such that one of the antenna elements is selectively connected to a common signal feed.

Abstract: A linear accelerator head for use in a medical radiation therapy system can include a housing, an electron generator configured to emit electrons along a beam path, and a microwave generation assembly. The linear accelerator head may include a waveguide that is configured to contain a standing or travelling microwave. The waveguide can include a plurality of cells that are disposed adjacent one another, wherein each of the plurality of cells may define an aperture configured to receive electrons therethrough. The linear accelerator head can further include a converter and a primary collimator.

Abstract: The radome (10) comprises a substrate (18) formed of a radio transmissive resin, the substrate (18) having a proximal face and a distal face; a decoration layer (20) applied to the proximal face, the decoration layer (20) comprising a metalloid or a metalloid alloy deposited on the surface of the proximal face; and a first radio transmissive resin layer (22) partially overlying the decoration layer (20), wherein it also comprises a second radio transmissive resin layer (21) overlying entirely the first radio transmissive resin layer (22), including the areas of the decoration layer (20) not overlaid by said first radio transmissive resin layer (22). It permits to implement decorative radomes in geometries where ink overlay is not suitable or it is not possible, e.g. in pieces with a high relief or great dimensions.

Abstract: A source assembly is provided for a transverse electromagnetic (TEM) system. The source assembly includes a first guide and a second guide. The first guide is configured to receive a signal from a supply, and includes a first shell defining a first cavity. The first guide is configured to extend proximate an upper plate of the TEM system. The second guide is configured to receive a reference signal from the supply. The second guide includes a second shell defining a second cavity. The second guide is configured to extend proximate a lower plate of the TEM system, and is spaced a distance from the first guide to define a gap having a gap width. At least one of the first guide or second guide includes an access opening configured to provide access to at least one of the first cavity or the second cavity.

Abstract: A vehicle headlamp system includes a vehicle supported power and control system including a data bus. A sensor module can be connected to the data bus to provide information related to environmental conditions or information relating to presence and position of other vehicles and pedestrians. A separate headlamp controller can be connected to the vehicle supported power and control system and the sensor module through the bus. The headlamp controller can include an image frame buffer that can refresh held images at greater than 30 Hz speed. An active LED pixel array can be connected to the headlamp controller to project light according to a pattern and intensity defined by the image held in the image frame buffer and a standby image buffer can be connected to the image frame buffer to hold a default image.

Abstract: A logic cell structure includes: a first portion, with a first height, arranged to be a first layout of a first semiconductor element; a second portion, with the first height, arranged to be a second layout of a second semiconductor element, wherein the first portion is separated from the second portion; and a third portion arranged to be a third layout of an interconnecting path used for coupling the first semiconductor element and the second semiconductor element.

Abstract: A current matching circuit includes a plurality of LED driver circuits. A current to voltage converter circuit is coupled to the plurality of LED driver circuits to generate a plurality of voltage signals. Each one of the plurality of voltage signals is representative of a respective output current through a corresponding one of the plurality of LED driver circuits. A comparison circuit is coupled to the current to voltage converter circuit to compare the plurality of voltage signals. An adjustment circuit is coupled to the comparison circuit and the plurality of LED driver circuits. The adjustment circuit is configured to trim the plurality of LED driver circuits in response to the comparison circuit such that each respective output current through the plurality of LED driver circuits is substantially equal.