Abstract: The present invention provides a display panel and a display device. The display panel includes a main display region and at least one function add-on region, the function add-on region includes at least one display light-transmitting region, a plurality of first pixel driving circuits are disposed at a periphery of the display light-transmitting region, and a multiple layers transparent lines is disposed to electrically connect a first pixel anode and the first pixel driving circuits to drive first display pixels to emit light, which is beneficial for increasing wiring space, as well as improving light transmittance, photographing effect, and display effect of under-screen cameras.

Abstract: A wafer structure and a trimming method thereof are provided. The trimming method includes the following steps. A first wafer having a first surface and a second surface opposite to the first surface is provided. A first pre-trimming mark is formed on the first surface of the first wafer, where forming the first pre-trimming mark includes forming a plurality of recesses arranged as a path along a periphery of the first wafer. The first wafer is trimmed on the first pre-trimming mark and along the path of the first pre-trimming mark to remove a portion of the first wafer and form a trimmed edge having first regions thereon.

Abstract: The present disclosure relates to an organic electroluminescent compound represented by formula 1 and an organic electroluminescent device comprising the same. By comprising the organic electroluminescent compound of the present disclosure, an organic electroluminescent device having improved driving voltage, luminous efficiency, and/or lifespan characteristics can be provided.

Abstract: Disclosed are a display panel, a display method thereof, a display device, and a fine metal mask, and a display area of the display substrate includes a first display sub-area and a second display sub-area, where a plurality of uniformly distributed sub-pixels are arranged in the second display sub-area, and a distribution density of pixels in the first display sub-area is higher than a distribution density of pixels in the second display sub-area.

Abstract: An embodiment of a semiconductor package includes a leadframe having leads, a mold compound partly encasing the leadframe so that the leads protrude from the mold compound, a power transistor die attached to the leadframe at a first side of the leadframe, and a driver die attached to the leadframe at a second side of the leadframe opposite the first side so that the power transistor die and the driver die are disposed in a stacked arrangement. The driver die is configured to control the power transistor die. The driver die is in direct electrical communication with the power transistor die only through the leadframe and any interconnects which attach the power transistor die and the driver die to the leadframe. Corresponding methods of manufacturing the semiconductor package are also described.

Abstract: In one or more embodiments, a stretchable display device includes a lower substrate on which a display area displaying an image and a non-display area adjacent to the display area are defined. A plurality of pixel substrates is disposed in the display area, and a plurality of outer substrates is disposed in the non-display area. A plurality of pixels is disposed on the plurality of pixel substrates. A plurality of gate drivers is disposed on the plurality of outer substrates and outputting gate voltages to the plurality of pixels. Thus, even in a state in which the stretchable display device is stretched, the pixels can be normally driven.

Abstract: A display device includes: a substrate; an inorganic insulating layer disposed on the substrate; a conductor disposed on the inorganic insulating layer; and an organic insulating layer disposed on the conductor, where an opening is defined through the organic insulating layer to expose a part of the upper surface of the conductor, and at least one material selected from a siloxane, a thiol, a phosphate, a disulfide including a sulfur series, and an amine is bonded on the part of the upper surface of the conductor exposed through the opening.

Abstract: A display device and a method of the display device are provided. The display device includes a lower metal layer on a substrate, a buffer layer on the lower metal layer, a first semiconductor layer on the buffer layer, a gate insulating layer on the first semiconductor layer, a first gate electrode on the gate insulating layer, an interlayer insulating layer on the first gate electrode, a via layer on the interlayer insulating layer, a pixel electrode on the via layer and electrically connected to the first semiconductor layer, a light emitting layer on the pixel electrode, a common electrode on the light emitting layer, a first contact hole penetrating the buffer layer and the interlayer insulating layer and a second contact hole penetrating the interlayer insulating layer, and a first via hole and a second via hole each penetrating the via layer.

Abstract: A semiconductor device and a method for fabricating the same. The semiconductor device includes a substrate and at least one trench line formed within the substrate. The semiconductor device further includes a self-aligned landing pad in contact with the at least one trench line, and a magnetic tunnel junction stack formed on and in contact with the self-aligned landing pad. The method includes forming a conductive layer on and in contact with at least one trench line formed within a substrate. Magnetic tunnel junction stack layers are deposited on and in contact with the conductive layer. The magnetic tunnel junction stack layers are etched to form a magnetic tunnel junction stack, where the etching stops on the conductive layer.

Abstract: A display panel, an electronic device and a method of fabricating thereof. The display panel is a laminated structure comprising a substrate, a thin film transistor layer on the substrate, a pixel defining layer on the thin film transistor layer, and a light emitting structure on the pixel defining layer. The light emitting structure comprises a plurality of transparent regions and a plurality of light emitting regions disposed at intervals, the transparent regions correspond to light sensors. The light emitting structure comprises a first light extraction layer disposed in the transparent region.

Abstract: The current disclosure describes techniques for individually selecting the number of channel strips for a device. The channel strips are selected by defining a three-dimensional active region that include a surface active area and a depth/height. Semiconductor strips in the active region are selected as channel strips. Semiconductor strips contained in the active region will be configured to be channel strips. Semiconductor strips not included in the active region are not selected as channel strips and are separated from source/drain structures by an auxiliary buffer layer.

Abstract: An organic light-emitting diode (OLED) display panel and a manufacturing method thereof are provided. An organic material and an inorganic nano-particle material are placed in a crucible under a high-pressure gas after vacuuming, the inorganic nanoparticles and the organic material are highly uniformly mixed during an evaporation process, and an encapsulation layer is formed integrally into one piece by adjusting an evaporation rate ratio of the organic material to the inorganic nano-particle material. The film layer stability and transmittance are optimized, and the inorganic nanoparticles are uniformly distributed, thereby improving the light transmittance of the OLED display panel.

Abstract: A display device includes a substrate including a first area and a second area, main pixel groups, auxiliary pixel groups, first signal lines, and second signal lines, wherein a distance between adjacent ones of the first signal lines in the second area gradually decreases toward outer regions of the second area from a center of the second area, and a distance between adjacent ones of the second signal lines in the second area gradually decreases toward the outer regions of the second area from the center of the second area.

Abstract: A bipolar junction transistor is provided with a multilayer collector structure. The layers of the collector are individually grown in separate epitaxial growth stages. For a PNP transistor, each layer, after it is grown, is doped with a p-type dopant in a dedicated implant stage. By providing separate epitaxial growth stages and separate dopant implant stages for each layer of the collector, the dopant concentration profile in the collector region can be better controlled to optimize the speed and breakdown voltage of a bipolar junction transistor.

Abstract: Arrangements of the present disclosure relate to an array substrate, a display panel and a display device. The array substrate includes a circuit region and a boundary region. The circuit region includes a plurality of stacked conductive layers and an interlayer dielectric disposed between every two adjacent conductive layers. One or more first via holes are provided on the interlayer dielectric. The boundary region is disposed outside the circuit region. One or more second via holes for improving uniformity of the first via holes in the circuit region are disposed within a preset range of the boundary region close to one side of the circuit region. The second via holes and the first via holes are disposed on the same interlayer dielectric.

Abstract: An integrated circuit assembly including a first wafer bonded to a second wafer with an oxide layer, wherein a first surface of the first wafer is bonded to a first surface of the second wafer. The assembly can include a bonding oxide on a second surface of the second wafer, wherein a surface of the bonding oxide is polished. The assembly can further include a shim secured to the bonding oxide on the second surface of the second wafer to reduce bow of the circuit assembly.

Abstract: First, second, and third trenches are formed in a layer over a substrate. The third trench is substantially wider than the first and second trenches. The first, second, and third trenches are partially filled with a first conductive material. A first anti-reflective material is coated over the first, second, and third trenches. The first anti-reflective material has a first surface topography variation. A first etch-back process is performed to partially remove the first anti-reflective material. Thereafter, a second anti-reflective material is coated over the first anti-reflective material. The second anti-reflective material has a second surface topography variation that is smaller than the first surface topography variation. A second etch-back process is performed to at least partially remove the second anti-reflective material in the first and second trenches. Thereafter, the first conductive material is partially removed in the first and second trenches.

Abstract: A display wiring line provided on a resin substrate layer, a flattening film covering the display wiring line, and an organic EL element provided on the flattening film are provided. The display wiring line includes first to third conductive layers layered sequentially from the resin substrate layer side. In the display wiring line, the second conductive layer is formed with a width smaller than a width of each of the first conductive layer and the third conductive layer, and a portion of a perimeter edge surface corresponding to the second conductive layer includes a recessed portion, and a resin cover covering a perimeter edge surface of the second conductive layer is provided in the recessed portion in a portion of the display wiring line exposed from the flattening film.

Abstract: A hermetically sealed electronic package may include a thermal panel having a panel interior surface and a panel exterior surface with electronic device(s) in thermal communication with the panel interior surface. An enclosure, isolating environmental communication from internal electronic devices and modules, may be coupled to the thermal panel, and the enclosure may have an enclosure interior surface and an enclosure exterior surface. A plurality of electrical feedthroughs may be coupled to the package enclosure for signal and data transmission, and the conducting pin(s) in every electrical feedthrough may be bonded by a hydrophobic sealing material for harsh environmental electrical signal, data and power transmission. The ratio of sealing length over sealing bead diameter in the electrical feedthrough subassembly may have a preferred value from 2 to 3; and the ratio of the sealing bead diameter over pin diameter in the electrical feedthrough subassembly may have a preferred value from 1.5 to 2.

Abstract: The embodiments of the disclosure disclose a flexible substrate, a fabrication method thereof, and a flexible display apparatus. The flexible substrate includes a first organic layer, an inorganic buffer layer, and a second organic layer. The inorganic buffer layer is between the first organic layer and the second organic layer. The second organic layer includes inorganic nano-particles. The expansion coefficient of the flexible substrate provided by the embodiment of the present disclosure is more matched with that of the rigid auxiliary substrate, so as to reduce the risk of warping of the rigid auxiliary substrate and then improve the process accuracy when fabricating the display device.