Abstract: Enhanced realism of a real-time simulator having multiple computer-controlled units results from making the units capable of reacting to only those other units that each of them can be aware of because of their spatial relationships to the unit. Awareness is based upon probabilities; it can persist after a relationship changes; and it can be influenced by a units designation of a target. Each unit selects a target based upon a score incorporating multiple aspects of its tactical situation, and can change targets when the situation changes. A unit selects a strategy in response to which of a set of tactical configurations exist between the unit and its target; the strategy can change short of completion when the configuration changes. A plan produces guidance commands from the high-level strategy. The guidance commands are converted into control settings for guiding the subject unit using a physics engine for simulating the physical dynamics of the unit.

Abstract: In a computer system having a plurality of peripheral devices, a data transfer system for implementing transparent direct communication between the devices and the computer system. The system of the present invention includes a switch having a plurality of ports. Each of the plurality of ports is adapted to couple to a respective one of a plurality of devices. Each of the plurality of ports is further adapted to accept data from its respective device and transmit data to its respective device in a bi-directional manner.

Abstract: Verification systems which employ automata-theoretic formal verification use a model automaton made from a system process (203) representing the system and a task automaton (205) representing the task and use the model automaton to test (217) whether the language of the system process is contained in the language of the task automaton. An improved technique reduces the computational complexity of the language containment testing by producing a model (216) which represents a system which has been automatically localized with regard to a task. Another technique reduces the computational complexity of stepwise refinement (208). In stepwise refinement, the system automaton is refined a step at a time until it reaches the complexity of a practical implementation. The computational complexity of the stepwise refinement is reduced by a technique which permits language containment to be tested using a set of models made from process-automaton pairs rather than process-process pairs.

Abstract: The pump station control system and method monitors and displays a time history of the operating parameters of a pump station. Sensed operating parameters are transmitted to an operator in real time and are stored at predetermined time intervals over a predetermined period of time. A real-time cost parameter of the system is calculated that provides a measure of the cost per throughput of the material being pumped. The system can be optimized for the cost parameter by controlling system variables such as pump speed in response to the level of fluid.

Abstract: A system and process for calibrating the presentation of stimuli and/or hit window by ascertaining the hit window relative to stimuli presented on a computer. The system includes a first circuit for generating the stimuli, and a second circuit for simulating responses to the stimuli. The response initially does not overlap the hit window and causes an incorrect response cue to be generated. Either the start time of the response or the duration of the response may then iteratively be modified to cause the response to eventually overlap the hit window, thereby generating a correct response cue. The two consecutive responses that cause the hit window to be nonoverlapped and then overlapped are identified for the purpose of ascertaining the range of time that includes the start of the hit window. Either the start time of the response or the duration of the response may be iteratively varied to cause the hit window to be nonoverlapped by the response, thereby causing the incorrect response cue to be generated.

Abstract: A method for designing an aircraft to ground communications system identifies a plurality of unique functions in the communications system. The components, hardware and software, necessary to implement each of the plurality of unique functions are isolated such that the components for implementing a specific function are partitioned to allow independent testing and certification of the hardware and software components for each unique function.

Abstract: Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power, and cost goals. Embedded systems are generally specified in terms of a set of acyclic task graphs. According to one embodiment of the present invention, a co-synthesis algorithm, called COSYN, starts with periodic task graphs with real-time constraints and produces a low-cost heterogeneous distributed embedded system architecture meeting these constraints. The algorithm has the following features: 1) it allows the use of multiple types of processing elements (PEs) and inter-PE communication links, where the links can take various forms (point-to-point, bus, local area network, etc.

Abstract: The invention provides an apparatus and a method for accurately and rapidly estimating a performance of an integrated circuit in the design at a register transfer level. A parsing member converts an HDL description of the integrated circuit at the register transfer level into a representation by using parse trees, and a parse tree allocation member allocates elements of the integrated circuit to respective nodes of the parse trees. A trade-off estimation member predicts a minimum area which can satisfy a timing constraint by applying estimation models stored in an estimation library to the respective elements of the integrated circuit represented by using connections between the elements, and by appropriately changing application of driver models stored in a driver library.

Abstract: A method and system for engineering a drilling bit program linked to rock removal at a cutting element/formation interface and specific to drilling of one or more wells in a given geographic area is disclosed. The system includes a first arrangement for planning the drilling of a particular well based upon a cascaded planning input and providing an engineered output which is a function of the cascaded planning input, wherein a level of the engineered output being dependent upon a level of the cascaded planning input. A second arrangement is provided for implementing the engineered output in the drilling of the particular well is also provided. Lastly, a third arrangement is provided for evaluating the implementation of the engineered output for the drilling of the particular well and providing an evaluation output. The evaluation output can be used by the planning arrangement as additional planning input for planning the drilling of a subsequent well in the geographic area.

Abstract: A method of initializing a CPU (14) to run emulation code from a debugger (11). Emulation logic (13) associated with the CPU (14) has a finite state machine (13b) with three modes: a reset mode in which no requests from said debugger or said CPU are serviced, a normal mode in which requests from said debugger are given priority, and a start-up mode in which only requests from said debugger are serviced. For initialization, the finite state machine (13b) is placed in reset mode and held in reset while the start-up mode is requested. When the reset mode is released the start-up mode is immediately serviced. This permits an initialization state to be cleanly applied to the CPU (14).

Abstract: A type annotation technique such that expressions are assigned and annotated with types in such a way that types can be efficiently maintained during inference without new syntactic restrictions being placed on the expressions or underlying logic within the verification system. More particularly, in accordance with the technique, expressions, i.e. terms, are annotated using a particular labeling scheme such that, during verification, if an expression is annotated the verification may proceed without any additional type inference or type checking with regard to that expression.

Abstract: A diffusion simulating method which is capable of defining an impurity flux even if one impurity in one material region is changed into plural types of impurities in the other material region on a material interface. For simulating the diffusion of the impurities in a system which includes a first material region, a second material region and a interface disposed between the first material region and the second material region, impurity flux J(i.sub.A,j.sub.B) on the A/B interface is defined between optional impurity i.sub.A in material region A and optional impurity j.sub.B in material region B. Then, total fluxes J.sup.total (i.sub.A), J.sup.total (j.sub.B) of each type of impurity are determined and added to impurity diffusion equations, and simultaneous equations are set up by these diffusion equations and solved.

Abstract: Disclosed is a method for attaching SCSI tape devices which may only read in a forward direction to an S/390 compatible computer system. This involves translating S/390 I/O operations for channel communication by emulating an S/390 "Read Backwards" channel command with a single "Read Backwards" routine to be used for all SCSI tape drives regardless of read capabilities in the backward direction. The emulation of a S/390 "Read Backwards" channel command includes using a combination of existing tape positioning commands, including: the RF (Read Forward) command, parsing technique to obtain the appropriate bytes to be stored into memory, and calculation for the residual byte count.

Abstract: A simulation device comprises an equation generating unit for generating a simultaneous linear equation by application of the implicit integration formula and the Newton iteration method to the description data of an electronic circuit to be simulated, a plurality of block ILU factorization units for performing incomplete LU factorization processing in parallel on each block in a coefficient matrix of the generated simultaneous linear equation, a plurality of fill-in adding units for adding a plurality of fills-in generated by the incomplete LU factorization to a combined portion of coefficient matrices, in parallel, a plurality of line collection ILU factorization units for ILU-factorizing each of several line collections on the combined portion where the fills-in are added, and a convergent solution judging unit for repeating a series of the above processing until convergence of a solution in the simultaneous linear equation generated by the equation generating unit is reached.

Abstract: A system and method for automated design verification. A test bench stimulates a simulated design with test vectors. A coverage analysis tool monitors output data from the simulated design and identifies portions of the simulated design that remain to be tested. A test generator produces and sends test vectors to the test bench which exercise (i.e., test) the portions of the simulated design that the coverage analysis tool has indicated still remain untested. In the method, a first step executes a simulated design on a test bench. A second step interprets the simulated design as if this design were a state diagram composed of a set of basic blocks interconnected by transition arcs. A third step generates test vectors to exercise some of the basic blocks and transition arcs. A fourth step reports the basic blocks and transition arcs which have not been tested. A fifth step generates a new set of test vectors to exercise the as yet untested basic blocks and transition arcs.

Abstract: An emulated computer system includes an instruction processor which directly executes a set of native instructions. Stored in a memory, which is coupled to the instruction processor, are a plurality of foreign user programs and a foreign operating system, each of which is a compilation of foreign instructions and data. Also stored in the memory is an emulator program which is a compilation of the native instructions that interprets the foreign instructions, and a native operating system which is a compilation of the native instructions under which the emulator program is run. To diagnose faults in this emulated computer system, a heterogeneous diagnostic program is provided in the memory, which is a compilation of the native instructions that reads the foreign user programs and foreign operating system from the memory and stores them in a reformatted form on a magnetic media.

Abstract: A method, an apparatus, and an article for manufacture for modeling an eddy current probe and simulating an eddy current examination of a material is presented. An eddy current probe model of the eddy current probe is produced using a first numerical technique, such as the finite element method. A magnetic vector potential for a surface is obtained from the eddy current probe model, and is transformed. A material model of the material is produced using a second numerical technique, such as the volume integral method or the boundary element method. An examination of the material is simulated using the transformed magnetic vector potential and the material model.

Abstract: An system and methodology procedure agglomeratively estimates a phylogenetic tree from MSA input data by creating a data model represented by each tree node by first estimating the number of independent observations in the data. A preferably relative entropy distance measurement made among nodes between subtrees determines which nodes in the model to merge at each agglomeration step. Cuts in the phylogenetic tree are made at points in the agglomeration at which minimized encoding cost is determined, preferably by using Dirichlet mixture densities to assign probabilities to observed amino acids within each subfamily at each position. Using subtree data, a statistical model, e.g., a profile or hidden Markov model, for each subfamily may be constructed in a position-dependent manner, which permits identifying remote homologs in a database search. Further, the invention provides an alignment analysis to identify key functional or structural residues.

Abstract: An interactive multimedia application executes in a debug mode in which a tester can specify a particular classification of user event and a user event satisfying the particular classification is emulated. For example, classifications can include correct and incorrect responses. To emulate a correct response, an interactive module of the interactive multimedia application determines correct criteria and provides those criteria to a debug manager upon request. In addition, characterization of user events is performed by a user interface module which communicates user events in the form of event messages to the interactive module. The debug manager emulates a user event of the particular category by retrieving the classification criteria from the interactive module, forming an event message representing an event satisfying the criteria for the particular classification, and sending the event message to the interactive module.

Abstract: There is disclosed a method for designing an electrical filter comprising the steps of: a) selecting at least one determined function called seed function; b) determining the product of all these seed functions to define a transfer function generating function of the electrical filter; c) translating the electrical filter transfer function into transmission zeroes and poles; d) and synthesizing those electrical filter dimensions that achieve the required zeroes and poles. A particular application is aimed at a Chebycheff filter comprised of serially arranged resonant cavities and couplers, operating in the microwave range.