Patents Examined by Dung Le
  • Patent number: 10892355
    Abstract: Presented is a lateral fin static induction transistor including a semi conductive substrate, source and drain regions extending from an optional buffer layer of same or varied thickness supported by the semi conductive substrate, a semi conductive channel electrically coupling the source region to the drain region of the transistor, a portion of the semi conductive channel being a fin and having a face covered by a gated structure, thereby defining a gated channel within the semi conductive channel, the semi conductive channel further including a drift region electrically coupling the gated channel to the drain region of the transistor.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: January 12, 2021
    Assignee: HRL Laboratories, LLC
    Inventor: Biqin Huang
  • Patent number: 10892219
    Abstract: Disclosed is an embedded multi-die interconnect bridge (EMIB) substrate. The EMIB substrate can comprise an organic substrate, a bridge embedded in the organic substrate and a plurality of routing layers. The plurality of routing layers can be embedded within the bridge. Each routing layer can have a plurality of traces. Each of the plurality of routing layers can have a coefficient of thermal expansion (CTE) that varies from an adjacent routing layer.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: January 12, 2021
    Assignee: Intel Corporation
    Inventors: Srinivas V. Pietambaram, Rahul N. Manepalli
  • Patent number: 10886360
    Abstract: A display panel and a manufacturing method thereof. The display panel includes a base substrate, and a pixel area and a non-pixel area on the substrate. The pixel area includes a light emitting element, the light emitting element including a first electrode, a light emitting layer, and a second electrode which are sequentially on the base substrate; the non-pixel area includes a first structural area, the first structural area including a conductive supporting block on one side of the light emitting layer close to the base substrate; the display panel further includes an electric connection layer which is on one side, which is away from the base substrate, of the light emitting element and the first structural area; the second electrode of the light emitting element is electrically connected with the electric connection layer, and is electrically connected with the conductive supporting block through the electric connection layer.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: January 5, 2021
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Jiewei Li, Dandan Zang, Yachao Tong, Chuan Yin, Xianjiang Xiong, Yong Cui
  • Patent number: 10886370
    Abstract: A silicon carbide body includes a drift structure having a first conductivity type, a body region, and a shielding region. The body and shielding regions, of a second conductivity type, are located between the drift structure and a first surface of the silicon carbide body. First and second trench gate stripes extend into the silicon carbide body. The body region is in contact with a first sidewall of the first trench gate stripe. The shielding region is in contact with a second sidewall of the second trench gate stripe. The second sidewall has a first length in a lateral first direction parallel to the first surface. A supplementary region of the first conductivity type contacts one or more interface areas of the second sidewall. The one or more interface areas have a combined second length along the first direction, the second length being at most 40% of the first length.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: January 5, 2021
    Assignee: Infineon Technologies AG
    Inventors: Florian Grasse, Axel Sascha Baier, Wolfgang Bergner, Barbara Englert, Christian Strenger
  • Patent number: 10886314
    Abstract: [Object] To achieve a high-sensitivity radiation detector. [Solution] An amplifying transistor (3) is configured such that a photodiode (1) receives light with the amplifying transistor (3) conductive.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: January 5, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masahiro Shiota, Shigenari Taguchi, Takahiro Shindoh, Kunihiko Iizuka, Nobuyuki Ashida
  • Patent number: 10886442
    Abstract: A phosphor containing particle including a core portion which is a particulate matter of resin including a constitutional unit derived from an ionic liquid with a semiconductor nanoparticle phosphor dispersed therein and a shell portion which is a matter in a form of a layer of resin which includes a constitutional unit derived from an ionic liquid and coats at least a portion of the core portion, and a phosphor containing particle including a particulate matter of resin including a constitutional unit derived from an ionic liquid with a semiconductor nanoparticle phosphor dispersed therein and a metal oxide layer coating at least a portion of the particulate matter of resin. A light emitting device including a light source and a wavelength converter in which phosphor containing particles are dispersed in a translucent medium, and a phosphor containing sheet in which phosphor containing particles are dispersed in a sheet-shaped translucent medium.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: January 5, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tatsuya Ryohwa, Kanako Nakata, Hiroshi Fukunaga, Makoto Izumi
  • Patent number: 10886296
    Abstract: A three-dimensional semiconductor device is disclosed. The device may include an electrode structure that can include a plurality of electrodes that are stacked on a substrate and extend in a first direction. Vertical structures can penetrate the electrode structure to provide a plurality of columns spaced apart from each other in a second direction crossing the first direction. The plurality of columns can include first and second edge columns located adjacent to respective opposite edges of the electrode structure, and the plurality of columns can include a center column located between the first and second edge columns. Distances between adjacent ones of the plurality of columns can decrease in a direction from the first and second edge columns toward the center column.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: January 5, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungjoong Kim, Joon-Sung Lim, Sung-Min Hwang
  • Patent number: 10886503
    Abstract: Novel microlens array architectures for enhanced light outcoupling from light emission are provided. Organic light emitting devices (OLEDs) that include an outcoupling layer including these novel microlens array architectures and method for fabricating such OLEDs are provided. These devices may be used to provide OLEDs with optimized light extraction.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: January 5, 2021
    Assignees: Universal Display Corporation, Kent State University
    Inventors: Yue Cui, Deng-ke Yang, Ruiqing Ma, Gregory McGraw, Julia J. Brown
  • Patent number: 10879293
    Abstract: There is provided a solid-state imaging device capable of reducing the number of wiring layers and achieving downsizing with flexible layout designing. The solid-state imaging device includes a first semiconductor chip including a first electrode pad, first wiring connected to a first electrode pad through a first via, and a logic circuit, which are formed therein, and a second semiconductor chip connected to the first semiconductor chip and including a second electrode pad, second wiring connected to the second electrode pad through a second via, and a pixel array, which are formed therein. The first electrode pad and the second electrode pad are bonded as being shifted from each other on a bonding surface of the first semiconductor chip and the second semiconductor chip.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: December 29, 2020
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Takahisa Furuhashi
  • Patent number: 10872916
    Abstract: An optical element includes: a base; and an uneven structure layer that is disposed on at least one face of the base, and suppresses reflectance, the optical element having a reflectance of 1% or smaller, in a wavelength region of 400 nm or longer and 700 nm or shorter, a transmittance of 90% or larger, in a wavelength region of 470 nm or longer and 550 nm or shorter, and a variation of transmittance of 1% or smaller, between before and after a high-temperature environmental test conducted at 150° C. for 250 h.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: December 22, 2020
    Assignee: Sony Corporation
    Inventor: Yusuke Suzuki
  • Patent number: 10867102
    Abstract: An IC structure includes a first plurality of metal segments in a first metal layer, a second plurality of metal segments in a second metal layer overlying the first metal layer, and a third plurality of metal segments in a third metal layer overlying the second metal layer. The metal segments of the first and third pluralities of metal segments extend in a first direction, and the metal segments of the second plurality of metal segments extend in a second direction perpendicular to the first direction. A pitch of the third plurality of metal segments is smaller than a pitch of the second plurality of metal segments.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Wei Peng, Chih-Ming Lai, Charles Chew-Yuen Young, Jiann-Tyng Tzeng, Wei-Cheng Lin
  • Patent number: 10868026
    Abstract: Various embodiments of the present application are directed to an IC, and associated forming methods. In some embodiments, the IC comprises a memory region and a logic region integrated in a substrate. A plurality of memory cell structures is disposed on the memory region. A plurality of logic devices is disposed on the logic region. A sidewall spacer is disposed along a sidewall surface of the logic devices, but not disposed along a sidewall surface of the memory cell structures. Thus, the inter-layer dielectric (ILD) fill-in window between adjacent memory cell structures is enlarged, compared to the approaches where the sidewall spacer is concurrently formed in both memory region and the logic region. Thereby, voids formation would be reduced or eliminated, and device quality would be improved.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Meng-Han Lin, Te-Hsin Chiu, Wei Cheng Wu
  • Patent number: 10867951
    Abstract: A semiconductor device includes an electronic component, a package, a substrate and a plurality of first conductors and second conductors. The package is over the electronic component. T substrate is between the electronic component and the package. The substrate includes a first portion covered by the package, and a second portion protruding out of an edge of the package and uncovered by the package. The first conductors and second conductors are between and electrically connected to the electronic component and the substrate. A width of a second conductor of the plurality of second conductors is larger than a width of a first conductor of the plurality of first conductors, the first conductors are disposed between the second portion of the substrate and the electronic component, and the second conductors are disposed between the first portion of the substrate and the electronic component.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Kuan-Yu Huang, Tzu-Kai Lan, Shou-Chih Yin, Shu-Chia Hsu, Pai-Yuan Li, Sung-Hui Huang, Hsiang-Fan Lee, Ying-Shin Han
  • Patent number: 10868270
    Abstract: A display device is disclosed, which may prevent a dark spot defect caused by water permeation from occurring and reduce accumulated stress. The display device comprises a substrate having a barrier pattern; and a thin film transistor provided on the substrate.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: December 15, 2020
    Assignee: LG DISPLAY CO., LTD.
    Inventors: UnJung Kim, MinSeok Kim, JiHun Song
  • Patent number: 10868267
    Abstract: An electroluminescent device including an electrode, the electrode being ionically conductive; an electroluminescence layer positioned adjacent or in contact with the electrode, the electroluminescence layer being electrically coupled to the electrode; the electroluminescence layer receiving electrical energy from the electrode and illuminating in response to received electrical energy, and wherein the electrode and the electroluminescence layer are repairable such that the function of the electrode and the electroluminescence layer is restored after a deformation.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: December 15, 2020
    Assignee: City University of Hong Kong
    Inventors: Chunyi Zhi, Guojin Liang
  • Patent number: 10861760
    Abstract: An assembly is provided including one or more semiconductor dice attached on a substrate, the semiconductor die provided with electrically-conductive stud bumps opposite the substrate. The stud bumps embedded in a molding compound molded thereon are exposed to grinding thus leveling the molding compound to expose the distal ends of the stud bumps at a surface of the molding compound. Recessed electrically-conductive lines extending over said surface of the molding compound with electrically-conductive lands over the distal ends of the stud bumps. A further molding compound is provided to cover the recessed electrically-conductive lines and surrounding the electrically-conductive lands.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: December 8, 2020
    Assignee: STMICROELECTRONICS S.R.L.
    Inventor: Federico Giovanni Ziglioli
  • Patent number: 10861768
    Abstract: An IGBT module with an improved heat dissipation structure includes a layer of IGBT chips, a bonding layer, a thick copper layer, a polymer composite layer, a thermal spray layer, and a heat dissipation layer. The thermal spray layer is disposed on the heat dissipation layer. The polymer composite layer is disposed on the thermal spray layer. The thick copper layer is disposed on the polymer composite layer. The bonding layer is disposed on the thick copper layer. The layer of IGBT chips is disposed on the bonding layer.
    Type: Grant
    Filed: June 16, 2019
    Date of Patent: December 8, 2020
    Assignee: AMULAIRE THERMAL TECHNOLOGY, INC.
    Inventors: Tze-Yang Yeh, Chun-Lung Wu
  • Patent number: 10862072
    Abstract: A display device enables transparent display at increased transparency and double-sided emission display, thereby being capable of improving aperture ratio during emission. The display device includes a transmission part having a configuration capable of selectively achieving a transmission function and a double-sided emission function.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: December 8, 2020
    Assignee: LG Display Co., Ltd.
    Inventors: Eun-Jung Park, Kwan-Soo Kim, Seok-Hyun Kim
  • Patent number: 10854630
    Abstract: A semiconductor device includes a plurality of channel structures on a substrate, each channel structure extending in a first direction perpendicular to the substrate, a common source extension structure including a first semiconductor layer having an n-type conductivity and a gate insulating layer between the substrate and the channel structures, a plurality of gate electrodes on the common source extension structure and spaced apart from each other on a sidewall of each of the channel structures in the first direction, and a common source region on the substrate in contact with the common source extension structure and including a second semiconductor layer having an n-type conductivity. An upper portion of the common source extension structure has a first width, and a lower portion of the common source extension structure has a second width smaller than the first width.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: December 1, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kwang-soo Kim, Yong-seok Kim, Tae-hun Kim, Min-kyung Bae, Jae-hoon Jang, Kohji Kanamori
  • Patent number: 10854848
    Abstract: An information handling system includes an organic light emitting diode layer, an optically clear adhesive layer, and a flexible glass substrate. A surface film includes a self-healing polymer layer, the self-healing polymer layer including a self-healing polymer.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: December 1, 2020
    Assignee: Dell Products, L.P.
    Inventors: Robert Duane Hrehor, Brian J. Yates, Deeder M. Aurongzeb