Abstract: A method of patterning a gate stack on a substrate is described. The method includes preparing a gate stack on a substrate, wherein the gate stack includes a high-k layer and a gate layer formed on the high-k layer. The method further includes transferring a pattern formed in the gate layer to the high-k layer using a pulsed bias plasma etching process, and selecting a process condition for the pulsed bias plasma etching process to achieve a silicon recess formed in the substrate having a depth less than 2 nanometer (nm).

Abstract: The present application aims to provide a surface treatment method that is able to accurately control the rate of etching a single crystal SiC substrate and thereby enables correct understanding of the amount of etching. In the surface treatment method, the single crystal SiC substrate is etched by a heat treatment performed under Si vapor pressure. At a time of the etching, inert gas pressure in an atmosphere around the single crystal SiC substrate is adjusted to control the rate of etching. Accordingly, correct understanding of the amount of etching is obtained.

Abstract: A microelectronic method for etching a layer to be etched, including: modifying the layer to be etched from a surface of the layer to be etched and over a depth corresponding to at least a portion of thickness of the layer to be etched to form a film, with the modifying including implanting light ions into the layer to be etched; and removing the film includes a selective etching of the film relative to at least one layer underlying the film.

Abstract: Provided is a cleaning solution and its applications. The cleaning solution comprises a mixture of a basic chemical compound and a solvent solution. In some embodiments, the basic chemical compound is tetramethylammonium hydroxide (TMAH) and the solvent solution includes a solution of water and at least one of propylene glycol ethyl ether (PGEE), propylene glycol monomethylether (PGME), and propylene glycol monomethylether acetate (PGMEA). The cleaning solution is effective in removing silicon-containing material off a surface of a system or a surface of a semiconductor substrate. In some embodiments, the system comprises a pipeline for delivering the silicon-containing material in semiconductor spin-coating processes. In some embodiments, the system comprises a drain for collecting waste fluid in semiconductor spin-coating processes.

Abstract: A method for making an epitaxial base includes the following steps. A plurality of grooves and a plurality of bulges are formed on an epitaxial growth surface of a substrate by etching the epitaxial growth surface. A carbon nanotube layer is located on the epitaxial growth surface, wherein the carbon nanotube layer defines a first part attached on top surface of bulges, and a second part suspended on the grooves. The second part of the carbon nanotube layer is attached on bottom surface of the grooves by treating the carbon nanotube layer.

Abstract: A magnetoresistive device that can include a magnetoresistive stack and an etch-stop layer (ESL) disposed on the magnetoresistive stack. A method of manufacturing the magnetoresistive device can include: depositing the magnetoresistive stack, the ESL and a mask layer on a substrate; performing a first etching process to etch a portion of the mask layer to expose a portion of the ESL; and performing a second etching process to etch the exposed portion of the ESL and a portion of the magnetoresistive stack. The method can further include depositing a photoresist layer on the hard mask before the first etching process and removing the photoresist layer from the hard mask following the first etching process. The first and second etching processes can be different. For example, the first etching process can be a reactive etching process and the second etching process can be a non-reactive etching process.

Abstract: A knife cleaner for a commercial kitchen is mounted on a countertop or prep table with suction cups or similar devices, and provides three separate compartments for washing, rinsing, and sanitizing solutions. A removable cap provides a channel guide leading downward into each of the three compartments. The wash channel guide provides scrub brush components to remove food particles and other debris. The cleaner is disassembled easily without tools for cleaning purposes.

Abstract: A method of etching exposed silicon on patterned heterogeneous structures is described and includes a gas phase etch using plasma effluents formed in a remote plasma. The remote plasma excites a fluorine-containing precursor. Plasma effluents within the remote plasma are flowed into a substrate processing region where the plasma effluents combine with a hydrogen-containing precursor. The combination reacts with the patterned heterogeneous structures to remove an exposed silicon portion faster than a second exposed portion. The silicon selectivity results from the presence of an ion suppressor positioned between the remote plasma and the substrate processing region. The methods may be used to selectively remove silicon faster than silicon oxide, silicon nitride and a variety of metal-containing materials. The methods may be used to remove small etch amounts in a controlled manner and may result in an extremely smooth silicon surface.

Abstract: An etching method, having the step of applying an etching liquid onto a TiN-containing layer in a semiconductor substrate thereby etching the TiN-containing layer, the etching liquid comprising water, and a basic compound and an oxidizing agent in water thereof to be within the range of pH from 8.5 to 14, and the TiN-containing layer having a surface oxygen content from 0.1 mol % to 10 mol %.

Abstract: Method for preparing a particulate material including particles of an element of group IVa, an oxide thereof or an alloy thereof, the method including: (a) dry grinding particles from an ingot of an element of group IVa, an oxide thereof or an alloy thereof to obtain micrometer size particles; and (b) wet grinding the micrometer particles dispersed in a solvent carrier to obtain nanometer size particles having a size between 10 to 100 nanometers, optionally a stabilizing agent is added during or after the wet grinding. Method can include further steps of (c) drying the nanometer size particles, (d) mixing the nanometer size particles with a carbon precursor; and (e) pyrolyzing the mixture, thereby forming a coat of conductive carbon on at least part of the surface of the particles. The particulate material can be used in fabrication of an anode in an electrochemical cell or electrochemical storage energy apparatus.

Abstract: The present disclosure is directed to an apparatus and method for growing a sapphire sheet via edge-defined film-fed growth (EFG) including an angled heat shield with respect to the a side surface of a die tip. The present disclosure is further directed to an sapphire sheets and batches of such sheets having features such as a particular maximum low spot thickness.

Abstract: An etching method containing, at the time of processing a substrate having a first layer containing titanium nitride (TiN) and a second layer containing a transition metal, selecting a substrate in which a surface oxygen content of the first layer is from 0.1 to 10% by mole, and applying an etching liquid containing a hydrofluoric acid compound and an oxidizing agent to the substrate and thereby removing the first layer.

Abstract: There is disclosed a method of preserving the integrity of a growth substrate in a epitaxial lift-off method, the method comprising providing a structure comprising a growth substrate, one or more protective layers, a sacrificial layer, and at least one epilayer, wherein the sacrificial layer and the one or more protective layers are positioned between the growth substrate and the at least one epilayer; releasing the at least one epilayer by etching the sacrificial layer with an etchant; and heat treating the growth substrate and/or at least one of the protective layers.

Abstract: A vapor phase growth apparatus of an embodiment includes: a reaction chamber; a gas supply path connected to an organic metal supply source at a first connection, the gas supply path being connected to a carrier gas supply source, the gas supply path supplies a process gas including organic metal and a carrier gas into the reaction chamber; a gas discharge path connected to the organic metal supply source at a second connection, the gas discharge path discharges the process gas to the outside of the apparatus; a first mass flow controller and a first adjustment device provided at the gas supply path; a second adjustment device provided at the gas discharge path; and a shortcut path connecting the gas supply path to the gas discharge path. One of the first and the second adjustment device is a back pressure regulator, and the other is a mass flow controller.

Abstract: A substrate processing method includes a phosphoric acid processing step of supplying a phosphoric acid aqueous solution, which contains silicon and has a silicon concentration lower than a saturation concentration, to a front surface of a substrate, a liquid volume reducing step of reducing a volume of the phosphoric acid aqueous solution on the substrate, after the phosphoric acid processing step, and a rinse replacing step of supplying a rinse liquid having a temperature lower than that of the phosphoric acid aqueous solution supplied to the front surface of the substrate in the phosphoric acid processing step to the front surface of the substrate covered with the phosphoric acid aqueous solution at least partially, after the liquid volume reducing step.

Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in substantial preservation of a mask layer on the substrate. The protective coating may be deposited using particular reactants and/or reaction conditions that are unlikely to damage the mask layer. The protective coating may also be deposited using particular reaction mechanisms that result in substantially complete sidewall coating.

Abstract: An etching method of etching a multilayered film includes etching a multilayered film by generating plasma within a processing vessel of a plasma processing apparatus. In the etching of the multilayered film, a first processing gas containing a hydrogen gas, a hydrogen bromide gas, a fluorine-containing gas, a hydrocarbon gas, a hydrofluorocarbon gas and a fluorocarbon gas is supplied from a first supply unit configured to supply a gas toward a central region of the processing target object and a second supply unit configured to supply a gas toward outer region than the central region; a second processing gas containing a hydrocarbon gas and a fluorocarbon gas is supplied from either one of the first supply unit and the second supply unit; and the first processing gas and the second processing gas are excited.

Abstract: The invention provides a polishing composition that contains (a) ?-alumina particles that have an average particle size of about 250 nm to about 300 nm, (b) a per-type oxidizing agent, (c) a complexing agent, wherein the complexing agent is an amino acid or an organic acid, and (d) water. The invention also provides a method of polishing a substrate, especially a nickel-phosphorous substrate, with the polishing composition.

Abstract: A process for chemical mechanical polishing of a substrate is provided, comprising: providing the substrate, wherein the substrate has an exposed silicon dioxide; providing a chemical mechanical polishing composition, consisting of, as initial components: water, a colloidal silica abrasive; optionally, a substance according to formula (I); a substance according to formula (II); and, optionally, a pH adjusting agent; wherein a pH of the chemical mechanical polishing composition is ?6; providing a chemical mechanical polishing pad with a polishing surface; dispensing the chemical mechanical polishing composition onto the polishing surface in proximity to an interface between the chemical mechanical polishing pad and the substrate; and, creating dynamic contact at the interface between the chemical mechanical polishing pad and the substrate with a down force of 0.69 to 34.5 kPa; wherein the substrate is polished; wherein some of the exposed silicon dioxide is removed from the substrate.

Abstract: A line-end cutting method for fin structures of FinFETs formed by double patterning technology firstly utilizes the SiN hard mask lines to form fin structures and then performs lithography and etching processes to form line-end cuts. Since the depth of the line-end cuts is large, there is enough time and space to regulate the etching recipe so as to balance the etching rate of multiple layers including the spin-on-carbon layer, the SiN layer, the SiO2 layer and the silicon substrate, thereby forming the fin structures with line-end cuts having flatter bottom topography, preventing the formation of silicon protrusions or silicon cones during the etching process and improving the device electrical performance.