Patents Examined by Duy Deo
  • Patent number: 9701927
    Abstract: A cleaning solution is used, in a transparent antireflective structure that has, on one surface thereof, a plurality of convexities formed at a period equal to or shorter than wavelength in a visible light range, and that prevents, at the one surface, reflection of light entering the one surface, to clean a concavity defining a region between adjacent two of the plural convexities, the cleaning solution having a pH of 10.00 or more.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: July 11, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kyohko Matsuura, Yuhsuke Tsuda, Hidetsugu Matsukiyo, Yuka Utsumi, Akiyoshi Fujii, Takahiro Nakahara, Kiyoshi Minoura, Miho Yamada
  • Patent number: 9704813
    Abstract: A device region (17) is formed at a central part of a semiconductor wafer (2) and a ring-shaped reinforced portion (18) which is thicker than the device region (17) is formed on an outer circumference of the device region (17). After forming the device region (17) and the ring-shaped reinforced portion (18), the semiconductor wafer (2) is subjected to wet treatment. After the wet treatment, the semiconductor wafer (2) is rotated and dried. A center position of the semiconductor wafer (2) is different from a center position of the ring-shaped reinforced portion (18).
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: July 11, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kazunari Nakata
  • Patent number: 9704723
    Abstract: Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: July 11, 2017
    Assignee: Applied Materials, Inc.
    Inventors: Anchuan Wang, Xinglong Chen, Zihui Li, Hiroshi Hamana, Zhijun Chen, Ching-Mei Hsu, Jiayin Huang, Nitin K. Ingle, Dmitry Lubomirsky, Shankar Venkataraman, Randhir Thakur
  • Patent number: 9695046
    Abstract: The invention relates to a method for cleaning carbon nanotubes comprising the following steps: provision of a carbon nanotube substrate, first washing of the carbon nanotube substrate by means of an acid and second washing of the carbon nanotube substrate by means of a solution, wherein the solution has replacement anions of at least one of the acid radical anions of the acid of different type, and the substance amount fraction of the replacement anions in the solution is greater than the substance amount fraction of the anions in the solution corresponding to the acid radical anions of the acid. The invention further relates to a carbon nanotube substrate which can be obtained by such a method.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: July 4, 2017
    Assignee: Covestro Deutschland AG
    Inventor: Heiko Hocke
  • Patent number: 9696484
    Abstract: A solution for fabricating a structure including a light guiding structure is provided. The light guiding structure can be formed of a fluoropolymer-based material and include one or more regions, each of which is filled with a fluid transparent to radiation having a target wavelength, such as ultraviolet radiation. The region(s) can be created using a filler material, which is at least substantially enclosed by the fluoropolymer-based material and subsequently removed from each region. The structure can further include at least one optical element integrated into the light guiding structure.
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: July 4, 2017
    Assignee: SENSOR ELECTRONIC TECHNOLOGY, INC.
    Inventors: Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Patent number: 9693675
    Abstract: Provided herein is a composition that includes: (i) chelator (e.g., ethylenediaminetetraacetic acid (EDTA)), (ii) buffer system (e.g., potassium phosphate dibasic and sodium hydroxide), (iii) cleaner (e.g., diethyl glycol monoethyl ether), (iv) solubilizer (e.g., propylene glycol), and (v) diluent (e.g., water), wherein the composition has a pH of at least about 9.5. Also provided is a method of cleaning a medical device that includes contacting the medical device with the composition described herein, for a period of time effective to clean the medical device. Subsequent to the cleaning, the medical device can optionally be disinfected, dried, and stored.
    Type: Grant
    Filed: December 20, 2014
    Date of Patent: July 4, 2017
    Assignee: Medivators Inc.
    Inventors: John J. Matta, Tuan Nguyen, Huyen Phuong Bui
  • Patent number: 9691607
    Abstract: Disclosed is a process for producing an epitaxial single-crystal silicon carbide substrate by epitaxially growing a silicon carbide film on a single-crystal silicon carbide substrate by chemical vapor deposition. The step of crystal growth in the process comprises a main crystal growth step, which mainly occupies the period of epitaxial growth, and a secondary crystal growth step, in which the growth temperature is switched between a set growth temperature (T0) and a set growth temperature (T2) which are respectively lower and higher than a growth temperature (T1) used in the main crystal growth step. The basal plane dislocations of the single-crystal silicon carbide substrate are inhibited from being transferred to the epitaxial film. Thus, a high-quality epitaxial film is formed.
    Type: Grant
    Filed: April 7, 2011
    Date of Patent: June 27, 2017
    Assignee: NIPPON STEEL & SUMITOMO METAL CORPORATION
    Inventors: Takashi Aigo, Hiroshi Tsuge, Taizo Hoshino, Tatsuo Fujimoto, Masakazu Katsuno, Masashi Nakabayashi, Hirokatsu Yashiro
  • Patent number: 9687885
    Abstract: Methods for cleaning a wafer in semiconductor fabrication are provided. The method includes providing a wafer. The method further includes cleaning the wafer in a first cleaning cycle by supplying a cleaning solution and supplying a first washing liquid mixed with a purge gas in sequence. The method also includes cleaning the wafer in a second cleaning cycle by supplying the cleaning solution and a second washing liquid mixed with the purge gas in sequence. The second cleaning cycle is initiated after the first cleaning cycle is finished.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: June 27, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ying-Jie Cai, Bo-Wei Chou, Shih-Hsing Kao, Shin-Hsien Yang, Tzu-Min Lee, Tai-Yung Yu, Wen-Cheng Lien
  • Patent number: 9688912
    Abstract: A method of etching a semiconductor substrate, having the steps of: providing a semiconductor substrate having a first layer containing Ti and a second layer containing at least one of Cu, SiO, SiN, SiOC and SiON; providing an etching liquid containing, in an aqueous medium, a basic compound composed of an organic amine compound and an oxidizing agent, the etching liquid having a pH from 7 to 14; and applying the etching liquid to the semiconductor substrate to selectively etch the first layer of the semiconductor substrate.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: June 27, 2017
    Assignee: FUJIFILM Corporation
    Inventor: Tetsuya Kamimura
  • Patent number: 9691618
    Abstract: Provided are a semiconductor device fabricating apparatus configured to perform an atomic layer etching process and a method of fabricating a semiconductor device including performing the atomic layer etching process. The method includes loading a wafer onto an electrostatic chuck in a chamber, performing a first periodical process in which a first gas is supplied to an inside of the chamber and the first gas is adsorbed onto the wafer, performing a second periodical process in which a second gas is supplied to the inside of the chamber and the first gas remaining in the chamber is exhausted to an outside of the chamber, performing a third periodical process in which a third gas is supplied to the inside of the chamber, plasma including the third gas is generated, the plasma collides with the wafer, and the first gas adsorbed onto the wafer is removed, and unloading the wafer to the outside of the chamber.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: June 27, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dougyong Sung, Sejin Oh, Je-Hun Woo, Hyunju Lee, Seungkyu Lim, Kiho Hwang
  • Patent number: 9686868
    Abstract: A concave part defined by a ring-shaped step is formed on the upper surface of a housing body. A first elastic member is brought into contact with a portion of an electroless nickel-plated layer, the portion being in a region inside the concave part. The first elastic member is then pressed and deformed so that the whole of an angular portion, at which the upper surface of the ring-shaped step and its side surface cross, bites into the first elastic member and that the first elastic member and the electroless nickel-plated layer on the upper surface of the ring-shaped step are separated from each other. The housing body is then immersed in a dissolving liquid that can dissolve the electroless nickel-plated layer while the first elastic member is kept deformed.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: June 20, 2017
    Assignee: ALPS ELECTRIC CO., LTD.
    Inventors: Hiroyuki Kanno, Masahiro Koike
  • Patent number: 9683308
    Abstract: Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: June 20, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Christopher S. Olsen, Theresa K. Guarini, Jeffrey Tobin, Lara Hawrylchak, Peter Stone, Chi Wei Lo, Saurabh Chopra
  • Patent number: 9685343
    Abstract: [Problem] To provide a method for producing a polished object, which can remarkably reduce a haze level on a surface of the object to be polished while defects are significantly reduced.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: June 20, 2017
    Assignee: FUJIMI INCORPORATED
    Inventors: Makoto Tabata, Shinichiro Takami, Shogaku Ide
  • Patent number: 9685278
    Abstract: Ultracapacitor electrodes having an enhanced electrolyte-accessible surface area are provided. Such electrodes can include a porous substrate having a solution side and a collector side, the collector side operable to couple to a current collector and the solution side positioned to interact with an electrolytic solution when in use. The electrode can also include a conductive coating formed on the solution side of the porous substrate. The coating can have a first side positioned to interact with an electrolytic solution when in use and a second side opposite the first side. The coating can have discontinuous regions that allow access of an electrolyte solution to the second side during use to enhance electrolyte-accessible surface area of the conductive coating.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: June 20, 2017
    Assignee: Intel Corporation
    Inventors: Charles W. Holzwarth, Cary L. Pint, Michael C. Graf, Bum Ki Moon
  • Patent number: 9676227
    Abstract: A method for forming a wet-etchable, sacrificial lift-off layer or layers compatible with high temperature processing, a sacrificial layer, defined as consisting of a single film of one material or multiple films of multiple materials, that can tolerate high temperatures, is deposited on a substrate, called the original substrate, by sputtering or another suitable technique (e.g. evaporation, pulsed laser deposition, wet chemistry, etc.). Intermediate steps result in a lift-off layer attached to the lift-off substrate, that allow for separating the product from the original substrate.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: June 13, 2017
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Jesse A. Frantz, Jason D. Myers, Robel Y. Bekele, Jasbinder S. Sanghera
  • Patent number: 9676010
    Abstract: The plasma reactor comprises a reaction chamber (23) connectable to a source of ionizable gases (25) and to a heating device (80), said reactor (10) being subjected to the phases of heating (A), cleaning (L) and/or surface treatment (S), cooling (R), unloading (D) and loading (C) of metallic pieces (1). The installation comprises: at least two reactors (10), each being selectively and alternately connected to: the same source of ionizable gases (25); the same vacuum source (60); the same electrical energy source (50); and to the same heating device (80), the latter being displaceable between operative positions, in each of which surrounding laterally and superiorly a respective reactor (10), while the latter is in its heating phase (A) and cleaning phase (L) and/or in the surface treatment phase (S) of the metallic pieces (1).
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: June 13, 2017
    Assignees: Universidade Federal De Santa Catarina (UFSC), Whirlpool S.A.
    Inventors: Roberto Binder, Aloisio Nelmo Klein, Cristiano Binder, Gisele Hammes
  • Patent number: 9671542
    Abstract: Provided herein is a method for producing a nano polaroid film using a one-pack type or two-pack type blackening ink so that a single layer film may replace a conventional polaroid film generally produced by superposing various types of optical films, and especially, a method for producing a nano polaroid film consisting of one film and having excellent observability by coating a transparent nano pattern substrate with a functional ink that contains a blackening material, and then removing particles formed on protruding portions using an etching solution, and refilling the functional ink into grooves.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: June 6, 2017
    Assignee: InkTec Co., Ltd.
    Inventors: Kwang-Choon Chung, Insook Yi, MinHee Kim, Ji Hoon Yoo
  • Patent number: 9666447
    Abstract: A method of etching a layer on a substrate is described. The method includes disposing a substrate having a heterogeneous layer composed of a first material and a second material in a processing space of a plasma processing system, wherein the heterogeneous layer has an initial upper surface exposing the first material and the second material to a plasma environment in the processing space, and performing a modulated plasma etching process to selectively remove the first material at a rate greater than removing the second material. The modulated plasma etching process includes a modulation cycle that preferentially reacts an etchant with the first material during a first phase of the modulation cycle, and differentially adheres a passivant on the second material relative to the first material during a second phase of the modulation cycle.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: May 30, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Vinayak Rastogi, Alok Ranjan
  • Patent number: 9664329
    Abstract: A clean-in-place launching station with cleaning chamber (2) for cleaning a pipeline pig (16) is disclosed. The cleaning chamber (2) is equipped and configured to enable the pig to be completely surrounded by turbulently flowing cleaning fluid during the cleaning process. A plunger (3) capable of axially moving the pig (16) is completely encased within the cleaning chamber. The plunger (3) has at least one internal fluid channel (10) which connects the space in front of the front end (6) of the plunger facing the pig (16) with the space behind the back end (8) of the plunger.
    Type: Grant
    Filed: February 23, 2014
    Date of Patent: May 30, 2017
    Assignee: URESH AG
    Inventors: Urs Hofer, Andres Huber
  • Patent number: 9657580
    Abstract: A method of forming micro channels in a thermal barrier coating includes placing a brazing tape on a substrate. The brazing tape has a first side and a second side with a plurality of ceramic members attached thereto. The first side is placed in contact with the substrate. A brazing step brazes the brazing tape to the substrate. An applying step applies a bond coat to the second side of the brazing tape. Another applying step applies a thermal barrier coating (TBC) onto the bond coat. A removing step removes the plurality of ceramic members by exposing the plurality of ceramic members to a ceramic solvent. A plurality of micro channels are formed in the thermal barrier coating by voids left from the plurality of ceramic members.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: May 23, 2017
    Assignee: General Electric Company
    Inventors: Yan Cui, Srikanth Chandrudu Kottilingam, Brian Lee Tollison