Abstract: A photoelectric device includes a first electrode and a second electrode facing each other, a photoelectric conversion layer between the first electrode and the second electrode and including a light absorbing material configured to selectively absorb first visible light including one of visible light in a blue wavelength region of greater than or equal to about 380 nm and less than about 500 nm, visible light in a green wavelength region of about 500 nm to about 600 nm, and visible light in a red wavelength region of greater than about 600 nm and less than or equal to about 700 nm, and a plurality of nanostructures between the first electrode and the photoelectric conversion layer and configured to selectively reflect the first visible light.

Abstract: A bonding wire for a semiconductor device, which is suitable for on-vehicle devices bonding wire, has excellent capillary wear resistance and surface flaw resistance while ensuring high bonding reliability and further satisfies overall performance including ball formability and wedge bondability, the bonding wire including: a Cu alloy core material; a Pd coating layer formed on a surface of the Cu alloy core material; and a Cu surface layer formed on a surface of the Pd coating layer, in which the bonding wire for semiconductor device contains Ni, a concentration of the Ni in the bonding wire is 0.1 to 1.2 wt. %, the Pd coating layer is 0.015 to 0.150 ?m in thickness, and the Cu surface layer is 0.0005 to 0.0070 ?m in thickness.

Abstract: A semiconductor device includes a solder bump overlying and electrically connected to a pad region, and a metal cap layer formed on at least a portion of the solder bump. The metal cap layer has a melting temperature greater than the melting temperature of the solder bump.

Abstract: A multilayer stack is described. The multilayer stack includes: (i) one or more inorganic barrier layers for reducing transport of gas or vapor molecules therethrough; (ii) an inorganic reactive layer disposed adjacent to one or more of the inorganic barrier layers, and the reactive layer capable of reacting with the gas or the vapor molecules; and (iii) wherein, in an operational state of the multilayer stack, the vapor or the gas molecules that diffuse through one or more of the inorganic barrier layers react with the inorganic reactive layer, and thereby allow said multilayer stack to be substantially impervious to the gas or the vapor molecules.

Abstract: A Schottky diode includes a drift region, a channel in an upper portion of the drift region, and first and second adjacent blocking junctions in the upper portion of the drift region that define the channel therebetween. The drift region and channel are doped with dopants having a first conductivity type, and the first and second blocking junctions doped with dopants having a second conductivity type that is opposite the first conductivity type. The blocking junctions extend at least one micron into the upper portion of the drift region and are spaced apart from each other by less than 3.0 microns.

Abstract: An insulated gate silicon carbide semiconductor device includes: a drift layer of a first conductivity type on a silicon carbide substrate of 4H type with a {0001} plane having an off-angle of more than 0° as a main surface; a first base region; a source region; a trench; a gate insulating film; a protective diffusion layer; and a second base region. The trench sidewall surface in contact with the second base region is a surface having a trench off-angle of more than 0° in a <0001> direction with respect to a plane parallel to the <0001> direction. The insulated gate silicon carbide semiconductor device can relieve an electric field of a gate insulating film and suppress an increase in on-resistance and provide a method for manufacturing the same.

Abstract: A conductive structure includes a substrate including a first dielectric layer formed thereon, at least a first opening formed in the first dielectric layer, a low resistive layer formed in the opening, and a first metal bulk formed on the lower resistive layer in the opening. The first metal bulk directly contacts a surface of the first low resistive layer. The low resistive layer includes a carbonitride of a first metal material, and the first metal bulk includes the first metal material.

Abstract: A device (100) includes a first chip (104) having a first circuit element (112), a first interconnect pad (116) in electrical contact (118) with the first circuit element, and a barrier layer (120) on the first interconnect pad, a superconducting bump bond (106) on the barrier layer, and a second chip (102) joined to the first chip by the superconducting bump bond, the second chip having a quantum circuit element (108), in which the superconducting bump bond provides an electrical connection between the first circuit element and the quantum circuit element.

Abstract: A method for manufacturing of a device (300, 410-412) comprising a substrate (201) comprising a plurality of sets of nanostructures (207) arranged on the substrate, wherein each of the sets of nanostructures is individually electrically addressable, the method comprising the steps of: providing (101) the substrate (200) having a first (202) face, the substrate having an insulating layer (210) comprising an insulating material arranged on the first face (202) of the substrate forming an interface (203) between the insulating layer and the substrate; providing (102) a plurality of stacks (204) on the substrate, the stacks being spaced apart from each other, wherein each stack comprises a first conductive layer (205) comprising a first conductive material and a second conductive layer (206) comprising a second conductive material different from the first material, the second conductive layer being arranged on the first conductive layer for catalyzing nanostructure growth; heating (103) the substrate having the p

Abstract: An organic light-emitting display apparatus includes: a substrate including a display area and a peripheral area outside the display area; an alignment mark located in the peripheral area; and an insulating film located in the peripheral area and including a first opening through which at least a part of the alignment mark is exposed and a plurality of slits that extend from the first opening.

Abstract: Disconnection of a base line is suppressed even when a short-side direction of a collector layer is parallel to crystal orientation [011]. A bipolar transistor includes: a collector layer that has a long-side direction and a short-side direction in a plan view, in which the short-side direction is parallel to crystal orientation [011], a cross-section perpendicular to the short-side direction has an inverted mesa shape, and a cross-section perpendicular to the long-side direction has a forward mesa shape; a base layer that is formed on the collector layer; a base electrode that is formed on the base layer; and a base line that is connected to the base electrode and that is drawn out from an end in the short-side direction of the collector layer to the outside of the collector layer in a plan view.

Abstract: A device (100) includes a first chip (104) having a first circuit element (112), a first interconnect pad (116) in electrical contact (118) with the first circuit element, and a barrier layer (120) on the first interconnect pad, a superconducting bump bond (106) on the barrier layer, and a second chip (102) joined to the first chip by the superconducting bump bond, the second chip having a quantum circuit element (108), in which the superconducting bump bond provides an electrical connection between the first circuit element and the quantum circuit element.

Abstract: A semiconductor structure for use in fabricating a semiconductor device having improved light propagation is provided. The structure includes at least one layer transparent to radiation having a target wavelength relevant to operation of the semiconductor device. During operation of the semiconductor device, radiation of the target wavelength enters the transparent layer through a first side and exits the transparent layer through a second side. At least one of the first side or the second side comprises a profiled surface. The profiled surface includes a plurality of vacancies fabricated in the material of the layer. Each vacancy comprises side walls configured for at least partial diffusive scattering of the radiation of the target wavelength.

Abstract: Light emitting diode (LED) components and related methods are disclosed. LED components include a submount, at least one LED chip on a first surface of the submount, and a non-reflective, light permeable structure or dam. The light permeable dam can provide a component having a viewing angle that is greater than 115°. A method of providing an LED component includes providing a non-metallic submount, attaching at least one LED chip to a first surface of the submount, and dispensing a non-reflective, light permeable dam over the first surface of the submount about the at least one LED chip thereby providing a component having a viewing angle that is greater than 115°.

Abstract: A light emitting device includes a light emitting element, a sealing member, and a first film. The light emitting element has a light emitting surface from which a light is emitted. The sealing member is provided on the light emitting surface of the light emitting element to cover the light emitting surface and having a light output surface via which the light is output from the sealing member. The light output surface being curved to have a concave shape. The sealing member includes a light-transmissive material containing a fluorescent material to convert a wavelength of the light emitted from the light emitting element. The first film is disposed on a part of the light output surface of the sealing member to partially reflect the light emitted from the light emitting element.

Abstract: The photodetector includes a photon absorbing region formed by a first semiconductor material having a first bandgap energy value. It also includes a blocking region formed by at least second and third semiconductor materials configured to prevent the majority charge carriers from passing between the photon absorbing region and a contact region, the second semiconductor material presenting a second bandgap energy value higher than the first bandgap energy value to form a quantum well with the third semiconductor material. The blocking region is doped.

Abstract: A semiconductor device whose performance is improved is disclosed. In the semiconductor device, an offset spacer formed in a memory cell is formed by a laminated film of a silicon oxide film and a silicon nitride film, and the silicon oxide film is particularly formed to directly contact the sidewall of a memory gate electrode and the side end portion of a charge storage film; on the other hand, an offset spacer formed in a MISFET is formed by a silicon nitride film. Particularly in the MISFET, the silicon nitride film directly contacts both the sidewall of a gate electrode and the side end portion of a high dielectric constant film.

Abstract: The present invention provides a photosensitive resin composition comprising: an alkali-soluble resin having a phenolic hydroxyl group as an end group (A); a radiation-polymerizable compound (B); and a photoinitiator (C), a film adhesive, an adhesive sheet, an adhesive pattern, a semiconductor wafer with an adhesive layer, and a semiconductor device using the photosensitive resin composition.

Abstract: A flexible display device may include a substrate and a display unit provided over the substrate. The substrate may include: a first base layer, a second base layer provided over the first base layer, and a first barrier layer provided between the first and second base layers. A face of the first base layer is larger than a face of the second base layer and is parallel to the face of the second base layer.

Abstract: Provided is an image sensor having a pixel region including a plurality of pixel blocks disposed in a matrix form, outer address markers around the pixel region, interspaces between the plurality of pixel blocks, and inner address markers disposed in the interspaces.