Abstract: The present technology relates to a camera module capable of reducing the number of steps in the manufacturing process and reducing a black spot failure, a method for manufacturing the camera module, an imaging apparatus, and an electronic instrument. A frame and the rigid flexible substrate are adhered to each other by adhesive formed of thermosetting resin applied on an abutment surface excluding a portion of a range including a bonding section with the FPC drawer unit, thereby forming a vent hole in a site where adhesive has not been applied. At this time, the air of the space between the frame and the rigid flexible substrate is expanded by the heat and discharged from the vent hole.

Abstract: High-quality, single-crystalline silicon-germanium (Si(1-x)Gex) having a high germanium content is provided. Layers of the high-quality, single-crystalline silicon-germanium can be grown to high sub-critical thicknesses and then released from their growth substrates to provide Si(1-x)Gex films without lattice mismatch-induced misfit dislocations or a mosaic distribution of crystallographic orientations.

Abstract: This invention discloses a gallium nitride based semiconductor power device disposed in a semiconductor substrate. The power device comprises a termination area disposed at a peripheral area of the semiconductor power device comprises a termination structure having at least a guard ring disposed in a trench filled with doped gallium-based epitaxial layer therein.

Abstract: A semiconductor device includes a substrate, a first dielectric layer, a first semiconductor layer, a second dielectric layer and a second semiconductor layer. The first dielectric layer is disposed on the substrate and includes at least one first trench formed in the first dielectric layer. The first semiconductor layer is disposed on the first dielectric layer and within the at least one first trench. The second dielectric layer is disposed on the first semiconductor layer and includes at least one second trench formed in the second dielectric layer, wherein in a planar view, the at least one first trench and the at least one second trench are not overlapped with each other. The second semiconductor layer is disposed on the second dielectric layer and within the at least one second trench.

Abstract: An object of the present invention is to provide a semiconductor device in which stored data can be held even when power is not supplied for a certain time. Another object is to increase the degree of integration of a semiconductor device and to increase the storage capacity per unit area. A semiconductor device is formed with a material capable of sufficiently reducing off-state current of a transistor, such as an oxide semiconductor material that is a wide-bandgap semiconductor. With the use of a semiconductor material capable of sufficiently reducing off-state current of a transistor, the semiconductor device can hold data for a long time. Furthermore, a wiring layer provided under a transistor, a high-resistance region in an oxide semiconductor film, and a source electrode are used to form a capacitor, thereby reducing the area occupied by the transistor and the capacitor.

Abstract: A fin structure for a semiconductor device, such as a FinFET structure, has first and second semiconductor layers and an air gap between the layers. The second semiconductor layer includes a recessed portion, the air gap is located in the recessed portion, and the recessed portion has an upwardly-opening acute angle in the range from about 10° to about 55°. The air gap may prevent current leakage. A FinFET device may be manufactured by first recessing and then epitaxially re-growing a source/drain fin, with the regrowth starting over a tubular air gap.

Abstract: Emitter packages are disclosed having a thixotropic agent or material, with the encapsulant exhibiting significant reduction of thixotropic agent scattering. The packages exhibit a corresponding reduction or elimination of encapsulant clouding and increased package emission efficiency. This allows for the thixotropic agents to be included in the encapsulant to alter certain properties (e.g. mechanical or thermal) while not significantly altering the optical properties of the encapsulant. One embodiment of a light emitting diode (LED) package according to the present invention comprises an LED chip with an encapsulant over the LED chip. The encapsulant has an encapsulant refractive index and also has a thixotropic material with a refractive index that is substantially the same as the encapsulant refractive index.

Abstract: A gate structure, a semiconductor device, and the method of forming a semiconductor device are provided. In various embodiments, the gate structure includes a gate stack and a doped spacer overlying a sidewall of the gate stack. The gate stack contains a doped work function metal (WFM) stack and a metal gate electrode overlying the doped WFM stack.

Abstract: A method for manufacturing of a device including a first substrate including a plurality of sets of nanostructures arranged on the first substrate, wherein each of the sets of nanostructures is individually electrically addressable, the method including the steps of: providing a substrate having a first face, the substrate having an insulating layer including an insulating material arranged on the first face of the substrate forming an interface between the insulating layer and the substrate; providing a plurality of stacks on the first substrate, wherein each stack includes a first conductive layer and a second conductive layer; heating the first substrate having the plurality of stacks arranged thereon in a reducing atmosphere to enable formation of nanostructures on the second conductive material; heating the first substrate having the plurality of stacks arranged thereon in an atmosphere such that nanostructures are formed on the second layer.

Abstract: A semiconductor storage device includes a substrate, a stack of first insulating layers and conductive layers that are alternately formed on the substrate in a memory region and a peripheral region and electrically insulated from each other, a second insulating layer covering the stack of the first insulating layers and the conductive layers in the peripheral region, and a plurality of contact wirings formed in the peripheral region, each contact wiring extending from an upper surface of the second insulating layer towards the substrate and electrically connected to a corresponding one of the conductive layers. In the peripheral region, each conductive layer has an extended portion that covers side and upper surfaces of an end portion of a first insulating layer that is formed immediately thereabove, and each contact wiring is in direct contact with the extended portion of the corresponding conductive layer.

Abstract: A semiconductor device may include the following elements: a first doped region; a second doped region, which contacts the first doped region; a third doped region, which contacts the first doped region; a first dielectric layer, which contacts the above-mentioned doped regions; a first gate member, which is conductive and comprises a first gate portion, a second gate portion, and a third gate portion, wherein the first gate portion contacts the first dielectric layer, wherein the second gate portion is positioned between the first gate portion and the third gate portion, and wherein a width of the second portion is unequal to a width of the third gate portion; a doped portion, which is positioned between the third gate portion and the third doped region; a second gate member; and a second dielectric layer, which is positioned between the third gate portion and the second gate member.

Abstract: A light emitting device includes a resin molded body, which includes a front surface having an opening, a bottom surface opposite to the opening a front-rear direction of the light emitting device, and first and second wall portions extending from the bottom surface to the front surface. A first lead includes a first bottom portion provided on the bottom surface, first and second side portions provided in the first and second wall portions, respectively. A second lead include a second bottom portion provided on the bottom surface apart from the first lead to provide a first resin region, third and fourth side portions provided in the first and second wall portions apart from the first lead to provide second and third resin regions, respectively. The first resin region is provided between the second resin region and the third resin region viewed in the front-rear direction.

Abstract: A semiconductor apparatus includes a first area, a first transistor being formed in two or more divided areas of the first area, and a second area, a second transistor being formed in two or more divided areas of the second area. The number of areas of the second area is greater than the number of areas of the first area, the divided areas of the first area and the second area are alternately arranged, and the gate pad of the first transistor and the gate pad of the second transistor are formed in the second area.

Abstract: An integrated radiation sensor for detecting the presence of an environmental material and/or condition includes a sensing structure and first and second lateral bipolar junction transistors (BJTs) having opposite polarities. The first lateral BJT has a base that is electrically coupled to the sensing structure and is configured to generate an output signal indicative of a change in stored charge in the sensing structure. The second lateral BJT is configured to amplify the output signal of the first bipolar junction transistor. The first and second lateral BJTs, the sensing structure, and the substrate on which they are formed comprise a monolithic structure.

Abstract: Capacitive sensors and MEMS elements that can be implemented directly above silicon CMOS electronics are disclosed. A capacitive based sensor is disposed over a first predetermined portion of a wafer that includes at least a first ceramic element providing protection for the final capacitive based sensor and self-aligned processing during its manufacturing.

Abstract: An image sensor includes a plurality of photodiodes and a floating diffusion disposed in a semiconductor material. The image sensor also includes a plurality of transfer gates coupled between the plurality of photodiodes and the floating diffusion to transfer the image charge generated in the plurality of photodiodes into the floating diffusion. Peripheral circuitry is disposed proximate to the plurality of photodiodes and coupled to receive the image charge from the plurality of photodiodes. A shallow trench isolation structure is laterally disposed, at least in part, between the plurality of photodiodes and the peripheral circuitry to prevent electrical crosstalk between the plurality of photodiodes and the peripheral circuitry. The peripheral circuitry includes one or more transistors including a source electrode and a drain electrode that are raised above a surface of the semiconductor material.

Abstract: A semiconductor package includes a frame including a through-hole, an electronic component disposed in the through-hole, a redistribution portion disposed below the frame and the electronic component, a metal layer disposed on an inner surface of the frame, and a conductive layer disposed between the metal layer and the electronic component, and covering the frame and the electronic component.

Abstract: An optical coupling device includes a first receiving chip having a first region on one end and a second region on another end side. A first emitting chip is disposed on the first region. A second receiving chip has a third region on one end and a fourth region on another end. A second emitting chip is disposed on the fourth region. The first and third regions are adjacent, and the second and fourth regions are adjacent. A first connection portion is disposed on the second region and is electrically connected to the second light emitting chip through a bonding wire. A second connection portion is disposed in the third region and is electrically connected to the first light emitting chip through a bonding wire.

Abstract: A local thinning process is employed on the backside of a semiconductor substrate such as a wafer in order to improve the thermal performance of the electronic device built on or in the front side of the wafer.

Abstract: The method for manufacturing a thin film transistor includes the processes of forming a gate electrode on a surface of a substrate, forming an insulation film on the surface of the substrate on which the gate electrode is formed, forming a first amorphous silicon layer on the surface of the substrate on which the insulation film is formed, annealing a plurality of required places separated from each other on the first amorphous silicon layer by irradiating the same with an energy beam to change the required places to a polysilicon layer, forming a second amorphous silicon layer by covering the polysilicon layer, forming an n+ silicon layer on a surface of the second amorphous silicon layer, etching the first amorphous silicon layer, the second amorphous silicon layer and the n+ silicon layer.