Patents Examined by Fahmida Rahman
  • Patent number: 9965289
    Abstract: In accordance with embodiments of the present disclosure, a method may include, during boot of an information handling system, determining a first amount of energy required by the information handling system to flush a cache integral to the information handling system to memory integral to the information handling system in response to a power loss of one or more power supplies for supplying electrical energy to the information handling system, determining whether a second amount of energy available for hold-up of one or more power supplies in response to the power loss exceeds the first amount of energy, and responsive to determining whether the second amount of energy exceeds the first amount of energy, configuring the cache.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: May 8, 2018
    Assignee: Dell Products L.P.
    Inventors: John Erven Jenne, Stuart Allen Berke, Dit Charoen
  • Patent number: 9959042
    Abstract: Disclosed herein is a technique for dynamically scaling a low-power self-refresh (LPSR) idle interval associated with a solid state drive (SSD) of a user device in order to promote enhanced battery life efficiency within the user device. A determination can be made regarding whether the LPSR idle interval is to be scaled up or scaled down. Specifically, the determination is based on a total elapsed since the user device was first powered on and a total number of LPSR transitions or cycles that have been performed in association with the SSD. In turn, the dynamic scaling of the LPSR idle intervals causes NAND power-cycles to be consumed responsibly over an average system lifetime of the user device, which can result in better power management at the user device.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: May 1, 2018
    Assignee: Apple Inc.
    Inventors: Bhaskar R. Adavi, Christopher J. Sarcone, Manoj K. Radhakrishnan
  • Patent number: 9959075
    Abstract: Systems and methods for improved implementation of low power modes in a multi-core system-on-a-chip (SoC) are presented. A cache memory of the multi-core SoC not being accessed by other components of the SoC is identified and a number of dirty cache lines present in the cache memory is determined. For a low power mode of the core, an entry latency based on the number of dirty cache lines is determined, and an exit latency is determined. An entry power cost for the low power mode is also determined based on the number of dirty cache lines A determination is made whether the low power mode for the cache memory results in a power savings over an active mode for the cache memory based at least on the entry power cost and the entry latency of the cache memory entering the first power mode.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: May 1, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Krishna Vsssr Vanka, Narasimhan Agaram, Sravan Kumar Ambapuram
  • Patent number: 9946320
    Abstract: An information processing method and an electronic apparatus are described to reduce the power consumption of electronic apparatus. The method is applied to an electronic apparatus that includes a processing module with at least two sensing units corresponding to at least two power consumption grades. The method includes, when the N sensing units among the at least two sensing units are in an OFF state and the M sensing units among the at least two sensing units are in an ON state, obtaining a first parameter through at least one sensing unit among the M sensing units; determining whether the first parameter satisfies a first predetermined condition; if so, controlling N1 sensing units among the N sensing units to be in the ON state, wherein N1 is a positive integer less than or equal to N.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: April 17, 2018
    Assignee: LENOVO (BEIJING) CO., LTD.
    Inventors: Qian Zhao, Yawei Cheng
  • Patent number: 9940143
    Abstract: Systems and methods for using Peripheral Component Interconnect Express Vendor-Defined Message (PCIe-VDM) and Inter-Integrated Circuit (I2C) transport for network communications are described. In some embodiments, an IHS may include: a host processor; a Basic Input/Output System (BIOS) coupled to the host processor; a Baseboard Management Controller (BMC) coupled to the host processor; and a memory coupled to the BMC, the memory having program instructions stored thereon that, upon execution, cause the BMC to: receive a message over a network while the host processor is powered off, wherein the message originates from a remote IHS and targets the BMC; and in response to a pass-through data transfer rate available to the BMC not meeting a threshold value: power on the host processor; request that the BIOS boot up; and perform a communication with the remote IHS via a PCIe bus using a PCIe-VDM supported by the host processor.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: April 10, 2018
    Assignee: Dell Products, L.P.
    Inventors: Ajeesh Kumar, Yarriswamy Chandranna, Kala Sampathkumar, Elie Antoun Jreij
  • Patent number: 9921886
    Abstract: A mobile terminal device receives a request for a sensing operation from an application program, specifies candidate processors that are to perform condition determination to determine whether an event output from a sensor performing the sensing operation of the received request satisfies conditions for notification, the conditions being designated by the application program, calculates an evaluation value of electricity consumed by each of the candidate processors in the condition determination, using frequency of the event of the sensing operation of the received request in frequency data, the frequency data linking an event output from a sensor to frequency of generation of the event, and selects a candidate processor having an optimal evaluation value.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: March 20, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Eiji Hasegawa, Manabu Nakao, Toru Kamiwada
  • Patent number: 9916165
    Abstract: A basic input/output system may be configured to, during boot of an information handling system in a pre-operating system environment of the information handling system, calculate an amount of energy required to perform a persistent memory save operation in a persistent memory of the information handling system in order to transfer data from a volatile memory of the persistent memory communicatively coupled to the processor to a non-volatile memory of the persistent memory communicatively coupled to the volatile memory, cause charging of an energy storage device for providing electrical energy to perform persistent memory save operations at least until a charging level of the energy storage device satisfies the amount of energy, and boot to an operating system of the information handling system responsive to the charging level of the energy storage device satisfying the amount of energy.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: March 13, 2018
    Assignee: Dell Products L.P.
    Inventors: Stuart Allen Berke, Shane Michael Chiasson
  • Patent number: 9898304
    Abstract: Described is a technology by which independent computing functions such as corresponding to separate operating systems may be partitioned into coexisting partitions. A virtual machine manager, or hypervisor, manages the input and output of each partition to operate computer system hardware. One partition may correspond to a special purpose operating system that quickly boots, such as to provide appliance-like behavior, while another partition may correspond to a general purpose operating system that may load while the special purpose operating system is already running. The computer system that contains the partitions may transition functionality and devices from one operating system to the other. The virtual machine manager controls which computer hardware devices are capable of being utilized by which partition at any given time, and may also facilitate inter-partition communication.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: February 20, 2018
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Therron L. Powell, Jason Michael Anderson
  • Patent number: 9891686
    Abstract: An apparatus and system for throttling I/O devices in a computer system is provided. In an example, a method for throttling device power demand during critical power events. The method includes detecting a critical power event and issuing a signal to system devices to defer optional transactions during the critical power event.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: February 13, 2018
    Assignee: Intel Corporation
    Inventors: Janusz Jurski, Robert Swanson, Anil Kumar, Mariusz Oriol, Waldemar Piotrewicz
  • Patent number: 9891696
    Abstract: In one general aspect, a method can include determining that a computing device is in a stationary position for a predetermined time, placing the computing device in a first power mode, detecting input from at least one sensor included in the computing device, identifying at least one application to launch on the computing device based on the detected input and on a heuristic-based usage pattern for the computing device, and transitioning the computing device from the first power mode to a second power mode based on the detected input. The transitioning can include automatically launching the at least one application on the computing device. The at least one application can provide content for display on a display device included in the computing device.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: February 13, 2018
    Assignee: Google LLC
    Inventors: Choon Ping Chng, Rachel Nancollas, Alec Berg, Alexandra Levich
  • Patent number: 9874919
    Abstract: In some implementations, power provided to a computing system, such as a rack system, may be interrupted. This interruption is detected, and in response, power from a battery backup system is directed to the computing system to replace the interrupted power source, which in some implementations may be a main AC power grid source. A signal is received indicating that a backup power source, for example a backup generator system, is online and prepared to deliver power to the computing system. For an initial period of time, this backup power source is prevented from providing power to the computing system. For example, the backup generator system may be providing power to a power supply unit of the computing system, but the power is not allowed to flow to the computing system.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: January 23, 2018
    Assignee: QUANTA COMPUTER INC.
    Inventors: Maw-Zan Jau, Shu-Chen Ni, Chin-Hsiang Chan, Yi-Sheng Chen, Chih-Chang Tsai
  • Patent number: 9829912
    Abstract: The present invention solves a problem that the phases of clocks obtained by frequency-dividing PLL clocks output from local PLL circuits cannot be made the same in a plurality of data transfer blocks. A local PLL circuit outputs a PLL clock obtained by multiplying a common external clock. A frequency divider outputs a feedback clock obtained by frequency-dividing the PLL clock to the local PLL circuit. An FIFO buffer temporarily holds data input from the outside. The FIFO buffer outputs the held data on the basis of a frequency-divided PLL clock. A clock generator generates a frequency-divided PLL clock obtained by frequency-dividing the PLL clock. The clock generator controls the phase of the frequency-divided PLL clock on the basis of a common start signal.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: November 28, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Yasutake Manabe
  • Patent number: 9817660
    Abstract: A method of reducing execution jitter includes a processor having several cores and control logic that receives core configuration parameters. Control logic determines if a first set of cores are selected to be disabled. If none of the cores is selected to be disabled, the control logic determines if a second set of cores is selected to be jitter controlled. If the second set of cores is selected to be jitter controlled, the second set of cores is set to a first operating state. If the first set of cores is selected to be disabled, the control logic determines a second operating state for a third set of enabled cores. The control logic determines if the third set of enabled cores is jitter controlled, and if the third set of enabled cores is jitter controlled, the control logic sets the third set of enabled cores to the second operating state.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: November 14, 2017
    Assignee: Dell Products, L.P.
    Inventors: Michael Karl Molloy, Mukund P. Khatri, Robert W. Hormuth
  • Patent number: 9811133
    Abstract: A method enables the sharing of power between multiple battery-powered electronic devices. A determination is made as to which tasks, from multiple pending tasks on multiple battery-powered electronic devices, are to be selected for completion. A power requirement for each of the tasks that have been selected for completion is determined, and the tasks are prioritized. One or more processors calculates a quantity of amp-hours that are available to charge batteries on the battery-powered electronic devices. A power distribution hardware controller then distributes available amp-hours from the battery source to one or more of the battery-powered electronic devices based on the priority of the tasks.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: November 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Gary D. Cudak, Christopher J. Hardee, Sarbajit K. Rakshit, Adam Roberts
  • Patent number: 9811132
    Abstract: A system comprises: a power hub; a charging battery electrically connected to the power hub; a plurality of battery-powered electronic devices electrically connected to the power hub; and a power distribution controller within the power hub. The power distribution controller shares power between the plurality of battery-powered electronic devices based on: which tasks, from multiple pending tasks on the plurality of battery-powered electronic devices, are selected for completion; a power requirement for each of the tasks that have been selected for completion; a priority of the tasks, from the multiple pending tasks on the plurality of battery-powered electronic devices, that have been selected for completion; and a quantity of amp-hours that are available to charge batteries on the plurality of battery-powered electronic devices.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: November 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Gary D. Cudak, Christopher J. Hardee, Sarbajit K. Rakshit, Adam Roberts
  • Patent number: 9792183
    Abstract: A method for interworking with an external terminal is provided. The method includes, at a mobile terminal, displaying a screen for selecting whether or not to reset the mobile terminal, if a connection request is received from a second terminal while the mobile terminal interworks with a first terminal, at the mobile terminal, generating first backup data including information about one or more execution files corresponding to one or more functions linked to the first terminal, if resetting of the mobile terminal has been selected on the screen, and at the mobile terminal, transmitting the first backup data to the first terminal, and performing resetting.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: October 17, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hwa-Jun Lee
  • Patent number: 9792105
    Abstract: Provided are a booting method of updating software components installed in a system and recovering from an error that occurs in an update, a method and system for automatically updating the software and recovering from the error, and a computer readable recording medium storing the method. The master boot record and the backup boot record are used to stably update a kernel and effectively recover from an update error. The component configuration database is used to update a plurality of software components including a kernel in a transaction, and perfectly recover from an update error.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: October 17, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Jong-suk Lee
  • Patent number: 9766898
    Abstract: An operating method for a computer system having system firmware and an operating element to switch on the computer system includes monitoring the operating element for an actuation, immediately after starting actuation of the operating element, performing a first part of a boot sequence, determining a time period for which the operating element is actuated, executing a remaining part of full boot sequence with the system firmware if the determined time period exceeds a predetermined time period, where the full boot sequence includes activation of a keyboard and mouse through the firmware, and executing a remaining part of limited boot sequence with the system firmware if the determined time period does not exceed the predetermined time period, wherein the limited boot sequence does not include at least one of activation of a keyboard and mouse through the firmware.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: September 19, 2017
    Assignee: Fujitsu Technology Solutions Intellectual Property GmbH
    Inventors: Reinhold Freudenschuss, Bernhard Vogl, Stephan Schneider
  • Patent number: 9715267
    Abstract: A method for switching operating systems and an electronic apparatus are provided. A first operating system (OS) is notified to enter a power saving mode when a switching signal is received in case of running the first OS. In the power saving mode, a first running data of the first OS is stored to a first dump area of a storage unit from a system memory, a second OS is loaded to the system memory such that the second OS enters a normal operating mode.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: July 25, 2017
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Chih-Chien Liu, Chun-Sheng Chen
  • Patent number: 9703362
    Abstract: An electronic device includes a power supply unit, a to-be-used function setting unit, and a function-specific power supply control unit. The power supply unit supplies electric power to a constituent unit of the electronic device from a main power source. The to-be-used function setting unit sets functions to be used when the main power source is turned on. The function-specific power supply control unit controls the power supply unit to a) supply electric power to a constituent unit corresponding to a function that has been set by the to-be-used function setting unit when the main power source is turned on and b) supply electric power to a constituent unit corresponding to a function that has not been set by the to-be-used function setting unit when the function that has not been set is selected after turning on the main power source.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: July 11, 2017
    Assignee: KYOCERA Document Solutions Inc.
    Inventors: Katsuji Furushige, Masaya Okuda, Masato Hirota