Abstract: According to one embodiment, a flat panel display includes a first mounting portion including a first input pad and a first output pad, a second mounting portion including a second input pad and a second output pad, a first common terminal and a second common terminal, which have a common potential, and a guard ring wiring which is formed in a manner to extend from the first common terminal, to pass between the first input pad and the first output pad of the first mounting portion, to pass between the second input pad and the second output pad of the second mounting portion, and to reach the second common terminal, the guard ring wiring including a first resistor element of a first resistance value and a second resistor element of a second resistance value which is higher than the first resistance value.

Abstract: A finFET is formed having a fin with a source region, a drain region, and a channel region between the source and drain regions. The fin is etched on a semiconductor wafer. A gate stack is formed having an insulating layer in direct contact with the channel region and a conductive gate material in direct contact with the insulating layer. The source and drain regions are etched leaving the channel region of the fin. Epitaxial semiconductor is grown on the sides of the channel region that were adjacent the source and drain regions to form a source epitaxy region and a drain epitaxy region. The source and drain epitaxy regions are doped in-situ while growing the epitaxial semiconductor.

Abstract: An RRAM at an STI region is disclosed with a vertical BJT selector. Embodiments include defining an STI region in a substrate, implanting dopants in the substrate to form a well of a first polarity around and below an STI region bottom portion, a band of a second polarity over the well on opposite sides of the STI region, and an active area of the first polarity over each band of second polarity at the surface of the substrate, forming a hardmask on the active areas, removing an STI region top portion to form a cavity, forming an RRAM liner on cavity side and bottom surfaces, forming a top electrode in the cavity, removing a portion of the hardmask to form spacers on opposite sides of the cavity, and implanting a dopant of the second polarity in a portion of each active area remote from the cavity.

Abstract: A wire bond free power module assembly consists of a plurality of individual thin packages each consisting of two DBC wafers which sandwich one or more semiconductor die. The die electrodes and terminals extend through one insulation covered end of the wafer sandwich and the outer sides of the sandwiches are the outer copper plates of the DBC wafers which are in good thermal communication with the semiconductor die but are electrically insulated therefrom. The plural packages may be connected in parallel by lead frames on the terminals and the packages are stacked with a space between them to expose both sides of all packages to a cooling medium, either the fingers of a conductive comb or a fluid heat exchange medium.

Abstract: A nonvolatile charge trap memory device is described. The device includes a substrate having a channel region and a pair of source/drain regions. A gate stack is above the substrate over the channel region and between the pair of source/drain regions. The gate stack includes a multi-layer charge-trapping region having a first deuterated layer. The multi-layer charge-trapping region may further include a deuterium-free charge-trapping layer.

Abstract: The semiconductor device includes a first conductor formed over a semiconductor substrate; a first insulator formed over the first conductor; a second insulator formed over the first insulator, the second insulator having an etching characteristic different from an etching characteristic of the first insulator; a second conductor formed on the second insulator, the second conductor being in contact with the second insulator; a third insulator formed over the second conductor, the third insulator having an etching characteristic different from the etching characteristic of the second insulator; a first contact hole formed through the third insulator and the second conductor, the first contact hole reaching the second insulator; a third conductor formed in the first contact hole, wherein a side wall of the third conductor is electrically connected to a side wall of the second conductor; a second contact hole formed through the third insulator and the first insulator, the second contact hole reaching the first c

Abstract: An organic light emitting diode display includes: a substrate; a display device formed on the substrate, and including a common power line and a common electrode; a sealing substrate attached to the substrate by a junction layer surrounding the display device, the sealing substrate sealing the display device with the substrate; a first conductor formed over an outer side, a lateral side, and an inner side of the sealing substrate, the first conductor being for supplying a first electrical signal to the common power line; a second conductor formed on the inner side, the lateral side, and the outer side of the sealing substrate, the second conductor being for supplying a second electrical signal to the common electrode; and a plurality of arranging members formed into the sealing substrate, the first conductor, and the second conductor, the arranging members being for arranging positions of the sealing substrate, the first conductor, and the second conductor.

Abstract: An organic electroluminescence element includes: a pair of electrodes composed of a positive electrode and a negative electrode, one of which is transparent or semitransparent; and one or more organic compound layers that are sandwiched between the pair of electrodes, in which at least one layer of the organic compound layers contains one or more of charge-transporting polyesters represented by formula (I).

Abstract: Wearers of hearing apparatuses and in particular of hearing device systems having two speakers are to be able to enjoy the experience of spatial multi-channel reproduction. Provision is accordingly made to generate a dual-channel audio signal for a binaural hearing apparatus comprising a multi-channel audio signal having at least three individual channels. Accordingly at least one spatial impression-influencing signal level in at least one of the individual channels is changed, and a signal of at least one of the individual channels is connected with signals of the remaining individual channels to the dual-channel audio signal. A corresponding hearing apparatus and in particular a corresponding hearing device have a transformation system that takes over this preprocessing from the multi-channel audio signal to the dual-channel audio signal.

Abstract: A nitride semiconductor light emitting device is formed by: forming a resist pattern on a first nitride semiconductor layer formed on a substrate, the resist pattern having a region whose inclination angle relative to a substrate surface changes smoothly as viewed in a cross section perpendicular to the substrate surface; etching the substrate by using the resist pattern as a mask to transfer the resist pattern to the first nitride semiconductor layer; and forming an light emitting layer on the patterned first nitride semiconductor layer. The nitride semiconductor light emitting device can emit near-white light or have a wavelength range generally equivalent to or near visible light range.

Abstract: In a semiconductor device in which a glass substrate is attached to a surface of a semiconductor die with an adhesive layer being interposed therebetween, it is an object to fill a recess portion of an insulation film formed on a photodiode with the adhesive layer without bubbles therein. In a semiconductor die in which an optical semiconductor integrated circuit including a photodiode having a recess portion of an interlayer insulation film in the upper portion, an NPN bipolar transistor, and so on are formed, generally, a light shield film covers a portion except the recess portion region on the photodiode and except a dicing region. In the invention, an opening slit is further formed in the light shield film, extending from the recess portion to the outside of the recess portion, so as to attain the object.

Abstract: A semiconductor wafer having a multi-layer wiring structure is disclosed. The wafer comprises a plurality of chip die areas arranged on the wafer in an array and scribe line areas between the chip die areas. The scribe lines of a semiconductor wafer having USG top-level wiring layers above ELK wiring layers have at least one metal film structures substantially covering corner regions where two scribe lines intersect to inhibit delamination at the USG/ELK interface during wafer dicing operation.

Abstract: A mock bump system includes providing a flip chip integrated circuit having an edge and forming a mock bump near the edge.

Abstract: The present invention relates to a loudspeaker device, comprising first and second closely located and individually acoustically isolated loudspeaker elements. The first and second elements are arranged to receive a first signal and a second signal, respectively, at least part of said first signal being in anti-phase relative to said second signal. The device further includes third and fourth loudspeaker elements, being located in close proximity to said first and second loudspeaker elements, respectively.

Abstract: An ESD protection element is formed by a PN junction diode including an N+ type buried layer having a proper impurity concentration and a first P+ type buried layer and a parasitic PNP bipolar transistor which uses a second P+ type buried layer connected to a P+ type diffusion layer as the emitter, an N? type epitaxial layer as the base, and the first P+ type buried layer as the collector. The first P+ type buried layer is connected to an anode electrode, and the P+ type diffusion layer and an N+ type diffusion layer surrounding the P+ type diffusion layer are connected to a cathode electrode. When a large positive static electricity is applied to the cathode electrode, and the parasitic PNP bipolar transistor turns on to flow a large discharge current.

Abstract: Generally, the present disclosure is directed to a semiconductor device with DRAM bit lines made from the same material as the gate electrodes in non-memory regions of the device, and methods of making the same. One illustrative method disclosed herein comprises forming a semiconductor device including a memory array and a logic region. The method further comprises forming a buried word line in the memory array and, after forming the buried word line, performing a first common process operation to form at least a portion of a conductive gate electrode in the logic region and to form at least a portion of a conductive bit line in the memory array.

Abstract: The transparent photodetector includes a substrate; a waveguide on the substrate; a displaceable structure that can be displaced with respect to the substrate, the displaceable structure in proximity to the waveguide; and a silicon nanowire array suspended with respect to the substrate and mechanically linked to the displaceable structure, the silicon nanowire array comprising a plurality of silicon nanowires having piezoresistance. In operation, a light source propagating through the waveguide results in an optical force on the displaceable structure which further results in a strain on the nanowires to cause a change in electrical resistance of the nanowires. The substrate may be a semiconductor on insulator substrate.

Abstract: A semiconductor arrangement includes a MOSFET having a source region, a drift region and a drain region of a first conductivity type, a body region of a second conductivity type arranged between the source region and the drift region, a gate electrode arranged adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a source electrode contacting the source region and the body region. The semiconductor arrangement further includes a normally-off JFET having a channel region of the first conductivity type that is coupled between the source electrode and the drift region and extends adjacent the body region so that a p-n junction is formed between the body region and the channel region.

Abstract: A conductive bump formed on an electrode surface of an electronic component. This conductive bump is composed of a plurality of photosensitive resin layers having different conductive filler contents. Consequently, this conductive bump is able to realize conflicting functions, namely, improvement in adhesion strength with the electrode and reduction of contact resistance.

Abstract: A headphone accessory for use with a portable audio device and headphones. The headphone accessory includes an audio source input for receiving audio signals from an audio device. An audio sound transducer receives external sounds and converts the external sound to external sound signals. A signal mixer for continuously varies the balance of a source audio volume to an external sound volume. The signal mixer mixes the volume-adjusted source audio signals with volume-adjusted external sound signals. An audio output outputs the mixed source audio and external sound signals.