Abstract: An apparatus and method for reducing current consumption in a portable terminal are provided, in which upon generation of a task, a controller transitions to a Virtual Maximum Clock (VMC) level and changes a clock level from the VMC level according to a load state of the controller, to process the task. Moreover, the controller changes the clock level by at least one of transition from the VMC level to an RMC level, a stepwise increase from the VMC level, a stepwise decrease from the VMC level, and a hold at the VMC level, according to the load state of the controller.

Abstract: A step down unit steps down an external power supply voltage Vcc. A bias current control circuit controls the magnitude of bias current flowing through an auxiliary path connecting an output node and the ground. A system controller increases the magnitude of the bias current, prior to a change of the operation state of a load circuit by which a relatively large change occurs to the amount of current consumed by the load circuit including a central processing unit.

Abstract: A scalability algorithm causes a processor to initialize a performance indicator counter, operate at an initial frequency of the first clock signal for a first duration, and determine, based on the performance indicator counter, an initial performance of the first processing core. The algorithm may then cause the processor to operate at a second frequency of the first clock signal for a second duration and determine, based on the performance indicator counter, a second performance of the first processing core. A performance scalability of the first processing core may be determined based on the initial performance and the second performance and an operational parameter, such as one or more clock frequencies and/or supply voltage(s), may be changed based on the determined scalability.

Abstract: A processor is described having a semiconductor chip having non volatile storage circuitry. The non volatile storage circuitry has information identifying a maximum operational frequency of the processor at which the processor's operation is guaranteed for an ambient temperature that corresponds to an extreme thermal event.

Abstract: An appliance network connectivity apparatus includes a voltage sensor that generates a signal at an output that is proportional to a voltage provided to the appliance. A current sensor generates a signal at an output that is proportional to a current flowing through the appliance. A processor determines the electrical characteristics of power consumed by the appliance and executes web server software for communicating data through a network. A relay controls power from the power source to the appliance. A memory stores the electrical characteristics. A network interface provides the electrical characteristics to the network.

Abstract: Example embodiments of core voltage margining apparatus include a plurality of voltage offset blocks disposed on a multi-core processor with each voltage offset block having a voltage input coupled to receive a supply voltage level, a control input coupled to receive an offset code, and a voltage output coupled to a respective core processor in the multi-core processor, with each voltage offset block configured to offset the supply voltage level by an voltage offset value programmed by an offset code received at the control input of the voltage offset block and a voltage offset register having a like plurality of control outputs each coupled to a corresponding control input of a voltage offset block, where the voltage output register is configured to hold an offset code for each voltage offset block and to provide the offset code, programming the voltage level of a selected voltage offset block, at the control output port coupled to the selected voltage offset block.

Abstract: A reprogramming device is used for reprogramming embedded systems. The reprogramming device comprises a microprocessor, a memory programmed with software to accomplish the reprogramming of distinctly different embedded systems architectures, and one or more hardware devices that facilitate communication over multiple protocols contained in a portable package designed for both one-time and multi-occurrence use scenarios. In some embodiments, the reprogramming device is able to be used to enhance one or more attributes of performance of existing embedded systems through the reconfiguration of internally stored parameters. In some embodiments, the reprogramming device is also to be used to extract and receive information and instruction from existing embedded systems and enable useful presentation of this information. As a result, the reprogramming device is able to be used to adjust and/or monitor the parameters of the on-board diagnostics computer of a vehicle to ensure peak performance and detect errors.

Abstract: Apparatus and method for supplying electrical power to a device. A system on chip (SOC) integrated circuit includes a first region having a processing core and a second region characterized as an always on domain (AOD) power island having a power control block with an energy detector coupled to a host input line. First and second power supply modules respectively supply power to the first and second regions. The second power supply module includes a main switch between the first power supply module and a host input voltage terminal. The power control block opens the main switch to enter a low power mode during which no power is supplied to the first region, and the power control block closes the main switch to resume application of power to the first region responsive to the energy detector detecting electrical energy on the host input line.

Abstract: Various embodiments of methods and systems for adaptive thermal management techniques implemented in a portable computing device (“PCD”) are disclosed. Notably, in many PCDs, temperature thresholds associated with various components in the PCD such as, but not limited to, die junction temperatures, package on package (“PoP”) memory temperatures and the “touch temperature” of the external surfaces of the device itself limits the extent to which the performance capabilities of the PCD can be exploited. It is an advantage of the various embodiments of methods and systems for adaptive thermal management that, when a temperature threshold is violated, the performance of the PCD is sacrificed only as much and for as long as necessary to clear the violation before authorizing the thermally aggressive processing component(s) to return to a maximum operating power.

Abstract: An embodiment may include circuitry to determine whether to issue at least one credit to at least one sender of at least one packet. The credit(s) may be to grant permission to the at least one sender to issue the at least one packet to at least one receiver of the at least one packet. The determination of whether to issue the credit(s) may be based, at least in part, upon whether a time in which the at least one receiver is in a relatively lower power state prior to issuance of the credit(s) is at least sufficient to provide at least a predetermined amount of reduction in power consumption. The relatively lower power state may be relative to a relatively higher power state of the at least one receiver that prevails at the issuance of the credit(s). Additionally or alternatively, the circuitry may be to receive such credit(s).

Abstract: Apparatus and method for operating a device in a low power mode. In accordance with some embodiments, the apparatus comprises a memory and a system on chip (SOC) integrated circuit. The SOC has a first region with a processing core and a second region electrically isolated from the first region as an always on domain power island with a power control block. In response to a sleep command, the processing core transfers system data to the memory and the power control block enters a low power mode in which no electrical power is supplied to the first region. In response to a wake up command, power is restored to the first region and the processing core performs a reinitialization operation responsive to status information communicated by the power control block indicative of a state of the system during the low power mode.

Abstract: The subject matter of this application is embodied in an apparatus that includes a data processor, and two or more hardware monitors to measure parameters associated with the data processor. The apparatus also features a power supply to provide power to the data processor and the hardware monitors, and a controller to control the power supply to adjust an output voltage level of the power supply according to measurements from the hardware monitors. Different weight values are applied to the hardware monitors under different conditions, and the power supply output voltage level is controlled according to weighted measurements or values derived from the weighted measurements.

Abstract: In a method of power control for a system-on-chip, output of at least one of a first wakeup request signal and a second wakeup request signal is controlled such that a time interval between the output of the first wakeup request signal and the output of the second wakeup request signal is greater than or equal to a time interval threshold. The first wakeup request signal and the second wakeup request signal are one of concurrent and consecutive wakeup request signals.

Abstract: An exemplary method of maintaining secure time in a computing device is disclosed in which one or more processors implements a Rich Execution Environment (REE), and a separate Trusted Execution Environment (TEE). The TEE maintains a real-time clock (RTC) that provides a RTC time to the REE. A RTC offset is stored in non-volatile memory, with the RTC offset indicating a difference between the RTC time and a protected reference (PR) time. Responsive to a request from the REE to read the RTC time, a current RTC time is returned to the REE. Responsive to a request from the REE to adjust the RTC time, the RTC time and the corresponding RTC offset are adjusted by a same amount, such that the PR time is not altered by the RTC adjustment. An exemplary computing device operable to implement the method is also disclosed.

Abstract: A computer peripheral device incorporates a fuel cell that may be used to supply power to a computer device coupled to the peripheral device. The peripheral device comprises a housing and circuitry within the housing to provide at least one computer peripheral function. A data interface provides for data transfer to and/or from a computer device. A fuel cell power source is incorporated into the peripheral device. A power interface provides power transfer to the computer device when connected thereto. A power controller is configured to supply power from the fuel cell power source to the power interface for supplying said power to said computer device when connected thereto.

Abstract: In one embodiment, an apparatus may include a rising edge detector to detect a rising edge in a signal. The apparatus may also include a counter to perform a count to a first value based on an input clock signal. The apparatus may also include an output unit to generate a sleep signal after the first value is reached if the rising edge detector does not detect the rising edge in the signal.

Abstract: A method and an apparatus for supporting a hibernation function in a mobile device are provided. The method includes receiving an input at an electronic device, loading, using one or more processors, a snapshot image for the electronic device in response to the input, comparing at least one portion of the snapshot image with data indicating a state of the electronic device, and updating the snapshot image using the data, based at least in part on a determination that the state of the electronic device has been changed.

Abstract: Systems and methods may provide for monitoring a current provided from a voltage regulator to a non-core region of a processor, and asserting a throttle signal to the non-core region of the processor if the current exceeds a supply capability threshold of the voltage regulator. In one example, a specified current supply capability of the non-core region is greater than a current supply capability of the voltage regulator, and the supply capability threshold is less than the specified current supply capability of the non-core region and an over current protection threshold of the non-core region.

Abstract: Methods, systems, and apparatus for enabling a power path between a power source and a host device via an accessory. A host device may send, to an accessory arranged within the power path, via a first data pin arranged in the host device, a request for an accessory identifier. The accessory identifier identifies the accessory. The host device may then determine whether the accessory identifier is received from the accessory within a specified period of time or whether a received accessory identifier is valid. If the accessory identifier is not received from the accessory within the specified period of time, or a received accessory identifier is not valid, the host device sends a new request for the accessory identifier to the accessory via a second data pin different than the first data pin.

Abstract: A method for hot swapping program code includes defining a predetermined range of new code from which to execute; identifying from the new code one or more system components which require a reinitialization or reset; reinitializing or resetting the one or more system components; and executing the new code.