Abstract: In an embodiment, a method includes programming a control signal that specifies a target resistance and a target voltage in a circuit. The method further includes sending the control signal to at least one transistor configured to control a current flow in the circuit. The method further includes providing, as an output, a signal with the target voltage and target resistance.

Abstract: A device includes a power supply line, an output terminal, a circuit configured to perform a logic operation on a first signal and a second signal to produce a third signal, first, second and third transistors. The first transistor is coupled between the power supply line and the output terminal and includes a control gate supplied with the third signal. The second and third transistors are coupled in series between the power supply line and the output terminal. The second transistor includes a control gate supplied with the first signal and the third transistor includes a control gate supplied with a fourth signal that is different from each of the first, second and third signals.

Abstract: A method for operating an electromagnetic compatibility testing system includes for selected frequencies, adjusting incrementally the lengths of each of the plurality of length-adjustable elements for selected combinations of length ratios between the driven element and other length-adjustable elements, including length ratios where the driven element is longer than the other length-adjustable elements, for each selected frequency storing in a table one of the incremental lengths at one of the selected combinations of length ratios having one of the lowest VSWR and a VSWR lower than a threshold value that has highest signal strength, for each selected frequency adjusting the lengths of each of the length-adjustable elements to the stored lengths, driving RF energy at the selected frequency at a EMC test power level into the EMC antenna generating an e-field in the equipment under test, and measuring behavior of the equipment under test in the presence of the e-field.

Abstract: A lighting method for illuminating an environment by means of a plurality of light sources is comprised of the following steps: acquiring a video signal, in which an image of each frame is divided into a plurality of boxes; subdividing the video signal into a plurality of video signal boxes, each associated with an image portion of each frame displayed on a respective box; processing frequency of the frame video signals, for obtaining spectra of respective luminance and chrominance signals associated with each video signal box; extracting a dominant frequency band of the luminance signal spectrum associated with each box video signal; extracting a dominant frequency band of the chrominance signal spectrum associated with each box video signal; summing the processed spectra of luminance and chrominance signals; and obtaining a time driving signal of each of the light sources.

Abstract: An analog circuit for solving optimization algorithms comprises three voltage controlled current sources and three capacitors, operatively coupled in parallel to the three voltage controlled current sources, respectively. The circuit further comprises a first inductor, operatively coupled in series between a first pair of the capacitors and the voltage controller current sources and a second pair of the capacitors and the voltage controller current sources. The circuit further comprises a second inductor, operatively coupled in series between the second pair of the capacitors and the voltage controller current sources and a third pair of the capacitors and the voltage controller current sources.

Abstract: A secure one-way network gateway for transmitting data from a source network to a destination network is disclosed. An input circuit is for coupling to a source network and an output circuit is for coupling to an output network. A memory stores configuration data. Either a single field-programmable device or a pair of field-programmable devices coupled via a one-way link are inserted between the input circuit and the output circuit. The configuration data is loaded into the device(s) to program the device(s) to pass data from the input circuit to the output circuit, to optionally filter the data, and to prevent any data from passing from the output circuit to the input circuit. A processor is coupled to only the memory and a separate management interface. The processor receives updated configuration data via the management interface and replaces the configuration data in the memory with the updated configuration memory.

Abstract: A charge neutralizer that includes a vacuum chamber which is capable of having a charged object installed therein and includes a high vacuum processing unit that performs vapor deposition, and a plasma generator configured to supply plasma caused by an electron cyclotron resonance to an inside of the vacuum chamber. The plasma generator includes a plasma source configured to generate the plasma, and a flange configured to install the plasma source inside the vacuum chamber.

Abstract: System and method for providing at least an output current to one or more light emitting diodes. The system includes a control component configured to receive at least a demagnetization signal, a sensed signal and a reference signal and to generate a control signal based on at least information associated with the demagnetization signal, the sensed signal and the reference signal, and a logic and driving component configured to receive at least the control signal and output a drive signal to a switch based on at least information associated with the control signal. The switch is connected to a first diode terminal of a diode and a first inductor terminal of an inductor. The diode further includes a second diode terminal, and the inductor further includes a second inductor terminal.

Abstract: Described is a high speed, low power level shifter circuit which includes a cross-coupled level shifter coupled to a sensing circuit. The sensing circuit turns off a cross-coupled node of a pair of cross-coupled nodes based on detecting that an input voltage has crossed a threshold voltage for a cross-coupled input transistor of a pair of cross-coupled input transistors, i.e. due to switching from a current logic level to an incoming logic level. Once the sensing circuit detects a threshold voltage crossing, a pull-up circuit pulls high a cross-coupled node and cross-coupled source transistor tied to the cross-coupled node. This turns off the cross-coupled source transistor and turns on another cross-coupled source transistor. Two parallel paths are now established to pull the cross-coupled node high, enabling a high-speed transition. The turning off of the cross-coupled source transistor also pulls the output to the incoming logic level.

Abstract: The disclosure provides an LED light system that is easy to install and customizable by the user. The LED lighting system may be plugged directly into an existing power source. In one configuration, the system includes a power supply that accepts standard power inputs. A low voltage bus line extends from the power supply. The user may connect LED light modules at essentially any location along a low voltage bus line of the system so that the light modules are located exactly where the user desires light. Uneven spacing is possible. Different size lights, different lumen powers, and different-colored light modules may be disposed along the low voltage bus line. Security features may be used to reduce the value of the system components to a thief.

Abstract: The supply voltage for a module of an integrated circuit managed to support protection against side channel attacks. Upon startup of the integrated circuit, one action from the following actions is selected in response to a command: supplying the module with the supply voltage having a fixed value that is selected from a plurality of predetermined values, or varying the value of the supply voltage in time with a pulsed signal.

Abstract: Described is an apparatus which comprises: a 4-state input magnet; a first spin channel region adjacent to the 4-state input magnet; a 4-state output magnet; a second spin channel region adjacent to the 4-state input and output magnets; and a third spin channel region adjacent to the 4-state output magnet. Described in an apparatus which comprises: a 4-state input magnet; a first filter layer adjacent to the 4-state input magnet; a first spin channel region adjacent to the first filter layer; a 4-state output magnet; a second filter layer adjacent to the 4-state output magnet; a second spin channel region adjacent to the first and second filter layers; and a third spin channel region adjacent to the second filter layer.

Abstract: The impedance of an antenna is reduced and gaps generated between electrodes constituting a capacitance element and a dielectric body are eliminated. An antenna (3) for generating inductively coupled plasma P includes at least two conductor elements (31), an insulation element (32) that is arranged between the mutually adjacent conductor elements (31) and insulates the conductor elements (31), and a capacitance element (33) that is connected electrically to and in series with the mutually adjacent conductor elements (31). The capacitance element (33) is configured from a first electrode (33A) electrically connected to one of the mutually adjacent conductor elements (21), a second electrode (33B) electrically connected to the other of the mutually adjacent conductor elements (21), and a liquid dielectric body filling the space between the first electrode (33A) and the second electrode (33B).

Abstract: A particle accelerator can include a first waveguide portion and a second waveguide portion. The first waveguide portion can include a first plurality of cell portions and a first iris portion that is disposed between two of the first plurality of cell portions. The first iris portion can include a first portion of an aperture such that the aperture is configured to be disposed about a beam axis. The first waveguide portion can further include a first bonding surface. The second waveguide portion can include a second plurality of cell portions and a second iris portion that is disposed between two of the second plurality of cell portions. The second iris portion can include a second portion of the aperture. The second waveguide portion can include a second bonding surface.

Abstract: An automatically reconfiguring light-emitting circuit includes a first and second block of electric lights, a switching mechanism, the switching mechanism having (i) a first state in which the switching mechanism electrically connects the first block of electric lights in parallel with the second block of electric lights and (ii) a second state in which the switching mechanism electrically connects the first block of electric lights in series with the second block of electric lights, a current regulator that generates a current control signal in response to a current in the first group of lights and second group of lights, and a controller electrically connected to the switching mechanism, the controller configured to switch the switching mechanism between the first state and the second state based on the current control signal.

Abstract: A lighting device capable of generating warm or neutral white light using blue light-emitting diodes (“LEDs”), red LEDs, and/or luminescent material that responds to blue LED emission is disclosed. The lighting device includes multiple first solid-state light-emitting structures (“SLSs”), second SLSs, and balancing resistor element. The first SLS such as a string of blue LED dies connected in series is able to convert electrical energy to blue optical light, which is partially turned into longer wavelength emission by the luminescent material. The second SLS such as a red LED die is configured to convert electrical energy to red optical light, wherein the second SLSs are connected in series. While the first SLSs and second SLSs are coupled in parallel, the balancing resistor element provides load balance for current redistribution between the first and second SLSs in response to fluctuation of operating temperature.

Abstract: An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element.

Abstract: A memory device includes a terminal calibration circuit having at least one of a pull-down circuit or a pull-up circuit used in calibrating an impedance of a data bus termination. The memory device also includes a reference calibration circuit configured to generate a calibration current. The terminal calibration circuit can be configured to program an impedance of the least one of a pull-down circuit or a pull-up circuit based on the calibration current.

Abstract: A high power electron tube, such as a magnetron, has the disadvantage that, to reduce the chances of the ceramic RF window failing in use, the manufacturing step entails a prolonged ageing period of powering the magnetron at low power on test, in order to drive any absorbed gases out of the RF window. According to the invention, the RF window 6 is internally glazed (8), which makes it possible to avoid the ageing period.

Abstract: A field programmable gate array (FPGA) includes: a first logic block having a first lookup table; and a second logic block having a second lookup table, wherein the first logic block is coupled to the second logic block, in which the first logic block is configured to pass, upon a clock cycle of the FPGA, data about a lookup table configuration stored in the first lookup table to the second logic block.