Patents Examined by H Cho
  • Patent number: 10574237
    Abstract: An application specific integrated circuit (ASIC) and a method for its design and fabrication is disclosed. In one embodiment, the camouflaged application specific integrated circuit (ASIC), comprises a plurality of interconnected functional logic cells that together perform one or more ASIC logical functions, wherein the functional logic cells comprise a camouflage cell including: a source region of a first conductivity type, a drain region of the first conductivity type, and a camouflage region of a second conductivity type disposed between the source region and the drain region. The camouflage region renders the camouflage cell always off in a first camouflage cell configuration and always on in a second camouflage cell configuration having a planar layout substantially indistinguishable from the first configuration.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: February 25, 2020
    Assignee: VERIMATRIX
    Inventors: Ronald P. Cocchi, Lap Wai Chow, James P. Baukus, Bryan J. Wang
  • Patent number: 10560095
    Abstract: According to various aspects, systems and methods for providing a soft-decoding physical unclonable function are provided. According to one embodiment, PUF circuitry includes circuit elements with impedance values that are used to generate a PUF value. For example, one or more resistors may be connected to a voltage source. The resistors may generate a resulting voltage signal that is measured and indicates a ratio of the impedance values of the resistors. Due to manufacturing variations, each impedance value may be unique, such that the impedance values may be used to provide a unique number sequence. Each ratio value may be converted into a single bit or multi-bit digital value through digitization, for example with a comparator and/or an analog to digital converter, and the series of digital values may represent or be used to generate a unique number sequence.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: February 11, 2020
    Assignee: Analog Devices, Inc.
    Inventors: Thomas G. O'Dwyer, Tze Lei Poo
  • Patent number: 10560102
    Abstract: A field programmable gate array (FPGA) includes: a first logic block having a first lookup table; and a second logic block having a second lookup table, wherein the first logic block is coupled to the second logic block, in which the first logic block is configured to pass, upon a clock cycle of the FPGA, data about a lookup table configuration stored in the first lookup table to the second logic block.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: February 11, 2020
    Assignee: Google LLC
    Inventor: Jonathan Ross
  • Patent number: 10554450
    Abstract: A method of performing coarse calibration of a voltage-mode (VM) driver having a plurality of driver slices connected in parallel includes setting a control code applied to activated driver slices of the plurality of driver slices to a maximum value to minimize an output resistance of the activated driver slices, activating one driver slice of the plurality of driver slices by applying the control code to the one driver slice, while disabling other driver slices of the plurality of driver slices, measuring an output resistance of the VM driver, determining whether the output resistance of the VM driver is greater than a desired resistance, and in response to determining that the output resistance of the VM driver is greater than a desired resistance activating one more driver slice of the plurality of driver slices.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: February 4, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Mohamed Elzeftawi, Amir Amirkhany
  • Patent number: 10547314
    Abstract: Superconducting circuits and methods for latching data are described. An example superconducting circuit includes an edge detect circuit configured to receive a logical clock signal and generate a return-to-zero clock signal. The superconducting circuit further includes a first latch configured to receive the logical clock signal and an input data signal, where the first latch is further configured to selectively delay the input data signal to generate a delayed data signal. The superconducting circuit further includes a second latch configured to receive the return-to-zero clock signal and the delayed data signal, where the second latch is further configured to capture a logical high value corresponding to the input data signal in response to a rising edge of the return-to-zero clock signal and capture a low logical value corresponding to the input data signal in response to a falling edge of the return-to-zero clock signal.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: January 28, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventor: Alexander L. Braun
  • Patent number: 10548195
    Abstract: System and method for providing at least an output current to one or more light emitting diodes. The system includes a control component configured to receive at least a demagnetization signal, a sensed signal and a reference signal and to generate a control signal based on at least information associated with the demagnetization signal, the sensed signal and the reference signal, and a logic and driving component configured to receive at least the control signal and output a drive signal to a switch based on at least information associated with the control signal. The switch is connected to a first diode terminal of a diode and a first inductor terminal of an inductor. The diode further includes a second diode terminal, and the inductor further includes a second inductor terminal.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: January 28, 2020
    Assignee: On-Bright Electronics (Shanghai) Co., Ltd.
    Inventors: Lieyi Fang, Jun Zhou
  • Patent number: 10529279
    Abstract: An active matrix organic LED display having a matrix of multiple light emitting pixels and electronic drive circuitry for selectively addressing the pixels, each pixel containing an organic LED. The electronic drive circuitry includes row scan electrodes and column data electrodes that interconnect the matrix of pixels. The circuitry also includes a MEMS switching device and a memory capacitor for each pixel, the MEMS switching device connecting the memory capacitor to a column data electrode during addressing of a pixel and connecting the memory capacitor to the organic LED of each pixel during light emission.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: January 7, 2020
    Inventor: James C. Rutherford
  • Patent number: 10511306
    Abstract: A device includes a power supply line, an output terminal, a circuit configured to perform a logic operation on a first signal and a second signal to produce a third signal, first, second and third transistors. The first transistor is coupled between the power supply line and the output terminal and includes a control gate supplied with the third signal. The second and third transistors are coupled in series between the power supply line and the output terminal. The second transistor includes a control gate supplied with the first signal and the third transistor includes a control gate supplied with a fourth signal that is different from each of the first, second and third signals.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: December 17, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Tetsuya Arai, Shuichi Tsukada, Junki Taniguchi
  • Patent number: 10506678
    Abstract: The present disclosure relates to a modular lighting system that may include a driver module, an array of LEDs that are driven by the driver module, and a control module. The control module is configured to control the driver module, which in turn drives the LEDs of the array of LEDs in a desired fashion. The control module may communicate with one or more remote lighting control systems through wired or wireless communications and function to control the driver module accordingly. Notably, the driver module and the control module communicate with each other through a standard communication protocol, such that either of the driver module or the control module can be replaced without replacing the other of the driver module or control module. Further, power may be provided to the control module and the array of LEDs by the driver module via the standard communication interface or separate power interface.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: December 10, 2019
    Assignee: IDEAL Industries Lighting LLC
    Inventors: Michael J. Harris, Paul Pickard
  • Patent number: 10505547
    Abstract: An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: December 10, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Fujita, Yutaka Shionoiri, Kiyoshi Kato, Hidetomo Kobayashi
  • Patent number: 10498339
    Abstract: Methods and apparatuses pertaining to hold-time compensation using free metal segments or other electrically-conductive segments of an IC are described. An integrated circuit (IC) having free segment hold-time compensation may include a monolithic semiconductor substrate which has a first device and a second device disposed thereon. In addition, the IC may include an electrical node electrically connecting the first and second devices. The electrical node may include one or more electrically-conductive elements that contribute to a total capacitance at the electrical node such that the total capacitance at the electrical node has a value that fulfills a hold-time requirement at the electrical node.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: December 3, 2019
    Assignee: MEDIATEK INC.
    Inventors: Chien-Pang Lu, Yu-Tung Chang, Yu-Ming Yang
  • Patent number: 10492265
    Abstract: A light-emitting diode (LED) lighting system comprising a luminaire and an LED luminaire control gear is used to replace the luminaire operated with alternate-current (AC) mains. The luminaire coupled to the LED luminaire control gear comprises LED arrays and a power supply. The LED luminaire control gear comprises a rechargeable battery, a current-fed inverter, and a relay switch. When a line voltage from the AC mains is unavailable, the LED luminaire control gear is automatically started to provide a high output voltage within an input operating voltage range of the luminaire and a low direct-current (DC) voltage to control the power supply to provide an LED driving voltage greater than a forward voltage across the LED arrays, eliminating operating instability of the power supply. The relay switch is configured to couple either the line voltage or the high output voltage to the power supply to operate thereon.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: November 26, 2019
    Assignee: ALEDDRA INC.
    Inventor: Chungho Hsia
  • Patent number: 10485073
    Abstract: A light-emitting diode (LED) lighting system comprising a luminaire and a power pack is used to replace the luminaire operated only in a normal mode with alternate-current (AC) mains. The luminaire comprises LED arrays and a power supply whereas the power pack comprises a rechargeable battery, a charging circuit, an LED driving circuit, and a self-diagnostic circuit. According to availability of the AC mains, the LED lighting system can auto-select to work in an emergency mode when a line voltage from the AC mains is unavailable. The self-diagnostic circuit comprises multiple timers and multiple detection circuits and is configured to provide a sequence and to auto-test battery charge and discharge current according to the sequence. In another embodiment, the luminaire power pack is integrated into an enhanced LED luminaire to support such dual mode operations.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: November 19, 2019
    Assignee: ALEDDRA INC.
    Inventor: Chungho Hsia
  • Patent number: 10482826
    Abstract: The present disclosure relates to a GOA driving circuit including N number of cascaded GOA units, wherein N is a natural number not smaller than four. The GOA unit at the i-th level includes a first controllable transistor (T1), a second controllable transistor (T2), a third controllable transistor (T3), a first capacitor (C1), and a first pull-down maintain unit, wherein 1?i?a and “a” is a natural number smaller than or equal to N/2. The GOA unit at the j-th level includes a fourth controllable transistor (T4), a fifth controllable transistor (T5), a second capacitor (C2), and a second pull-down maintain unit 20, wherein a+1?j?N. The GOA driving circuit may reduce the line buffer so as to reduce the cost of the GOA driving circuit.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: November 19, 2019
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventor: Longqiang Shi
  • Patent number: 10482209
    Abstract: A field-programmable operation array includes an interconnect network and a plurality of operation blocks, including a first operation block and a second operation block, electrically connected to the interconnect network. Each operation block includes an arithmetic logic unit and a plurality of logic gates. A pass signal output by the arithmetic logic unit of the first operation is received by the arithmetic logic unit of the second operation block.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: November 19, 2019
    Assignee: HLS Logix LLC
    Inventors: Jason Daniel Gorski, Darrin Michael Hanna
  • Patent number: 10484655
    Abstract: Disclosed is a gate driving circuit and a display device, which solve the technical problem that the prior art is easy to cause abnormal output of gate driving signals. The gate driving circuit includes a precharge unit circuit, an output unit circuit, and a holding unit circuit. The output unit circuit includes a first reference point and a clock signal line. The holding unit circuit includes a second reference point and a holding signal line, and a holding capacitor is connected between the second reference point and the holding signal line.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: November 19, 2019
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Yafeng Li
  • Patent number: 10485065
    Abstract: A light-emitting diode (LED) lighting system comprising a luminaire and an add-on control gear is used to replace the luminaire operated with AC mains. The luminaire comprises LED arrays and a power supply with a luminaire DC voltage. When a line voltage from the AC mains is unavailable, the add-on control gear is automatically started to provide a control DC voltage greater than a forward voltage across the LED arrays. The add-on control gear comprises a rechargeable battery, a DC-to-DC converter configured to provide the control DC voltage when enabled, and a power detection and control circuit. The power detection and control circuit comprises a transistor circuit and a relay switch, in which the former is configured to enable the DC-to-DC converter, and the latter is configured to couple either the control DC voltage or the luminaire DC voltage to the LED arrays to operate thereon.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: November 19, 2019
    Assignee: ALEDDRA INC.
    Inventor: Chungho Hsia
  • Patent number: 10469086
    Abstract: Level-shifter circuits and methods of using the same are provided. A level-shifter circuit includes a latch unit and a level-shifting unit. The latch unit is configured to generate a latch signal for storing a logic state of a first digital signal in a first power supply domain. The level-shifting unit is configured to shift a voltage of the latch signal to output a second digital signal in a second power supply domain. The latch unit and the level-shifting unit are powered by a power supply voltage in the second power supply domain.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: November 5, 2019
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Chia Chi Yang, Jun Tao Guo, Chen Yi Huang
  • Patent number: 10468571
    Abstract: A light distribution method is for an adaptive driving beam headlamp system including a light emitting device, an on-board camera and an electronic control unit. The light distribution method includes: obtaining data indicative of a state in front of a vehicle by the on-board camera; computing one or more of: attributes of an object in front of the vehicle; attributes of a vehicle ahead; a speed of the vehicle ahead; a distance between vehicles; brightness of the object; and a road shape; determining a light distribution pattern; determining a control amount indicative of at least one of an ON or OFF state of each of the light emitting elements and an applied power to each of the light emitting elements according to the light distribution pattern determined; and controlling driving of the adaptive driving beam headlamp system based on the control amount determined.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: November 5, 2019
    Assignee: NICHIA CORPORATION
    Inventor: Takuya Nakabayashi
  • Patent number: 10470275
    Abstract: Disclosed in some examples are devices, methods, and machine-readable mediums for reliable control of IR LEDs. In some examples, a microcontroller running firmware controls whether the LED is activated or not by use of a disable signal. The microcontroller enables or disables the operation of the LED based upon a user's proximity to the LED, a watchdog timer, and a confirmation that only trusted software is executing.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: November 5, 2019
    Assignee: Intel Corporation
    Inventors: Nitin V. Sarangdhar, Victoria C. Moore, Kumar Narasimhan Dwarakanath