Patents Examined by H Cho
  • Patent number: 10461445
    Abstract: The various embodiments described herein include methods, devices, and systems for fabricating and operating superconducting circuits. In one aspect, an electric circuit includes: (1) a first superconducting component having a first terminal, a second terminal, and a constriction region between the first terminal and the second terminal; (2) a second superconducting component having a third terminal and a fourth terminal; and (3) a first electrically-insulating component that thermally couples the first superconducting component and the second superconducting component such that heat produced at the constriction region is transferred through the first component to the second superconducting component.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: October 29, 2019
    Assignee: PSIQUANTUM CORP.
    Inventors: Faraz Najafi, Qiaodan Jin Stone
  • Patent number: 10447279
    Abstract: An inverting reciprocal quantum logic (RQL) phase-mode D flip-flop accepts a data input and a logical clock input. The flip-flop includes a stacked Josephson junction and a comparator. The triggering or untriggering of the stacked Josephson junction by positive or negative single flux quantum (SFQ) pulses can switch a direction of DC bias current through a component of the comparator, such as an output Josephson junction, which can then either pass or suppress logical clock SFQ pulses. When so passed, the data input is captured to the output upon clocking the flip-flop via the provision of the logical clock SFQ pulses, e.g., as reciprocal pulse pairs.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: October 15, 2019
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventor: Alexander Louis Braun
  • Patent number: 10438026
    Abstract: In accordance with various embodiments of the present invention, mechanical systems incorporating movable microelectromechanical (MEMS)-based features, e.g., cantilevers or suspended micron- and submicron-scale beams are utilized to secure solid-state devices such as controllers, microcontrollers, central processing units (CPUs), solid-state storage drives, and memory cards. In various embodiments of the invention, the beams are double-clamped, initially curved (or “pre-buckled”) segments that are provided within the solid-state device (e.g., on the top layer thereof) prior to encapsulation and packaging of the device.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: October 8, 2019
    Assignees: NANOLOCK SECURITY (ISRAEL) LTD., RAMOT AT TEL AVIV UNIVERISITY LTD.
    Inventors: Eran Fine, Viacheslav Krylov, Lior Medina
  • Patent number: 10418999
    Abstract: According to an embodiment, a programmable logic circuit is described comprising a first data bit input to receive a first data bit a and a second data bit input to receive a second data bit b, a first program bit input to receive a first program bit p1, a second program bit input to receive a second program bit p2, a third program bit input to receive a third program bit p3 and a fourth program bit to receive a fourth program bit p4 and an output configured to output ( ( ( a ? b ) ? ( p 1 ? a ) ? ( p 2 ? b ) ) _ ? ( p 3 ? b ? a ) ) ? ( a ? b ? p 4 ) _ .
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: September 17, 2019
    Assignee: Infineon Technologies AG
    Inventor: Thomas Kuenemund
  • Patent number: 10411713
    Abstract: Superconducting circuits based devices and methods, including reciprocal quantum logic (RQL) based devices and methods are provided. In one example, a device comprising an output terminal, a first input terminal for receiving a first set of pulses, and a second input terminal for receiving a second set of pulses is provided. The first section may be configured to pass a single pulse received during a single clock cycle at any of the first input terminal or the second input terminal, but to not pass two or more positive pulses received during a single clock cycle at the first input terminal and the second input terminal. The second section, coupled to the first section, may be configured to, in response to the single pulse, generate a negative pulse after a predetermined fraction of a single clock cycle after providing a positive pulse at the output terminal.
    Type: Grant
    Filed: February 4, 2017
    Date of Patent: September 10, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: David C. Harms, Quentin P. Herr, Anna Y. Herr
  • Patent number: 10396760
    Abstract: A differential pair contact resistance asymmetry compensation system includes a board with a differential trace pair. A receiver device is coupled to the differential trace pair via a receiver device connector interface, and a transmitter device is coupled to the differential trace pair via a transmitter device connector interface. The transmitter device transmits a contact resistance compensation data stream to the receiver device via the differential trace pair. The transmitter device then adjusts an impedance provided by the transmitter device to compensate for a contact resistance asymmetry in the transmitter device connector interface. When the transmitter device determines that differential trace pair signal transmission capabilities for the differential trace pair in transmitting the contact resistance compensation data stream have improved in response to the adjustment of the impedance provided by the transmitter device, it sets the impedance provided by the transmitter device.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: August 27, 2019
    Assignee: Dell Poducts L.P.
    Inventors: Umesh Chandra, Bhyrav M. Mutnury, Hamza S. Rahman
  • Patent number: 10396798
    Abstract: A reconfigurable circuit includes first and second wires and two or more paths active at different times. Each path includes: a first NVRS whose first terminal is connected to the first wire; a first transistor whose drain terminal is connected to a second terminal of the first NVRS; a second NVRS whose first terminal is connected to the second terminal of the first NVRS; a second transistor whose source terminal is connected to a second terminal of the second NVRS and whose drain terminal is connected to the second wire; and a 2-input AND circuit whose output is connected to a gate terminal of the first transistor. A time control signal is supplied to a first input of the 2-input AND circuit and a gate terminal of the second transistor. A write control signal is supplied to a second input of the 2-input AND circuit.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: August 27, 2019
    Assignee: NEC CORPORATION
    Inventors: Xu Bai, Toshitsugu Sakamoto, Munehiro Tada, Yukihide Tsuji, Ayuka Tada, Makoto Miyamura, Ryusuke Nebashi
  • Patent number: 10390395
    Abstract: An LED luminaire comprises a rechargeable battery, LED array(s), at least two drivers, a battery charging circuit, and a detection and control circuit. The LED luminaire may be used to replace a fluorescent or a conventional LED lamp connected to AC mains. The at least two drivers comprise a power switching driver and a constant current driver. The power switching driver is configured to power the LED array(s) and the battery charging circuit whereas the constant current driver is configured to convert a battery terminal voltage from the rechargeable battery to a DC voltage to light up the LED array(s) when a line voltage from the AC mains is unavailable. The detection and control circuit is configured to disable the constant current driver when the line voltage from the AC mains is available or to enable the constant current driver when the line voltage from the AC mains is unavailable.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: August 20, 2019
    Assignee: ALEDDRA INC.
    Inventor: Chungho Hsia
  • Patent number: 10390394
    Abstract: An LED luminaire comprises a power converter, a power switching driver, LED array(s) powered by the power switching driver, and a voltage detection circuit. The voltage detection circuit comprises a first voltage detection circuit, a second voltage detection circuit, a voltage regulator circuit, an optocoupler circuit, and a pair of low-voltage input ports receiving an external voltage. The voltage detection circuit is configured to extract a flyback signal from an output voltage and the external voltage and to couple the flyback signal to the power switching driver. The external voltage comprises a voltage sent from a Zigbee luminaire controller, which comprises a Zigbee module and a meter and control unit. The Zigbee luminaire controller is configured to receive commands from the Zigbee module, to control the LED luminaire, and to measure in response to the commands.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: August 20, 2019
    Assignee: ALEDDRA INC.
    Inventor: Chungho Hsia
  • Patent number: 10390396
    Abstract: A linear light-emitting diode (LED) lamp (LL lamp) comprising a front-end module, an LED driving circuit operable with a ballast and alternate current (AC) mains, an anti-electric-shock module, and a switch control module operates with the AC mains in a single end and double ends and with the ballast in the double ends without any risk of electric shock. Besides, the LL lamp passes an industry required electric shock test when an input AC voltage from a testing ballast is applied in the double ends. Whereas both the front-end module and the switch control module are coupled to a first ground reference, the LED driving circuit is coupled to a second ground reference. When the input AC voltage from the ballast is applied, the switch control module is enabled to couple the second ground reference to the first ground reference, allowing a current returned to operate the LL lamp.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: August 20, 2019
    Assignee: ALEDDRA INC.
    Inventor: Chungho Hsia
  • Patent number: 10382038
    Abstract: An electronic device includes a logic circuit, a pullup acceleration circuit, a first signal propagation path, and a second signal propagation path. The first signal propagation path propagates a logic value transition from an input terminal of the logic circuit to an output terminal of the logic circuit through the input terminal, two inverters of the logic circuit, a switch of the logic circuit, and the output terminal within a first amount of time based on a transition at the first input terminal. The second signal propagation path propagates the logic value transition from the input terminal to the output terminal through one inverter of the logic circuit and the pullup acceleration circuit within a second amount of time. The second amount of time is shorter than the first amount of time in response to the logic circuit being non-monotonic with respect to the logic value.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: August 13, 2019
    Assignee: NXP USA, Inc.
    Inventors: Vasily Vladimirovich Korolev, Victor Mikhailovich Mikhailov, Mikhail Yurievich Semenov
  • Patent number: 10378748
    Abstract: A luminaire comprises at least one light emitting diode (LED) as a light source. Such LED comprises a limited light emitting angle for the emitted light radiation. Outside of the light emitting angle, an infrared sensor is assigned to the light source for detecting its temperature.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: August 13, 2019
    Assignee: EATON INTELLIGENT POWER LIMITED
    Inventor: Toni Ott
  • Patent number: 10383201
    Abstract: Techniques are described for providing a smart-mesh socket. The smart-mesh socket may be sized and shaped to be engaged with a conventional electrical socket of one or more types (e.g., a USB receptacle providing DC electrical power) to provide power to one or more circuits housed within the smart-mesh socket. These circuits may include, for example, a main circuit that includes at least a dual processor for controlling the operation and communications of at least two communication circuits. The dual processors may execute instructions for an operating system, thus allowing the smart-mesh socket to provide enhanced capabilities for networked devices. One or more first communication circuits may each include one or more transceivers that allow the first communication circuit to send and receive communications with other devices over wireless network(s) using one or multiple wireless communication protocols.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: August 13, 2019
    Assignee: Sirqul, Inc.
    Inventors: Robert Frederick, John Schleppy, Russell Brian Dodds, Thang Le, Justin Jaewook Yu, Luis Cifuentes, Chris Gay
  • Patent number: 10383193
    Abstract: A lighting circuit utilizes a buck converter that supplies a drive current to a light source and is feedback-controlled so that the drive current comes close to a target current. An open-circuit detection circuit compares a potential difference between and input voltage and an output voltage of the buck converter with a threshold voltage.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: August 13, 2019
    Assignee: KOITO MANUFACTURING CO., LTD.
    Inventor: Tomoyuki Ichikawa
  • Patent number: 10382040
    Abstract: A high voltage level shifting circuit and related semiconductor devices are presented. The circuit comprises: a level conversion circuit that converts an input signal with a first high voltage to an output signal with a second high voltage; a first switch having a first node connected to a first power source and a second node connected to a control node of a first transistor; a second switch having a first node connected to the control node of the first transistor and a second node connected to a first connection node; and a switch control circuit connected to the first switch and the second switch and controls them not to be close at the same time. By adding these two switches to the level conversion circuit, this inventive concept substantially lowers the static current generated during a high voltage level conversion process.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: August 13, 2019
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: Yi Jin Kwon, Hao Ni, Chang Wei Yin, Hong Yu
  • Patent number: 10375787
    Abstract: System and method for providing at least an output current to one or more light emitting diodes. The system includes a control component configured to receive at least a demagnetization signal, a sensed signal and a reference signal and to generate a control signal based on at least information associated with the demagnetization signal, the sensed signal and the reference signal, and a logic and driving component configured to receive at least the control signal and output a drive signal to a switch based on at least information associated with the control signal. The switch is connected to a first diode terminal of a diode and a first inductor terminal of an inductor. The diode further includes a second diode terminal, and the inductor further includes a second inductor terminal.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: August 6, 2019
    Assignee: On-Bright Electronics (Shanghai) Co., Ltd.
    Inventors: Lieyi Fang, Jun Zhou
  • Patent number: 10367507
    Abstract: A plurality of dynamic decode circuits for decoding a plurality of input signals comprises a decoder that decodes the plurality of input signals to produce a result at a first node, the result is propagated to a second node while an evaluation clock is active by a pair of serially connected transistors consisting of a transistor receiving an evaluation clock at its gate and a transistor receiving the first node at its gate, the plurality of dynamic decode circuits sharing a conditioned node.
    Type: Grant
    Filed: July 7, 2018
    Date of Patent: July 30, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Paul Alan Bunce, Yuen Hung Chan, John D. Davis, Antonio Raffaele Pelella
  • Patent number: 10355690
    Abstract: An apparatus is provided which comprises: a data sampler coupled to an output of a driver, wherein the data sampler is to sample data and to compare it with a first threshold voltage and a second threshold voltage, and wherein the data sampler is to generate an up or down indicator according to comparing the data with the first and second threshold voltages; and logic coupled to the data sampler, wherein the logic is to receive the up or down indicator and to increment or decrement a number of already DC compensated impedance legs of the driver according to the up or down indicator.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: July 16, 2019
    Assignee: Intel Corporation
    Inventors: Siti Suhaila Mohd Yusof, Amit Kumar Srivastava, Lay Hock Khoo, Chin Boon Tear
  • Patent number: 10342088
    Abstract: System and method for providing at least an output current to one or more light emitting diodes. The system includes a control component configured to receive at least a demagnetization signal, a sensed signal and a reference signal and to generate a control signal based on at least information associated with the demagnetization signal, the sensed signal and the reference signal, and a logic and driving component configured to receive at least the control signal and output a drive signal to a switch based on at least information associated with the control signal. The switch is connected to a first diode terminal of a diode and a first inductor terminal of an inductor. The diode further includes a second diode terminal, and the inductor further includes a second inductor terminal.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: July 2, 2019
    Assignee: On-Bright Electronics (Shanghai) Co., Ltd.
    Inventors: Lieyi Fang, Jun Zhou
  • Patent number: 10333522
    Abstract: A single configuration terminal of a device is used to configure multiple operating parameters of the device based on a resistor and a capacitor selectively connected to the configuration terminal. The device includes a detection circuit configured to monitor a voltage signal at the configuration terminal to determine multiple values in response to a regulated current source providing a current to the configuration terminal selectively connected to the resistor and the capacitor in parallel, and configure multiple operating parameters based on the determined values. A method for configuring operating parameters using a single configuration terminal of a device includes providing a current to the configuration terminal selectively connected to a resistor and a capacitor in parallel, monitoring a voltage signal at the configuration terminal, determining multiple values based on the monitoring, and configuring multiple operating parameter based on the determined values.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: June 25, 2019
    Assignee: DIALOG SEMICONDUCTOR INC.
    Inventors: Guang Feng, Xiaoyan Wang, Nan Shi