Abstract: The present invention provides a CEC communications device which eliminates a troublesome process to solve the CEC-related communication malfunction when the CEC communications device detects a CEC-related communication malfunction caused by a software malfunction and improves serviceability of the CEC communications by automatically resetting the CEC to execute a CEC communication recovery. In the CEC communications device, when a CEC communications line monitoring unit detects a CEC-related communication malfunction caused by a software malfunction, a CEC control unit determines a reset order of a CEC appliance found on a CEC network, and notifies the CEC resetting unit of a CEC resetting request. The CEC resetting unit resets the CEC of a CEC appliance found on the CEC network via an HDMI line (DDC in FIG. 1) other than the CEC to recover the CEC communications.

Abstract: In PCI-Express and alike communications systems, data bandwidth per channel can vary as a result of negotiated port bifurcation during network bring-up. Disclosed are systems and methods for adjusting FIFO depths in response to negotiated bandwidth per channel so that data absorbing FIFO's of respective channels are not arbitrarily too deep or too shallow relative to the data bandwidths of the channels the FIFO's serve.

Abstract: Technologies for efficient synchronous replication across heterogeneous storage nodes can provide the performance of high-speed storage units while leveraging low-cost and high-capacity backup storage units within the same system. The performance of low-cost, high-capacity hard disks may be improved by initially storing data into sequential physical locations. A sequential journal of I/Os may be used in a replicated secondary node to allow for rapid completion of I/Os. A separate background process can later scatter the sequentially logged I/O data into its proper location for storage. A programmable n-way router can be configured to route I/Os as needed to improve overall performance of the storage unit. A secondary node log device can also be used to provide continuous data protection (CDP). Lastly, packetizing together I/Os prior to delivery to a secondary node may reduce interrupts and context switches in the primary node, thereby improving performance of the storage system.

Abstract: A method and an apparatus for accessing data of a message memory of a communication module by inputting or outputting data into or from the message memory, the message memory being connected to a buffer memory assemblage and the data being transferred to the message memory or from the message memory, the buffer memory assemblage having an input buffer memory in the first transfer direction and an output buffer memory in the second transfer direction; and the input buffer memory and the output buffer memory each being divided into a partial buffer memory and a shadow memory, the following steps being performed in each transfer direction: inputting data into the respective partial buffer memory, and transposing access to the partial buffer memory and shadow memory, so that subsequent data can be inputted into the shadow memory while the previously inputted data are already being outputted from the partial buffer memory in the stipulated transfer direction.

Abstract: A universal peripheral connector apparatus for a mobile device and in communication with the mobile device. The universal peripheral connector apparatus including: at least one universal serial bus (USB) connector providing at least one connection; at least one USB host controller configured to control the at least one USB connection; a microprocessor configured to control the at least one USB host controller, the microprocessor having an operating system; a USB device control interface on the mobile device configured to communicate and control the universal connector apparatus; and a USB driver configured to operate within the operating system of the universal peripheral connector to enable the mobile device to connect to one or more peripherals via the at least one USB connector.

Abstract: A system comprising a media processing apparatus and a computer where the media processing apparatus emulates a mass storage device and interfaces with the computer is disclosed. In one embodiment the media processing apparatus appears to the computer as a Universal serial bus (USB) mass storage device, and the operating system (OS) on the computer, using its pre-installed USB mass storage device driver, establishes bi-directional communication channel with the media processing apparatus. Thus, the need to develop an OS specific kernel-mode device driver for the media processing apparatus is eliminated. The system may employ a proprietary communication protocol on the USB bus to send and receive data between the computer and the media processing apparatus.

Abstract: A packet switching integrated circuit chip is configured to receive packets, e.g., RapidIO™-compliant packets, from a plurality of external sources, and selectively passes data in the received packets to a plurality of external recipients. The chip is configured to pass first received packets without modification and to terminate second received packets and preprocess payloads thereof to produce new packets. The chip may be configured to perform signal sample processing operations on the second received packets, such as bit extension, bit truncation, bit reordering and/or bit arithmetic operations. The chip may be further configured to manage the first and second received packets based on destination addresses in the received packets.

Abstract: An apparatus and method for de-bouncing keypad inputs is disclosed including interrupting a processor upon detecting a key press, reading input signals from the key pad to determine an initial port value and starting a timer. A keypad interrupt is disabled and processing resumes until expiration of the timer. The timer interrupts the processor and the input signals are read a second time and combined with the initial port value to determine a key identifier. The timer is started again and processing resumes. Upon expiration of the timer the processor checks for key release. If release is not detected, the timer is again started. If release occurs, the timer is disabled and the keypad interrupt is enabled.

Abstract: Methods, systems, and products are disclosed for chaining DMA data transfer operations for compute nodes in a parallel computer that include: receiving, by an origin DMA engine on an origin node in an origin injection FIFO buffer for the origin DMA engine, a RGET data descriptor specifying a DMA transfer operation data descriptor on the origin node and a second RGET data descriptor on the origin node, the second RGET data descriptor specifying a target RGET data descriptor on the target node, the target RGET data descriptor specifying an additional DMA transfer operation data descriptor on the origin node; creating, by the origin DMA engine, an RGET packet in dependence upon the RGET data descriptor, the RGET packet containing the DMA transfer operation data descriptor and the second RGET data descriptor; and transferring, by the origin DMA engine to a target DMA engine on the target node, the RGET packet.

Abstract: A data processing apparatus and method are provided for managing polling loops. The data processing apparatus comprises a main processing unit and a subsidiary processing unit operable to perform a task on behalf of the main processing unit. The subsidiary processing unit is operable to set a completion field when the task has been completed and the main processing unit is operable to poll the completion field in order to determine whether the task has been completed. If on polling the completion field a threshold number of times the main processing unit determines that the task has not been completed, the main processing unit is operable to enter a power saving mode. The subsidiary processing unit is operable, when the task has been completed, to cause a notification to be issued on a path interconnecting the main processing unit and the subsidiary processing unit. The main processing unit is arranged, upon receipt of the notification to exit the power saving mode.

Abstract: An electronic device includes a first communication interface operable to receive a decoded digital data set from an apparatus remote from the electronic device, and a first circuit coupled to the first communication interface and operable to enable an output device to provide an output representing the data set.

Abstract: A parallel computer system is constructed as a network of interconnected compute nodes to operate a global message-passing application for performing communications across the network. Each of the compute nodes includes one or more individual processors with memories which run local instances of the global message-passing application operating at each compute node to carry out local processing operations independent of processing operations carried out at other compute nodes. Each compute node also includes a DMA engine constructed to interact with the application via Injection FIFO Metadata describing multiple Injection FIFOs where each Injection FIFO may containing an arbitrary number of message descriptors in order to process messages with a fixed processing overhead irrespective of the number of message descriptors included in the Injection FIFO.

Abstract: Methods and apparatus provide for interconnecting one or more multiprocessors and one or more external devices through one or more configurable interface circuits, which are adapted for operation in: (i) a first mode to provide a coherent symmetric interface; or (ii) a second mode to provide a non-coherent interface.

Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to encode a priority of a plurality of input signals. The second circuit may be configured to generate the plurality of input signals in response to one or more signals received from each of a plurality of ports. The apparatus generally provides dynamic priority arbitration for the plurality of ports.

Abstract: A device includes a task context controller, at least one transport engine connected to the task context controller, and at least one comparator connected to the transport engine. The comparator to compare a data offset from a receive frame with a current data offset and a result is used to determine frame processing order.

Abstract: An apparatus and a computer-implemented method for processing data in a bus system component. The bus system component is configured to operate in one of an endpoint mode and a root complex mode. Responsive to configuring the bus system component to operate in endpoint mode, the data is processed through the bus system component according to an endpoint process. Responsive to configuring the bus system component to operate in root complex mode, the data is transferred through the bus system component according to a root complex mode. In an illustrative example, the bus system component is a peripheral control interconnect express component.

Abstract: A plurality of modes is provided for communicating between a host system and a peripheral storage system controller. A first communication mode may be selected from the plurality of communication modes based on a bit length required to communicate a physical address. During runtime, a switch from the first communication mode to a second communication mode may be performed in order to improve the efficiency of processing address requests at the storage system controller.

Abstract: One embodiment of the present invention provides a system for directing airflow through a computing device. This system comprises an airflow baffle, which includes a set of signal pins and a circuit. The airflow baffle is configured to direct airflow through the computing device, and the set of signal pins are configured to interface the airflow baffle with the computing device. Moreover, the circuit in the airflow baffle is coupled to the set of signal pins, and is configured to use the signal pins to notify the computing device that the airflow baffle is installed in the computing device.

Abstract: A measurement or protective device has a terminal for establishing a connection to a data bus. A control device determine the mode of operation of the measurement or protective device, and the mode of operation can be changed from the outside using the terminal. The novel device enables evaluation operations, in particular testing operations, from the outside in an even simpler manner than before. The control device is configured in such a manner that it can operate at least two software modules in parallel and independently of one another. One of the software modules is an operating module which determines the measurement or protective mode of operation of the device, and at least one additional software module has another function. The control device has at least one software interface to which the additional software module can be coupled, in terms of software, from the outside using the terminal.

Abstract: Embodiments of the present invention provide systems and methods for handling commands requesting movement of a data storage medium (magnetic tape, optical disk, or other medium) from a source media library to a destination media library using a pass through port. Prior to issuing commands requesting movement of the data storage medium from a source location to the pass through port and from the pass through port to a destination location, embodiments of the present invention can check the status of various locations (e.g., the destination location or pass through port) to determine if the movement requested in the original command can be completed successfully. Another embodiment of the present invention can maintain reservation flags for pass through ports so that the status of particular pass through ports can be determined and an available pass through port selected.