Abstract: A communication device may receive successive key inputs, determine an average time duration between successive key inputs, start a timeout, determine if a timeout was successful and adjust the timeout period based on the determined success of the timeout.

Abstract: An electronic device includes a universal serial bus (USB) interface therein. This USB interface is configured to support at least first and second different USB interface standards. These different interface standards are selected by the electronic device in response to comparing a voltage level of a signal provided to said USB interface relative to a reference voltage generated within the electronic device. The signal provided to the USB may be a power supply signal, the first USB standard may be a USB 2.0 interface standard and the second USB standard may be an inter-chip USB interface standard.

Abstract: Disclosed herein is a semiconductor storage device operable in a plurality of operation modes each having a separate maximum current consumption. The device includes: a data communication section configured to be capable of performing data communication in a plurality of communication modes; an attribute information storage section configured to store attribute information indicating the operation and communication modes; and a mode setting section configured to set the device to one of the operation modes and one of the communication modes. The data communication section transmits, to an electronic apparatus to which the device is attached, the information and receives from the apparatus a mode setting command for directing that the device be set to a combination of an operation mode and a communication mode selected from among the information. In accordance therewith, the mode setting section sets the device to the selected combination of modes.

Abstract: A software-defined radio (SDR) system comprising: 1) a reconfigurable baseband subsystem for supporting a plurality of wireless communication standards comprising a first plurality of reconfigurable context-based operation instruction set processors; and 2) a reconfigurable application subsystem for supporting a plurality of end-user applications comprising a second plurality of reconfigurable context-based operation instruction set processors. Each of the first and second pluralities of reconfigurable context-based operation instruction set processors comprises: i) a reconfigurable data path comprising a plurality of reconfigurable functional blocks; and ii) a programmable finite state machine that controls the reconfigurable data path, wherein the programmable finite state machine is capable of executing a plurality of instructions associated with a particular function.

Abstract: Method of managing interaction between a host subsystem and a peripheral device. Roughly described, the peripheral device writes an event into an individual event queue, and in conjunction therewith, also writes a wakeup event into an intermediary event queue. The wakeup event identifies the individual event queue. The host subsystem, in response to retrieval of the wakeup event from the intermediary event queue, activates an individual event handler to consume events from the individual event queue.

Abstract: An apparatus, system, and method are disclosed for acceleration initiated association. A peripheral knock module receives a first knock command from a first accelerometer of a peripheral device. The first knock command comprises a plurality of peripheral time stamps for a plurality of peripheral device accelerations. A peripheral identifier module creates a peripheral identifier comprising time interval values of time intervals between the peripheral time stamps. A broadcast module broadcasts a discovery signal with a signal identifier that comprises the peripheral identifier.

Abstract: A data reading method includes the steps of: a reading request issuing step of issuing a reading request for reading predetermined stored data; and a reading request re-issuing step of re-issuing a reading request when read data responsive to the reading request has not arrived within a predetermined time period, wherein: in the reading request re-issuing step, a flag is attached to the re-reading request, and thus, the re-reading request is differed from the first issued reading request.

Abstract: A method and apparatus for caching instructions for a processor having multiple operating states. At least two of the operating states of the processor supporting different instruction sets. A block of instructions may be retrieved from memory while the processor is operating in one of the states. The instructions may be pre-decoded in accordance with said one of the states and loaded into cache. The processor, or another entity, may be used to determine whether the current state of the processor is the same as said one of the states used to pre-decode the instructions when one of the pre-decoded instructions in the cache is needed by the processor.

Abstract: An electronic apparatus which makes it possible to reduce start-up time for starting the electronic apparatus, without necessitating installment of a plurality of CPUs in the electronic apparatus. A main CPU 45 controls a digital camera implementing the electronic apparatus. A storage medium for storing information can be detachably attached to a connector 97. A medium detection circuit 85 monitors a status of attachment and detachment of the storage medium to and from the digital camera, irrespective of a status of operation of the main CPU 45. The sensed status of attachment and detachment of the storage medium is stored in a register 115 of the medium detection circuit 85.

Abstract: A telecommunications system and constituent two-wire interface module. The two wire interface module includes a logic component configured to communicate over the same pair of wires using different two-wire interface protocols depending on an input signal presented on a configuration input. This configurability allows the two-wire interface module to use the same two wires to communicate with a variety of other two-wire interface modules, even if those two-wire interface modules communicate using different two-wire interface protocols.

Abstract: A method for scheduling instructions for clustered digital signal processors comprising a plurality of clusters, each cluster including at least two functional units and a first register file having a first unit, a second unit and a single set of access ports shared by the functional units comprises steps of checking whether executing one instruction needs data to be read from the first unit and the second unit of the first register file, generating a copying instruction to transfer data from the first unit to the second unit of the first register file, checking whether there is a prior operation cycle available to perform the copying instruction, scheduling the copying instruction in the prior operation cycle, and scheduling the instruction after the copying instruction.

Abstract: According to one embodiment, an electronic apparatus is detachably connected to a host apparatus. The electronic apparatus includes a file management information generation module. The file management information generation module generates file management information based on which a host apparatus recognizes each of content data items as a file stored in a storage medium, the file management information being indicative of a plurality of starting storage locations on the storage medium corresponding to starting data blocks of the content data items, and a plurality of shared storage locations on the storage medium, which are shared by the content data items and correspond to second and following data blocks of each of the content data items.

Abstract: A communications buffer and control unit that configure a USB connection endpoint are provided connected by a USB bus to a host device. The control unit changes the receive buffer size of a receive buffer where the communications buffer stores receive data, based on an instruction that is sent from the host device side through USB virtual serial communication, to enable the reception of real-time execution commands by the communications device. This enables the reception of real-time execution commands when the receive buffer on the communications device side is in a buffer-full state in data communications between a host device and a communications device.

Abstract: Disclosed are methods for handling RDMA connections carried over packet stream connections. In one aspect, I/O completion events are distributed among a number of processors in a multi-processor computing device, eliminating processing bottlenecks. For each processor that will accept I/O completion events, at least one completion queue is created. When an I/O completion event is received on one of the completion queues, the processor associated with that queue processes the event. In a second aspect, semantics of the interactions among a packet stream handler, an RDMA layer, and an RNIC are defined to control RDMA closures and thus to avoid implementation errors. In a third aspect, semantics are defined for transferring an existing packet stream connection into RDMA mode while avoiding possible race conditions. The resulting RNIC architecture is simpler than is traditional because the RNIC never needs to process both streaming messages and RDMA-mode traffic at the same time.

Abstract: A multi-server computing system includes a plurality of server modules mounted in an enclosure; each server has a universal serial bus (USB) interface. An enclosure onboard administration (OA) module is also mounted in the enclosure and has an addressable communication interface for connection to a remote management system and a USB interface connected to each of the plurality of servers. The USB interface of the enclosure OA operates as a master and the USB interface of each of the plurality of servers acts as a slave to the enclosure OA, such that each of the server modules can be managed by the remote management system using a single communication address.

Abstract: Protecting computer systems from attacks that attempt to change USB topology and for ensuring that the system's information regarding USB topology is accurate is disclosed. A software model is defined that, together with secure USB hardware, provides an ability to define policies using which USB traffic can be properly monitored and controlled. The implemented policy provides control over USB commands through a combination of software evaluation and hardware programming. Legitimate commands are evaluated and “allowed” to be sent to a USB device by a host controller. Illegitimate commands are evaluated and blocked. Additionally, the USB topology is audited to verify that the system's topology map matches the actual USB topology.

Abstract: A storage device with automatic-switching function is disclosed. When the storage device is coupled to a USB interface, the power provided by the USB interface turns the USB/SATA converter on to convert data from the USB interface into SATA format and transmit to a hard disk. When the storage device is coupled to a SATA interface instead of the USB interface, the power provided by the USB interface does not turn the USB/SATA converter on to convert data. In this way, the data from the SATA interface directly transmit to the hard disk.

Abstract: Point-to-point links between devices are brought up at a slowest available speed, and a faster link speed is negotiated after reaching an operational state.

Abstract: A system architecture for delegating a storage-centric manageability (SCM) task that includes a host system that includes a host computing element and a data storage area, wherein the host computing element operates to access the data storage area via a first communication or data path, a delegated computing element that operates to access the data storage area via second data path for executing a delegated SCM task, wherein the second data path is different from the first data path.

Abstract: Mechanisms for adjusting direction of data flow between input/output (I/O) bridges and I/O hubs based on real time traffic levels are provided. The mechanisms of the illustrative embodiments provide firmware and/or hardware for monitoring data flow through an I/O bridge loop and corresponding I/O hub in order to determine if a condition exists requiring reassignment of the direction each I/O bridge sends its data. In particular, the firmware/hardware determines whether a current traffic condition through the I/O bridges and I/O hub meets criteria indicative of one pathway through the I/O bridge loop being over-utilized while another pathway through the I/O bridge loop is under-utilized. If it is determined that such a condition exists, the configuration of the I/O bridges may be automatically modified to reassign which pathway is utilized by the I/O bridge in sending/receiving I/O data traffic through the I/O bridge loop.