Abstract: A storage system and method are disclosed for generating a reverse map during a background operation and storing it in a host memory buffer. In one embodiment, a storage system is provided comprising a memory and a controller. The controller is configured to generate a physical-to-logical address map for at least part of the memory as a background operation and send the physical-to-logical address map to a host for storage in volatile memory in the host.

Abstract: The disclosure relates generally to improvements in caching operations in storage controllers, including caching operations utilizing direct memory access (DMA) systems, and related devices. Rather than the firmware running on the processor of the storage controller having to traverse a dirty cache sector bitmap and manipulate an original scatter-gather (SG) list in order to generate the two separate SG lists, namely one for the cache and one for the storage device, these operations are offloaded onto new specialized hardware referred to herein as a smart DMA engine in order to free up the processor of the storage controller.

Abstract: Systems and techniques for providing a low latency gateway for an asynchronous orchestration engine using direct memory are presented. A system can directly allocate an array memory space within a first data structure for transaction data associated with transaction requests for an online transaction system. The system can sequentially store respective data threads of the transaction data into respective memory blocks of the array memory space within the first data structure. The system can also sequentially separate the memory blocks of the array memory space within the first data structure into data channels for storage in a second data structure. Furthermore, the system can respectively format data channels and convert the data channels into communication pathways for the online transaction system based on at least one serialization technique for transmission to one or more memories of a virtual machine of the online transaction system.

Abstract: A data storage system having non-volatile media, a buffer memory, a processing device, and a data pre-fetcher. The data pre-fetcher receives commands to be executed in the data storage system, provides the commands as input to a predictive model, obtains at least one command identified for pre-fetching, as output from the predictive model having the commands as input. Prior to the command being executed in the data storage device, the data pre-fetcher retrieves, from the non-volatile memory, at least a portion of data to be used in execution of the command; and stores the portion of data in the buffer memory. The retrieving and storing the portion of the data can be performed concurrently with the execution of many commands before the execution of the command, to reduce the latency impact of the command on other commands that are executed concurrently with the execution of the command.

Abstract: A matrix transfer accelerator (MTA) system/method that coordinates data transfers between an external data memory (EDM) and a local data memory (LDM) using matrix tiling and/or grouping is disclosed. The system utilizes foreground/background buffering that overlaps compute and data transfer operations and permits EDM-to-LDM data transfers with or without zero pad peripheral matrix filling. The system may incorporate an automated zero-fill direct memory access (DMA) controller (ZDC) that transfers data from the EDM to the LDM based on a set of DMA controller registers including data width register (DWR), transfer count register (TCR), fill count register (FCR), EDM source address register (ESR), and LDM target address register (LTR). The ZDC transfers matrix data from the EDM[ESR] to the LDM[LTR] such that EDM matrix data of DWR row data width is automatically zero-filled around a periphery of a matrix written to the LDM matrix based on the FCR value.

Abstract: A memory system includes a nonvolatile memory device and a controller circuit. The nonvolatile memory device includes a plurality of physical blocks, each including a storage area which is accessible in units of pages. The controller circuit is configured to control reading and writing of data which are performed on the plurality of physical blocks in units of pages. The controller circuit is also configured to execute a first process on the plurality of physical blocks by performing a second process of reading and a third process of data verification on a first page across each of the plurality of physical blocks and then performing the second process of reading and the third process of data verification on a second page across each of the plurality of physical blocks.

Abstract: Apparatuses and methods for performing lookup operations are provided. A content addressable memory (CAM) module disposed on a first chip includes one or more content addressable memories. A random access memory (RAM) module disposed on the first chip is configured to receive a memory address from the CAM modules, the memory address being based on a search key received by the CAM module. The RAM module includes one or more random access memories configured to store data entries and counter values or timestamps for respective ones of the data entries. The RAM module also includes logic that is configured to compute the counter values or timestamps. The RAM module is configured to output a data entry corresponding to the search key, the data entry being stored in the one or more random access memories at the memory address, and a counter value or timestamp for the data entry.

Abstract: Methods and systems for storage services is provided. One method includes configuring by a processor, a database availability group (DAG) storing an active database copy at a first computing node and a passive database copy of the active database copy at a second computing node; initiating a backup operation for backing up the passive database copy from the second computing node; and interfacing with the first computing node by the second computing node for completing the backup operation. The first computing node identifies logs for the backup operation, backs up the identified logs and provides metadata associated with the backup of the identified logs to the second computing node. The second computing node updates metadata for the backup operation such that a backup copy of the passive database copy points to the second node with metadata received from the first computing node.

Abstract: A deduplication processing method is provided. A storage device includes a plurality of memories and each memory includes at least one physical block. Parameter information of an initial memory representing any one of the plurality of memories in the storage device is obtained. The parameter information includes at least one of a weight of the at least one physical block in the initial memory or a space usage of the initial memory, and the weight of the at least one physical block corresponding to a next write time point of the at least one physical block. A deduplication weight of the initial memory according to the parameter information of the initial memory is obtained. A target memory having a largest deduplication weight from initial memories is selected and deduplication processing on the at least one physical block of the target memory is performed.

Abstract: A computer system having a host coupled to a storage device via a peripheral component interconnect express bus. The host communicates with the storage device in accordance with a non-volatile memory host controller interface specification. The host provides a customized module containing instructions for performing the operations of a customized command. The host sends an idle time command to the storage device for execution at an idle time. In response to a determination that the storage device is in an idle state, the storage device executes the idle time command, during which the module may be used by the controller of the storage device.

Abstract: Described is a system that allows for the efficient management of reallocating data between tiers of an automated storage tiering system. In certain configurations, protected data that is stored within the storage system may include a user data portion and a redundant data portion. Accordingly, to conserve space on higher storage tiers, the system may separate user data from the redundant data when reallocating data between tiers. For example, the system may only allocate the user data portion to higher storage tiers thereby conserving the space that would otherwise be taken by the redundant data, which remains, or is demoted to a lower tier. Moreover, the reallocation may occur during scheduled reallocation cycles, and accordingly, the reallocation of the separated protected data may occur without any additional tiering overhead.

Abstract: In one example in accordance with the present disclosure, a device comprising a host computing device further comprises a processor, a non-volatile dual inline memory module (NVDIMM) comprising metadata indicating system configuration information associated with the NVDIMM, and a basic input output system (BIOS) comprising system configuration information associated with the host computing device. The BIOS may: determine whether there is a mismatch between the system configuration information of the host computing device and the system configuration information indicated by the metadata.

Abstract: A translation buffer is provided in parallel to a translation lookaside buffer (TLB) to cache translations between intermediate physical addresses (IPAs) and pointers for entries in the TLB corresponding to the IPAs. The pointers can be used to identify and invalidate only certain entries in the TLB as compared to invalidating the whole TLB.

Abstract: A storage apparatus according to an aspect of the present invention is configured to perform a deduplication process on write data from a host. For the deduplication process, the storage apparatus calculates a feature value of write data, and records, in a management region, metadata that is a set of the feature value of the write data and information on a storage position of the write data. However, to prevent the amount of metadata stored in the management region from increasing, if write data meets a predetermined condition, the storage apparatus does not perform the deduplication process, and suppresses creation of metadata of the write data.

Abstract: A method is provided for increasing throughput in a distributed storage network (DSN). A storage unit (SU) of the DSN receives a set of access requests regarding a set of encoded data slices and determines whether processing one or more access requests from the set of access requests can be delayed. Based on performance information regarding the one or more access requests the SU queues the requests and delays the processing of the requests in order to achieve higher throughput.

Abstract: A solid state storage card includes flash storage devices for storing user data and a serial peripheral interface (SPI) flash storage storing a first set of machine instructions. The solid state card also includes a plurality of processor cores coupled to the flash storage devices and SPI flash storage device. Each processor includes storage for storage of a second set of machine instructions configured to cause one of the processor cores to respond to access requests for the flash storage devices. Upon power-up, no storage in the solid state card contains any of the second set of machine instructions. When executed by one of the processor cores, the first set of machine instructions causes the processor core to initiate a download of the second set of instructions from a device external to the solid state card.

Abstract: One embodiment provides a method comprising storing a first set of explicitly enumerated data values in a first window data structure associated with a first time span. The method further comprises storing one or more sets of summary statistics in a second set of window data structures. Each window data structure of the second set of window data structures is associated with a time span older than the first time span. The one or more sets of summary statistics are based on a second set of data values. The method further comprises storing a third set of explicitly enumerated data values in a third set of window data structures, wherein each data value of the third set of explicitly enumerated data values is annotated.

Abstract: Techniques for determining whether processes are running on a computing device are described. As an example, a detection process may create a virtual mapping of data to memory of the computing device. The detection process may access a file system storing special files including attributes of virtual memory mappings. The detection process may analyze the attributes of the virtual memory mapping, such as an amount of data stored or shared by the memory mapping, to determine that another process is sharing the memory mapping with the detection process. The detection process may send data to a server associated with the computing device indicating that a process other than the detection process is operating on the computing device.

Abstract: A memory system includes a memory controller, a first memory bank having a first I/O bus, a second memory bank having a second I/O bus, and a channel connecting the first I/O bus and the second I/O bus to the memory controller. The channel is used to transmit data between the first memory bank and the memory controller and between the second memory bank and memory controller, and is also used to transmit a command from the memory controller to the first memory bank and the second memory bank. The memory controller includes a bank command scheduler implemented in a hardware logic block. The hardware logic block includes a plurality of direct inputs and is able to determine, based on the plurality of inputs, an order in which to output commands to the first memory bank and the second memory bank over the channel; output a first command to the first memory bank; and output a second command to the second memory bank over the channel.

Abstract: A storage system includes a plurality of nodes, each of the nodes including a nonvolatile storage device, and a connection unit directly connected to at least one of the nodes. The connection unit is configured to determine a target node responsive to a write request generated by a host, determine whether or not the target node is busy, output a write command directed to a non-busy node such that data requested by the write request are written in the non-busy node, responsive to determining that the target node is busy, and output a copy command directed to the non-busy node such that the data written in the non-busy node are copied to the target node, after a reference time period has passed since determining that the target node is busy.