Abstract: A method and apparatus for detecting kernel data structure tampering are disclosed. In the method and apparatus, a memory region of a computer system is scanned for one or more characteristics of a kernel data structure of an operating system kernel. It is then determined, based at least in part on identifying whether the one or more characteristics are found in the memory region, whether the kernel data structure is stored in the memory region of the computer system for tampering with the kernel data structure.

Abstract: A storage tier management application indicates a heat index for each extent of a plurality of extents, wherein a higher heat index indicates a greater frequency of usage of tracks of an extent than a lower heat index. A least recently used (LRU) list for cache management is configured to perform demotion of tracks of a lower heat index prior to demotion of tracks of a higher heat index.

Abstract: A method and a system detects a cache line as a potential or confirmed hot cache line based on receiving an intervention of a processor associated with a fetch of the cache line. The method and system include suppressing an action of operations associated with the hot cache line. A related method and system detect an intervention and, in response, communicates an intervention notification to another processor. An alternative method and system detect a hot data object associated with an intervention event of an application. The method and system can suppress actions of operations associated with the hot data object. An alternative method and system can detect and communicate an intervention associated with a data object.

Abstract: A processor-implemented method, system, and/or computer program product deletes data from a storage device. One or more processors identify a component sensitivity level of a component, an input sensitivity level of a data input to the component, and an output sensitivity level of a data output from the component, where the data output is stored in a storage device. The processor(s) average the component sensitivity level, the input sensitivity level, and the output sensitivity level to establish a composite sensitivity level, determine a deletion mode for deleting the output data from the storage device based on the composite sensitivity level, and delete the output data from the storage device by utilizing the deletion mode.

Abstract: A file storage method and device are provided. The method includes: receiving a storage request for a to-be-stored file (S101); determining a target key for storing the to-be-stored file (S102); obtaining to-be-stored metadata of the to-be-stored file according to the determined target key (S103), wherein the to-be-stored metadata includes: fixed sub-metadata and variable sub-metadata; and storing the to-be-stored metadata in a metadata database, storing the fixed sub-metadata in a name of the determined target key, storing the variable sub-metadata in a preset storage area corresponding to the determined target key, and storing the to-be-stored file in a value of the determined target key (S104). By applying the file storage and device, the recovery of metadata is effectively ensured, while a storage space of a storage terminal is saved.

Abstract: A non-volatile storage apparatus includes a set of non-volatile memory cells and one or more control circuits in communication with the set of non-volatile memory cells. The one or more control circuits are configured to map the set of non-volatile memory cells into a plurality of regions, apply a first wear leveling scheme in a first region of the plurality of regions, and apply a second wear leveling scheme between the plurality of regions.

Abstract: A system includes a memory with a ring buffer having a plurality of slots and a producer and consumer processor in communication with the memory. The producer processor is configured to receive a new memory entry and detect a failure to produce the new memory entry to a slot in the ring buffer. Each memory entry in the ring buffer has an entry structure to maintain a list of extra entries. The producer processor is also configured to determine a location of an entry pointer for a last produced memory entry in the ring and add the new entry to the list of extra entries in the respective slot in the ring. Responsive to consuming the last produced memory entry, the consumer processor is configured to check whether the last produced memory entry includes any other memory entries in the list of extra entries and consume the new memory entry.

Abstract: Systems and methods for predicting read commands and pre-fetching data when a memory device is receiving random read commands to non-sequentially addressed data locations are disclosed. A limited length sequence of prior read commands is generated and that search sequence is then converted into an index value in a predetermined set of index values. A history pattern match table having entries indexed to that predetermined set of index values contains prior read commands that have previously followed the search sequence represented by the index value. The index value is obtained via application of a many-to-one algorithm to the search sequence. The index value obtained from the search sequence may be used to find, and pre-fetch data for, a next read command in the table that previously followed a search sequence having that index.

Abstract: Provided are a mobile device and a data management method of the mobile device. The data management method that is processed by a central processing unit (CPU) of the mobile device includes: selecting data to be swapped from among data stored in a local memory of the mobile device, in response to a request to perform swapping on the data stored in the local memory; selecting one of at least two external memories which are located outside the mobile device and have different hierarchical levels; and swapping the selected data to the selected external memory.

Abstract: A data storage device includes a nonvolatile memory device; and a controller suitable for controlling the nonvolatile memory device through a command, the controller comprising a memory controller including a queue which includes multiple slots, each of the multiple slots being mapped to one type among a plurality of types of the command, and suitable for processing a descriptor for the command enqueued to the queue to generate the command; and a processor suitable for requesting one slot of the multiple slots mapped to one type among the plurality of types of the command, to the memory controller, and enqueuing, when allocated with the one slot, the descriptor for the command, to the one slot.

Abstract: An operating system is configured to receive a request to store an object that does not specify the location at which the object should be stored. The request might also include an optimization factor and one or more object location factors. The operating system might also generate object location factors or retrieve object location factors from one or more external locations. Object location factors might also be utilized that are based upon properties of the object to be stored. Utilizing the object location factors, and the optimization factor if provided, the operating system dynamically selects an appropriate storage tier for storing the object. The tiers might include a local storage tier, a local network storage tier, a remote network storage tier, and other types of storage tiers. The object is then stored on the selected storage tier. The object may be retrieved from the storage tier at a later time.

Abstract: The present disclosure, in various embodiments, describes technologies and techniques for use by a data storage controller or similar device for efficiently and intelligently determining whether to use cached or non-cached memory access commands when accessing a non-volatile memory (NVM) device, such as a particular die of a multi-die NAND flash memory. In some examples, the data storage controller assesses the fill status of a particular memory access die queue (e.g., whether the queue is mostly full or mostly empty) and then determines whether to submit memory access commands to a NAND die as cached operations or non-cached operations based on the assessed fill status. In illustrative examples, the determination is made by a die manager based on the number of entries in the queue, with cached commands used if the entries exceed a predetermined threshold, and non-cached commands used otherwise. Method, system and apparatus examples are provided herein.

Abstract: Embodiments for managing resources in a tiered data storage system, by a processor device. In response to differing business priorities for executing workloads by a workload manager, a resource plan is generated by an administrator of the workload manager. The resource plan defines what resources of the storage system are allocated to a particular group of tenants and at what time the workloads of the particular group are executed, thereby optimizing utilization of the resources of the storage system. A time period of which a particular one of a plurality of storage tiers of the tiered data storage system is allocated for use by the respective one of the tenants is defined by an administrator, where a peak demand summed over all of tenants is allowed to exceed a total capacity of each individual one of the plurality of storage tiers.

Abstract: A storage device includes a flash memory array and a controller. The flash memory array stores a plurality of user data. After the controller finishes initialization, the controller accesses the user data stored in the flash memory array according to a plurality of host commands and an H2F mapping table, and records a plurality of address information about the user data in a powered-ON access table.

Abstract: A tagged memory organized is into memory chunks. Each memory chunk has a data field, a type field and an owner address field. The type field indicates type of data stored in the data field. The owner address field indicates which objects own which memory chunks. A memory manager has exclusive ability to allocate the memory chunks, deallocate the memory chunks, write to the memory chunks and read the memory chunks.

Abstract: In a data processing network comprising a Request, Home and Slave Nodes coupled via a coherent interconnect, a Home Node performs a read transaction in response to a read request from a Request Node. In a first embodiment, the transaction is terminated in the Home Node upon receipt of a read receipt from a Slave Node, acknowledging a read request from the Home Node. In a second embodiment, the Home Node sends a message to the Request Node indicating that a read transaction has been ordered in the Home Node and further indicating that data for the read transaction is provided in a separate data response. The transaction is terminated in the Home Node upon receipt of an acknowledge from the Request Node of this message. In this manner, the transaction is terminated in the Home Node without waiting for acknowledgement from the Request Node of completion of the transaction.

Abstract: A characteristic data pre-processing system includes a data acquisition device that collects characteristic data including first cell distribution data defined according to first default read levels, and second cell distribution data defined according to second default read levels, a data pre-processing apparatus that merges the first cell distribution data and the second cell distribution data according crop ranges to generate training data, wherein the crop ranges are defined according to the first default levels and the second default levels, and a database that stores the training data communicated from the data pre-processing apparatus.

Abstract: Aspects disclosed in the detailed description include hardware accelerated storage compression. In one aspect, prior to writing an uncompressed data block to the storage device, a hardware compression accelerator provided in a storage controller compresses the uncompressed data blocks individually into a compressed data block and allocates the compressed data block to a storage data block in the storage device. The hardware compression accelerator then generates a modified logical block address (LBA) to link the uncompressed data block to the compressed data blocks. In another aspect, the hardware compression accelerator locates a compressed data block based on a corresponding modified LBA and decompresses the compressed data block into an uncompressed data block.

Abstract: A storage device comprising: at least one nonvolatile memory; a buffer; and a memory controller configured to: receive data from a host; store the data in the buffer; and flush the data in the buffer to the at least one nonvolatile memory in response to an absence of communication with the host for a reference time duration.

Abstract: An apparatus to facilitate data prefetching is disclosed. The apparatus includes a cache, one or more execution units (EUs) to execute program code, prefetch logic to maintain tracking information of memory instructions in the program code that trigger a cache miss and compiler logic to receive the tracking information, insert one or more pre-fetch instructions in updated program code to prefetch data from a memory for execution of one or more of the memory instructions that triggered a cache miss and download the updated program code for execution by the one or more EUs.