Abstract: In some implementations, a device may receive, via a universal serial bus (USB) interface, configuration information and a supply of power from a network device. The device may receive, via an antenna that is external to the device, a first signal indicating timing information. The device may generate, based on the first signal, a second signal and a third signal, wherein the second signal comprises a one pulse per second signal and the third signal comprises a ten-megahertz signal. The device may provide, to the network device, the second signal and the third signal. The device may receive, via an input port, a clock signal to provide an extended holdover functionality to the network device.

Abstract: A method for configuring a peripheral bus of an information handling system performs, as part of a boot sequence, an initial configuration of a chipset setting pertaining to the bus based on a descriptor stored in a nonvolatile storage resource. After an operating system is loaded, a controller detects a peripheral device connecting to the bus and responds by performing a runtime configuration of the chipset setting based on capability information obtained from the peripheral device. The peripheral bus may comprise a USB pipe and a USB-C type connector, wherein the peripheral device is detected by a USB power delivery (PD) controller based on configuration channel (CC) pins of the USB-C connector. The PD controller may signal the chipset and send the device’s capability information to the chipset. The PD controller may assert a PMCALERT# signal of the chipset’s and send the capability information via a system management link (SMLink1).

Abstract: A host electronic device that supports both Universal Serial Bus (USB) and Controller Area Network (CAN) connections is provided. When the host electronic device detects connection from a peripheral electronic device that uses the CAN protocol, the host electronic device switches to USB-C alternate mode and routes CAN signals over sideband use signals.

Abstract: A baseboard management controller (BMC) system adaptable to support multiple computer platforms is disclosed. The BMC system has a BMC CPU chip including a processor executing firmware. The BMC CPU chip is coupled via an external bus to an interface chip. The interface chip includes input/output interfaces for different communication protocols to interface with components on a computer node.

Abstract: A setting to be applied at a docking station is obtained, either from a memory of the docking station, or from another device connected to a network by first obtaining, from a user device connected to the docking station, an identity of the user device and/or an identity of a user of the user device. Based on the identity of the user and/or the user device, a configuration set, of a plurality of configuration sets, that identifies at least one setting to be applied at the docking station is obtained and a setting to apply at the docking station is determined based at least partly on the configuration set. The docking station may store a set of docking station specific settings which can be used in conjunction with the setting(s) determined from the configuration set.

Abstract: In an embodiment, a system comprises: a first bus; a second bus; a first peripheral coupled to the first bus and the second bus, the first peripheral configured to receive a command from the first bus and to generate data in response to the first command; and a second peripheral coupled to the first bus and the second bus, the second peripheral configured to initiate transfer of the generated data from the first peripheral to the second peripheral over the second bus such that access to the generated data through the first bus is prevented.

Abstract: A data bus includes: a transaction selection circuit configured to receive vector data including a plurality of transactions from outside of the data bus, select at least one transaction from the plurality of transactions in which no traffic conflict occurs based on whether there is a traffic conflict among the plurality of transactions, and output the selected at least one transaction; and a memory data path including at least one register and configured to output the selected at least one transaction provided by the transaction selection circuit via the at least one register to the outside of the data bus.

Abstract: In some embodiments, a system for communicating USB information via an extension medium is provided. The system comprises an upstream facing port device (UFP device) and a downstream facing port device (DFP device). The UFP device is communicatively coupled to a host device via a USB-compliant connection. The DFP device is communicatively coupled to at least one USB device via a USB-compliant connection and communicatively coupled to the UFP device via a non-USB extension medium. The DFP device is configured to receive, from the UFP device, an incoming request packet addressed to a first USB endpoint provided by a USB device; and hold transmission of an outgoing request packet based on the incoming request packet to the USB device in response to determining that a ping response packet has not yet been received from the first USB endpoint.

Abstract: An adaptor device includes a first interface for coupling to a first processor, a second interface for coupling to a second processor, the second interface being different than the first interface, and a plurality of third interfaces, which are different than either the first interface or the second interface. The plurality of third interfaces are configured for coupling to a corresponding plurality of external devices. The adaptor device is configured to receive, at the first interface, a first signal from the first processor. In response to the first signal, the adaptor device couples through the plurality of third interfaces to the plurality of external devices to enable the first processor substantially concurrent access to the plurality of external devices. The adaptor device is also configured to receive, at the first interface, a second signal from the first processor.

Abstract: A Lightweight Bridge (LWB) is disclosed. The LWB may be a circuit. An endpoint of the LWB that may expose a plurality of Physical Functions (PFs) to a host. A root port of the LWB may connect to a device and determine the PFs and Virtual Functions (VFs) exposed by the device. An Application Layer-Endpoint (APP-EP) and an Application Layer-Root Port (APP-RP) may translate between the PFs exposed by the endpoint and the PFs/VFs exposed by the device. The APP-EP and the APP-RP may implement a mapping between the PFs exposed by the endpoint and the PFs/VFs exposed by the device.

Abstract: A memory system supports single- and dual-memory-module configurations, both supporting point-to-point communication between a host (e.g., a memory controller) and the memory module or modules. Each memory module includes an address-buffer component, data-buffer components, and two sets of memory dies, each set termed a “timing rank,” that can be accessed independently. The one memory module is configured in a wide mode for the single-memory-module configuration, in which case both timing ranks work together, as a “package rank,” to communicate full-width data. Each of two memory modules are configured in a narrow mode for the dual-memory-module configuration, in which case one timing rank from each memory module communicates data in parallel to appear to the host as single package ranks. The data-buffer components support separate and configurable write and read delays for the different timing ranks on each module to provide read and write leveling within and between memory modules.

Abstract: A data transmission method, applicable between a first USB host and a second USB host, is provided. The first USB host includes a host software, and the second USB host includes a controlled software. The data transmission method includes the following steps. A connection is established from a USB hub to the first USB host via its first USB port. A connection is established from a USB hub to the second USB host via its second USB port. A first USB transmission channel between the first USB host and the second USB host is provided by the USB hub. A first data is transmitted to the USB hub via the first USB port and the first data is transmitted to the second USB host through the first USB transmission channel of the USB hub via the second USB port by the host software and the controlled software.

Abstract: Provided are a storage device configured to perform high-speed link startup and a storage system including the storage device. The storage system performs data communication through a connected transmission lane and a connected reception lane from among a plurality of lanes between a host and the storage device. The host transmits an activate period of the connected transmission lane, which is less than a first time period, to the connected reception lane, and the storage device receives the activate period of the connected reception lane, which is less than the first time period. The host and the storage device perform link startup in a high-speed mode through the connected transmission lane and the connected reception lane, based on the activate period being less than the first time period.

Abstract: Techniques and apparatus to provide for interactions between system components are described. In one embodiment, an apparatus to provide a component interface, the apparatus comprising at least one memory, a first component comprising at least one register, logic, at least a portion of comprised in hardware, the logic to define at least one interface field stored in the at least one register, generate an interface with a second component based on the at least one interface field, and receive interface information from the second component via the interface, the interface information comprising at least one value for the at least one interface field.

Abstract: A communication system includes a central, zone ECUs capable of communicating with the central ECU via a communication bus, and zone ECUs capable of communicating with the central ECU via a communication bus. The central ECU periodically transmits, to the communication buses, a count signal including a count value counted up every time the count signal is transmitted, transmits a control signal including a start count value and control content to the communication buses, and sets a transmission priority of the count signal to be higher than a transmission priority of the control signal. The zone ECUs receive the count signal and the control signal, after the control signal is received, when the count value included in the received count signal becomes equal to the start count value included in the control signal, an operation corresponding to the control content included in the control signal is started.

Abstract: In some embodiments, a system for communicating USB information via a non-USB extension medium is provided. The system comprises an upstream facing port device (UFP device) and a downstream facing port device (DFP device). The DFP device is configured to receive, from the UFP device via the extension medium, a first ACK IN packet addressed to a first endpoint and a second ACK IN packet addressed to a second endpoint after receiving the first ACK IN packet. In response to detecting that the USB-compliant connection is available, the DFP device compares a bInterval value for the first endpoint to a bInterval value for the second endpoint; and in response to determining that the bInterval value for the second endpoint is smaller than the bInterval value for the first endpoint, the DFP device transmits a synthetic ACK IN packet to the second endpoint based on the second ACK IN packet.

Abstract: An information handling system may include a host system comprising a host system processor and a management controller communicatively coupled to the host system processor and comprising a main processor for implementing functionality of the management controller and a co-processor communicatively coupled to the host system processor and configured to implement a proxy to the host system to enable the host system to access devices managed by the management controller.

Abstract: A data processing apparatus is provided that includes communication circuitry to transmit an interconnect message to a root port using a physical address mapped to the root port. Translation circuitry encapsulates, within the interconnect message to the root port, a Peripheral Component Interconnect Express (PCIe) message to a destination, the PCIe message having routing information encoded as a PCIe bus number associated with the destination.

Abstract: An energy module is disclosed. The energy module includes a hand-switch circuit, a surgical instrument interface coupled to the hand-switch circuit, and a control circuit coupled to the surgical instrument interface and the hand-switch circuit. The control circuit is configured to control the hand-switch circuit to communicate with a surgical instrument coupled to the hand-switch circuit using a plurality of communication protocols over a single wire. The control circuit is configured to control the hand-switch circuit to supply power to the instrument over the single wire.

Abstract: Various configurations of high-speed data communication devices, e.g., repeaters, interfacing between a host and a peripheral, and methods of operating the same, are provided to improve the Remote Wake sequence. Repeaters include circuitry to detect the start of Resume signaling or the end of Resume, following initiation of Remote Wake. In an example, pull-up resistors coupled to upstream differential signal lines and a detection circuit with a current source are controlled to detect the start of Resume signaling. In another example, the upstream-side pull-resistors and an enable signal to an upstream-side transmitter are controlled to detect the end of Resume.