Abstract: The present disclosure discloses a server management framework and a server. The server management framework includes: a management board, wherein the management board comprises a baseboard management controller, a platform controller hub, and a management board complex programming logic device (CPLD), and a first end of the management board CPLD is connected to the platform controller hub; and a motherboard, wherein the motherboard comprises a central processing unit and a motherboard CPLD, a first end of the motherboard CPLD is connected to the central processing unit, and a second end of the motherboard CPLD is connected to a second end of the management board CPLD, so that the baseboard management controller communicates with the management board CPLD through the motherboard CPLD, and the platform controller hub communicates with the baseboard management controller through the motherboard CPLD and the management board CPLD.

Abstract: Memory systems and methods of operating the memory systems are disclose. In one arrangement, a device includes a memory device configured to store first data, a first input/output (I/O) pin, and a serial communication device configured to receive the first data and output the first data. The serial communication device is connected to the first I/O pin via a first device. The device also includes a virtual communication logic configured to receive the first data and output the first data to a communication interface connected to a host device.

Abstract: Systems, methods, and devices for monitoring operation of industrial equipment are disclosed. In one embodiment, a monitoring system is provided that includes a passive backplane and one more functional circuits that can couple to the backplane. Each of the functional circuits that are coupled to the backplane can have access to all data that is delivered to the backplane. Therefore, resources (e.g., computing power, or other functionality) from each functional circuits can be shared by all active functional circuits that are coupled to the backplane. Because resources from each of the functional circuits can be shared, and because the functional circuits can be detachably coupled to the backplane, performance of the monitoring systems can be tailored to specific applications. For example, processing power can be increased by coupling additional processing circuits to the backplane.

Abstract: Disclosed is a signal processing circuit, a contactless connector, a signal processing method and a storage medium.

Abstract: Provided are a Peripheral Component Interconnect Express (PCIe) interface device and a method of operating the same. The PCIe interface device includes a first buffer, a second buffer, and a buffer controller. The first buffer may be configured to store a plurality of first transaction layer packets received from multiple functions. The second buffer may be configured to store a plurality of second transaction layer packets received from the multiple functions. The buffer controller may be configured to, when a first buffer of a switch is full, realign an order in which the plurality of second transaction layer packets are to be output from the second buffer to the switch, based on IDs of the plurality of second transaction layer packets.

Abstract: A communication device mounted in each of a plurality of information processing devices connected to a fabric, the communication device comprises: a serial interface that transmits and receives a first packet compliant with a Peripheral Component Interconnect Express (PCIe) standard; a requester unit that acquires the first packet from the serial interface and converts the first packet that has been acquired into a second packet that is transmitted and received via the fabric among a plurality of the information processing devices sharing a memory space that is virtually extended by using a device identifier specific to each of the information processing devices; a fabric communication unit that transmits and receives the second packet via the fabric; and a completer unit that acquires the second packet from the fabric communication unit and generating a response packet to a request included in the second packet that has been acquired.

Abstract: A communication control device for a subscriber station of a serial bus system. The communication control device has a communication control module for generating a transmitted signal for controlling a communication of the subscriber station with at least one other subscriber station of the bus system, in which bus system at least a first communication phase and a second communication phase are used for exchanging messages between subscriber stations of the bus system, a first terminal for transmitting, in an operating mode of the first communication phase, the transmitted signal to a transmitting/receiving device, a second terminal for receiving, in the operating mode of the first communication phase, a digital received signal from the transmitting/receiving device, and an operating mode switching module for switching the transmission direction of the first and the second terminal in the second communication phase to the same direction for differential signal transmission.

Abstract: Provided are a serial communication device and a serial communication system for a memory access. The serial communication device for a memory access may include: a system-on-chip (SoC) bus interface receiving a request transaction from a hardware acceleration device; a master protocol processor converting a request transaction received through the SoC bus interface into a packet according to a predetermined packet protocol; and a serial transceiver serial-transmitting the packet.

Abstract: To reduce software development man-hours when vehicle models are developed an in-vehicle equipment controller includes a CPU and memory. The CPU has, as a software configuration, an application layer, a middleware layer, and a device driver. In the middleware layer, a first communication packet on the application side and a second communication packet on a device driver side are installed. In the middleware layer, a communication path between the application layer and the device driver is generated based on a mapping table stored in the memory.

Abstract: Techniques for intelligently routing IO to a storage class memory (SCM) namespace are disclosed. A configuration for a namespace is determined, where the configuration indicates a type of IO that the namespace is structured to handle. Details about the configuration of the namespace are stored in a repository. A forwarding rule is generated based on the namespace's stored configuration. When incoming IO having attributes similar to that type is received, implementation of the forwarding rule causes the incoming IO to be directed to the namespace. Attributes of a particular incoming IO are determined. As a result of the attributes satisfying a similarity threshold relative to the type, the forwarding rule is implemented such that the particular incoming IO is directed to the namespace.

Abstract: A memory chip may include: a plurality of memory banks; a data storage configured to store access information indicative of access operations for one or more segments of the plurality of memory banks; and a refresh controller configured to perform a refresh operation of the one or more segments based, at least in part, on the stored access information.

Abstract: An audio and video transmission system includes a multimedia device. The multimedia device includes a high-definition multimedia interface (HDMI) receiver, a first transfer circuit, and a first universal serial bus type C (USB-C) interface. The first transfer circuit is configured to transfer a first audio signal output by an audio channel pin of the HDMI receiver into a second audio signal in a universal serial bus (USB) interface format. The first USB-C interface is configured to transmit the second audio signal. The HDMI audio channel pin is an audio return channel (ARC) pin or an enhanced ARC pin.

Abstract: The present disclosure includes apparatuses and methods related to a hybrid memory system interface. An example computing system includes a processing resource and a storage system coupled to the processing resource via a hybrid interface. The hybrid interface can provide an input/output (I/O) access path to the storage system that supports both block level storage I/O access requests and sub-block level storage I/O access requests.

Abstract: Implementations of encoding techniques are disclosed. The encoding technique, such as a Data bus Inversion (DBI) technique, is implementable in a vertically-stacked memory module, but is not limited thereto. The module can be a plurality of memory integrated circuits which are vertically stacked, and which communicate via a bus formed in one embodiment of channels comprising Through-Wafer Interconnects (TWIs), but again is not limited thereto. One such module includes spare channels that are normally used to reroute a data signal on the bus away from faulty data channels. In one disclosed technique, the status of a spare channel or channels is queried, and if one or more are unused, they can be used to carry a DBI bit, thus allowing at least a portion of the bus to be assessed in accordance with a DBI algorithm. Depending on the location and number of spare channels needed for rerouting, DBI can be apportioned across the bus in various manners.

Abstract: An overlap detection unit for a user station of a serial bus system. The overlap detection unit includes a collision detection block for detecting bus states on a bus of the bus system, in which, in order to transmit a message, bus states of user stations of the bus system are generated on the bus with a first physical layer in a first communication phase, and are generated with a second physical layer in a second communication phase, the second physical layer being different from the first physical layer. The collision detection block generates a signal whose value indicates whether or not the bus states in the second communication phase have a level that corresponds to an overlap of the first and second physical layers or an overlap of two second physical layers, and the collision detection block is designed to output the signal for the user station.

Abstract: A system for communication between BMSs of a battery pack including a plurality of BMSs connected to a parallel communication network, and a plurality of slave BMSs allocated with different communication identifiers, each having a variable field; and a master BMS for allocating a communication identifier to each of the plurality of slave BMSs through the parallel communication network, changing a priority determination value allocated to the variable field according to a predetermined condition, and performing communication with the plurality of slave BMSs based on the communication identifier.

Abstract: A charging system includes a source terminal and a sink terminal. The control method of the charging system includes transmitting a bus voltage by the source terminal, determining whether the sink terminal has entered a sink attached state when the sink terminal receives the bus voltage, enabling a message transceiver of the sink terminal if the sink terminal has entered the sink attached state, transmitting a source message to the transceiver of the sink terminal by the source terminal, transmitting a request message to the source terminal by the message transceiver of the sink terminal while the source terminal transmits the source message, and continuing to enable a communication function for communicating with the sink terminal and continuing to transmit the bus voltage to the sink terminal by the source terminal when the source terminal receives the request message.

Abstract: An eyewear device that includes a plurality of SoCs that share processing workload, and a USB port configured to perform low-power debugging and automation of the plurality of SoCs, such as using either a Universal Asynchronous Receiver-Transmitter (UART) or a Serial Wire Debug (SWD). The eyewear includes a USB hub configured such that the USB port can simultaneously communicate with the plurality of SoCs. The USB hub can be shut down to disable the USB hub, and all the SoCs can enter their low-power modes without being kept awake by a persistent USB connection. The eyewear includes a first switch and a control logic, wherein the control logic controls the first switch and enables the USB port to perform low-power debugging and automation of the SoCs. The eyewear further includes a second switch, wherein the control logic controls the second switch to enable the USB port to perform low-power debugging and automation of the SoCs via a processor, or to enable the USB port to control each of the SoCs.

Abstract: Memory controllers, devices, modules, systems and associated methods are disclosed. In one embodiment, an integrated circuit (IC) memory device is disclosed. The memory device includes an array of storage cells and command interface circuitry to receive an internal transfer command. In response to the internal transfer command, transfer logic reads data from a first portion of the array of storage cells, transfers the data as on-chip transfer data, and writes the on-chip transfer data to a second portion of the array of storage cells. In response to the command interface circuitry receiving an interrupt command, the transfer logic pauses the internal transfer operation, and carries out an unrelated memory access operation involving at least the first portion of the array of storage cells or the second portion of the array of storage cells.

Abstract: A position-sensing method and device for sensing the installation location (F1, . . . , Fi) of slave units (SE1, . . . , SEi) in an operating region (A1, . . . , Ai) of a system (A) comprising a number i of adjacent operating regions (A1, . . . , Ai) each having a slave unit, wherein the individual slave units (SE1, SEi) have a changeable operating function for achieving or changing the physical state in the operating region in question of the system, and wherein a respective sensor (S1, . . . , Si) is provided in each operating region in question in order to sense a measurement variable (T) proportional to the physical state in the operating region in question and an evaluating device is provided in order to determine, upon the activation or changing of the operating function of at least one slave unit (SE1, . . . , SEi), the installation location (F1, . . . , Fi) of said slave unit from the change in the measurement variables (T) over time.