Abstract: In one embodiment, a system includes one or more processors and a memory storing instructions that, when executed by the one or more processors, cause the one or more processors to perform operations including sequencing a plurality of rows into a first sequence based on a first criteria and determining to store a first set of the plurality of rows in a first block of a first storage unit in accordance with the first sequence. The operations further include determining to store, in a first block of the second storage unit, a block identification of the first block of the first storage unit and a row identification for each row of the first set of the plurality of rows. The operations further include re-creating the first set of the plurality of rows of the first block of the first storage unit using information stored in the second storage unit.

Abstract: Circuits and methods for combined precise and imprecise snoop filtering. A memory and a plurality of processors are coupled to the interconnect circuitry. A plurality of cache circuits are coupled to the plurality of processor circuits, respectively. A first snoop filter is coupled to the interconnect and is configured to filter snoop requests by individual cache lines of a first subset of addresses of the memory. A second snoop filter is coupled to the interconnect and is configured to filter snoop requests by groups of cache lines of a second subset of addresses of the memory. Each group encompasses a plurality of cache lines.

Abstract: The present disclosure, in various embodiments, describes technologies and techniques for use by a memory controller or similar device for storing sequential image data or other data streams composed of pages of data. In one example, the memory controller compares data within current and previous image frames on a page-by-page basis. If a pair of pages match, the memory controller creates a link between the two pages so the duplicate page need not be stored. During a subsequent read operation, the flash controller accesses stored links to identify the physical storage addresses of any matching pages stored in connection with a previous frame to permit efficient retrieval. In some examples, a page is compared with both the previous corresponding page and with the neighboring pages of that previous page. Exemplary read, write and erase operations are described herein using the links.

Abstract: Data access routing circuitry 4, 6 is provided for routing data access request to a selected destination node. The data access routing circuitry supports read requests requiring a read response, write requests requiring a write response and at least one type of atomic data access request requiring both a read response and a write response. Resource allocation circuitry 70, 71 is provided to control allocation of resource for handling data access requests which require a read response. The resource allocation circuitry 70, 71 reserves resource for handling the at least one type of atomic data access request and prevents use of the reserved resource 76 for handling read requests.

Abstract: Apparatuses and methods for performing multithread, concurrent access of different partition of a memory are disclosed herein. An example apparatus may include a non-volatile memory array comprising a plurality of partitions. Each of the plurality of partitions may include a respective plurality of memory cells. The apparatus may further include a plurality of local controllers that are each configured to independently and concurrently access a respective one of the plurality of partitions to execute a respective memory access command of a plurality of memory access commands responsive to receiving the respective memory access command. The example apparatus may further include a controller configured to receive the plurality of memory access commands and to determine a respective target partition of the plurality of partitions for each of the plurality of memory access commands.

Abstract: A computer-implemented method, according to one embodiment, includes: receiving a write request which includes data, and allocating an inode entry in a central inode list, such that the inode entry corresponds to the data received. The data is allocated to a block of storage space in memory. Moreover, one or more instructions to write the data to the block of storage space are sent. A determination is also made as to whether the data fills a threshold amount of a last block of storage space. In response to determining that the data does not fill the threshold amount of the last block of storage space, one or more instructions to create an identifier at an end of the data are sent. Furthermore, one or more instructions to store a copy of the inode entry after the identifier in the last block of storage space are sent.

Abstract: A memory monitoring and selective defragmentation method and system disclosed herein monitor memory usage by and modification of one or more database indexes. The monitoring and selective defragmentation method and system selectively defragment the one or more database indexes based on memory cost savings as opposed to a percentage of fragmentation to improve performance of databases.

Abstract: A storage system performs garbage collection with data compression. A storage controller in the storage system determines a garbage collection directive by evaluating the amount of reclaimable space relative to a target amount of reclaimable space. Garbage collection is performed using data compression tunable to compression aggressiveness according to the garbage collection directive.

Abstract: Example implementations relate to memory read requests. For example, an implementation may include tracking progress of an iterative write sequence to write data to a memory element of a memory module. A received read request is detected to be addressed to a memory bank that includes the memory element undergoing the iterative write sequence. Based on the tracked progress, a time is determined to interrupt the iterative write sequence with insertion of the read request. The time aligns between operations of the iterative write sequence and data is returned within a predetermined read latency.

Abstract: A computer-implemented method according to one embodiment includes identifying an extent to be relocated within a storage environment, determining a current workload of each of a plurality of storage drives within the storage environment, determining current performance capabilities of each of a plurality of backend storage controllers associated with the plurality of storage drives within the storage environment, and moving the extent to one of the plurality of storage drives, based on the current workload for each of the plurality of storage drives and the current performance capabilities of the plurality of backend storage controllers.

Abstract: A memory manager on a programmable device manages memory allocated to accelerators on the programmable device and allocated to processes that access the programmable device. The memory manager can manage both memory on the programmable device as well as external memory coupled to the programmable device. The memory manager protects the memory from unauthorized access by enforcing protection for the memory, using keys, encryption or the like. The memory manger can allocate a partition of memory to an accelerator when an accelerator is deployed to a programmable device, then allocate subpartitions within the allocated partition for each process that accesses the accelerator. When an accelerator is cast out of the programmable device, the memory partition is scrubbed so it can be reclaimed and allocated to another accelerator. When a process terminates, the subpartitions corresponding to the process are scrubbed so they may be reclaimed and allocated to another process.

Abstract: A method for controlling operations of a data storage device, the associated data storage device and the controller thereof are provided. The method can comprise: selecting a block of multiple blocks of a non-volatile (NV) memory element of a plurality of NV memory elements; receiving a data-writing command from a host device; generating a plurality of operating commands corresponding to the data-writing command, and sending the plurality of operating commands to the NV memory to perform data-writing on a plurality of non-reserved word-lines of the block, wherein the block comprises the plurality of non-reserved word-lines and a plurality of reserved word-lines, and each non-reserved word-line of the plurality of non-reserved word-lines comprises multiple pages; and writing user data into a reserved word-line of the plurality of reserved word-lines through a single level cell (SLC) writing mode, to make the reserved word-line comprise a single page.

Abstract: Devices and techniques for a storage backed memory package save trigger are disclosed herein. Data can be received via a first interface. The data is stored in a volatile portion of the memory package. Here, the memory package includes a second interface arranged to connect a host to a controller in the memory package. A reset signal can be received at the memory package via the first interface. The data stored in the volatile portion of the memory package can be saved to a non-volatile portion of the memory package in response to the reset signal.

Abstract: A solid state drive with a reset circuit includes a controlling circuit, a flash array and a buffer. The controlling circuit includes a physical layer circuit and a first input/output port. The first input/output port is connected with a first reset terminal of a host. The flash array and the buffer are connected with the controlling circuit. When the first reset terminal of the host activates a reset signal, a voltage level of the first input/output port is changed. After a delay time, the voltage level of a second reset terminal of the physical layer circuit is changed and the physical layer circuit is reset.

Abstract: A method and device generates a slab identifier and a hash function identifier in response to a memory allocation request with a request identifier and allocation size from a memory allocation requestor. The slab identifier indicates a memory region associated with a base data size and the hash function identifier indicates a hash function. The method and device provides a bit string including the slab identifier and the hash function identifier to the memory allocation requestor.

Abstract: A display controller for a data processing system includes a memory read sub-system operable to read data of input surfaces to be used as input layers to be processed by the display controller. The memory read sub-system is operable to request in advance the loading of memory address translation data into a memory address translation data cache for memory pages storing data relating to an input surface. The memory read sub-system selects the memory pages that it requests the advance loading of address translation data for based on information relating to the data for the input surface that will be required by the display controller to generate the output surface, such as the vertical and horizontal size of the input layer that the input surface will be used for, an indication of any flipping or rotation of the input surface, etc.

Abstract: A data processing system includes a host suitable for providing an access request; and a plurality of memory systems suitable for storing or reading data thereto or therefrom in response to the access request, wherein the host includes a host memory buffer suitable for storing a plurality of meta-data respectively corresponding to the plurality of memory systems, wherein each of the plurality of meta-data includes a first threshold value representing storage capacity for user data in a corresponding memory system among the plurality of memory systems, a second threshold value representing a number of read operations for logical block addresses (LBAs) of the corresponding memory system, a third threshold value representing a temperature of the corresponding memory system and respective LBAs of the plurality of memory systems.

Abstract: According to one embodiment, a memory system including a key-value store containing key-value data as a pair of a key and a value corresponding to the key, includes an interface, a memory block, an address acquisition circuit and a controller. The interface receives a data write/read request or a request based on the key-value store. The memory block has a data area for storing data and a metadata table containing the key-value data. The address acquisition circuit acquires an address in response to input of the key. The controller executes the data write/read request for the memory block, and outputs the address acquired to the memory block and executes the request based on the key-value store. The controller outputs the value corresponding to the key via the interface.

Abstract: According to an embodiment, a controller includes a write control unit configured to make a control that converts data requested to be written by an external device into pieces of cluster data with a size of a cluster of a storage medium, compresses each piece of cluster data, determines a corresponding physical address of a write destination in the storage medium according to a predetermined rule, and writes the compressed pieces of cluster data to the storage medium using the physical address of the write destination. The write control unit also makes a control that writes a correspondence between the physical address and a corresponding logical address to a storage unit. The controller also includes a read control unit configured to a control that reads a piece of cluster data from the storage medium using an acquired physical address, and decompresses the read piece of cluster data.

Abstract: A system and method for migrating a virtual machine and storage may include receiving a request to migrate a virtual machine from a host machine. The system and method include establishing a storage space on a shared storage space and creating an access table and a location table. The access table includes access values indicative of data being accessed. The location table includes location values indicative of a location of the data in the first storage space or a shared storage space. A transfer of data between the first storage space and the shared storage space is done using the access table and the location table. The data is accessible in both the first storage space the shared storage space based on the one or more location values of the location table and access to the data is based on the one or more access values of the access table.