Patents Examined by Hien N Nguyen
  • Nonvolatile memory apparatus performing consecutive access operations and an operation method of the nonvolatile memory apparatus
    Patent number: 11581041
    Abstract: A nonvolatile memory apparatus includes a memory cell array and a memory control circuit. The memory cell array includes a plurality of sub arrays each including a plurality of memory cells coupled to a plurality of bit lines. The memory control circuit sequentially couples thereto, based on a single read command signal, at least a single bit line disposed on the respective sub arrays to sequentially access a memory cell coupled to the at least single bit line.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: February 14, 2023
    Assignee: SK hynix Inc.
    Inventor: Min Chul Shin
  • Method and apparatus for pulmonary interventions
    Patent number: 11565135
    Abstract: Apparatus and methods for deactivating bronchial nerves extending along the secondary bronchial branches of a mammalian subject to treat asthma and related conditions. An ultrasonic transducer (11) is inserted into the bronchus as, for example, by advancing the distal end of a catheter (10) bearing the transducer into the secondary bronchial section to be treated. The ultrasonic transducer emits circumferential ultrasound so as to heat tissues throughout circular impact volume (13) as, for example, at least about 1 cm3 encompassing the bronchus to a temperature sufficient to inactivate nerve conduction but insufficient to cause rapid ablation or necrosis of the tissues. The treatment can be performed without locating or focusing on individual bronchial nerves. The apparatus and methods utilized for lung tumor ablation.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: January 31, 2023
    Assignee: AERWAVE MEDICAL, INC.
    Inventors: Reinhard J. Warnking, Satoshi Nishiaoki
  • Memory device and method of operating the same
    Patent number: 11568947
    Abstract: A memory device includes a memory cell array including a plurality of memory cells connected to a plurality of word lines. The memory device also includes a peripheral circuit configured to perform a plurality of program loops to program memory cells, among the plurality of memory cells, connected to a selected word line among the plurality of word lines. The memory device further includes control logic configured to control the peripheral circuit to set a step voltage based on the number of turned off memory cells among the selected memory cells and then apply a program voltage, to which the step voltage is added, to the selected word line in a next program loop, during a verify operation of a program operation and the verify operation included in each of the plurality of program loops.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: January 31, 2023
    Assignee: SK hynix Inc.
    Inventor: Jae Woong Kim
  • Systems and methods for adaptive self-referenced reads of memory devices
    Patent number: 11562790
    Abstract: Methods and systems include memory devices with a memory array comprising a plurality of memory cells. The memory devices include a control circuit operatively coupled to the memory array and configured to receive a read request for data and to apply a first voltage at a first time duration to the memory array based on the read request. The control circuit is additionally configured to count a number of the plurality of memory cells that have switched to an active read state based on the first voltage and to derive a second time duration. The control circuit is further configured to apply a second voltage at the second duration to the memory array. The control circuit is also configured to return the data based at least on bits stored in a first and a second set of the plurality of memory cells.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: January 24, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Graziano Mirichigni, Riccardo Muzzetto, Ferdinando Bedeschi
  • Multiplexer for memory
    Patent number: 11562789
    Abstract: In an example, a multiplexer is provided. The multiplexer may include one or more first strings controlling access to source-lines of the memory, wherein a first string of the one or more first strings includes a first set of two high voltage transistors and a first plurality of low voltage transistors. The multiplexer may include one or more second strings controlling access to bit-lines of the memory, wherein a second string of the one or more second strings includes a second set of two high voltage transistors and a second plurality of low voltage transistors. A method for operating such multiplexer is provided.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: January 24, 2023
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: David Mueller, Wolf Allers, Christian Peters
  • Single and multilayer bands and related methods
    Patent number: 11554250
    Abstract: Medical appliances including reinforcing bands and radiopaque marker bands are disclosed. In some embodiments, bands may comprise two or more material layers. A first layer may control the mechanical properties of a multilayered marking band, and a second layer may exhibit greater radiopacity than the first layer. Bands may also comprise a single layer.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: January 17, 2023
    Assignee: Merit Medical Systems, Inc.
    Inventors: John William Hall, Craig Nordhausen
  • Liver disease activity estimation with ultrasound medical imaging
    Patent number: 11553901
    Abstract: Ultrasound-based estimation of disease activity, such as for NAS or other activity index for NAFLD for liver disease, is provided. Ultrasound measures acoustic scatter and shear wave propagation parameters, such as measuring acoustic backscatter coefficient, shear wave velocity, and shear wave damping ratio. A score for the disease activity is determined from these scatter and shear wave propagation parameters. The physician may be assisted by relatively inexpensive and rapid ultrasound as compared to biopsy or MRI based scoring in scoring activity of a disease, such as NAFLD. Ultrasound imaging is more readily available and less expensive and MRI, and is non-invasive.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: January 17, 2023
    Assignee: Siemens Medical Solutions USA, Inc.
    Inventor: Yassin Labyed
  • Enhanced state dual memory cell
    Patent number: 11551750
    Abstract: A circuit may include a memory cell. The memory cell may include a first memory element, a second memory element, a first transistor, and a second transistor. The first memory element may be connected to a bit line. The second memory element may be connected to a select line. The first transistor may be connected to a first word line. The second transistor may be connected to a second word line. The first memory element may be programmed by applying a first write voltage to the bit line, applying a second write voltage to the second word line, applying a first intermediate voltage to the select line, and applying a second intermediate voltage to the first word line. The select line may be connected to a high impedance. The first write voltage may be a positive supply voltage, the second write voltage may be a negative supply voltage.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: January 10, 2023
    Assignee: International Business Machines Corporation
    Inventors: Bahman Hekmatshoartabari, Alexander Reznicek
  • Personal use extracorporeal low intensity shock wave device enhanced user features and functions
    Patent number: 11547875
    Abstract: A device which utilizes low intensity extracorporeal shock therapy for purposes of treating soft tissue damage, cellulite reduction, or erectile dysfunction, to permit a simple, inexpensive, robust, home use solution which permits self-applied treatment for various parts of the user's body with a form factor, display, information, guidance, tutorials and training, marketing communication and purchase opportunities, viewing angle, timers, annunciators, sound attenuation, and payment options which provide an untrained amateur user with all tools and guidance necessary to properly, effectively, safely and affordably self-administer treatments.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: January 10, 2023
    Assignee: MOON POOL LLC
    Inventor: Jonathan Hoffman
  • Artificial neuromorphic circuit and operation method
    Patent number: 11551070
    Abstract: Artificial neuromorphic circuit includes synapse and post-neuron circuits. Synapse circuit includes phase change element, first switch having at least three terminals, and second switch. Phase change element includes first and second terminals. First switch includes first, second and control terminals. Second switch includes first, second and control terminals. First switch is configured to receive first pulse signal. Second switch is coupled to phase change element and first switch, and is configured to receive second pulse signal. Post-neuron circuit includes capacitor and input terminal. Input terminal of post-neuron circuit charges capacitor in response to first pulse signal. Post-neuron circuit generates firing signal based on voltage level of capacitor and threshold voltage. Post-neuron circuit generates control signal based on firing signal. Control signal controls turning on of second switch.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: January 10, 2023
    Assignees: JIANGSU ADVANCED MEMORY TECHNOLOGY CO., LTD., ALTO MEMORY TECHNOLOGY CORPORATION
    Inventors: Chung-Hon Lam, Ching-Sung Chiu
  • Additional learning method for deterioration diagnosis system
    Patent number: 11544554
    Abstract: A determiner which learns acceleration measurement data which has been obtained by an accelerated aging test and indicates that a facility changes from a normal state to an aged state, and advance label data which is obtained by giving a label to data indicating characteristics of aging in the acceleration measurement data. Measurement data of aging diagnosis is obtained from the facility which is operating, teacher aging degree label data is found from a record of maintenance of the facility, and additional data is obtained from the measurement data and the teacher aging degree label data. When a difference between predicted aging degree label data and teacher aging degree label data is greater than a predetermined value, learning data is selected as additional learning data. The additional learning data is learned to update the determiner.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: January 3, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Naofumi Shimasaki, Kazutaka Ikeda
  • Systems and methods for adaptive self-referenced reads of memory devices
    Patent number: 11538522
    Abstract: Methods and systems include memory devices with a memory array comprising a plurality of memory cells. The memory devices include a control circuit operatively coupled to the memory array and configured to receive a read request for data and to apply a first voltage to the memory array based on the read request. The control circuit is additionally configured to count a total number of the plurality of memory cells that have switched to an active read state based on the first voltage and to apply a second voltage to the memory array based on the total number. The control circuit is further configured to return the data based at least on bits stored in a first and a second set of the plurality of memory cells.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: December 27, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Graziano Mirichigni, Corrado Villa
  • Magnetic laminated film, magnetic memory element, and magnetic memory
    Patent number: 11532667
    Abstract: Provided are a magnetic stacked film that is capable of improving a write efficiency, and a magnetic memory element and a magnetic memory using the magnetic stacked film. A magnetic stacked film 1 is a stacked film for a magnetic memory element 100, and includes: a heavy metal layer 2 that contains ? phase W1-xTax (0.00<x?0.30); and a recording layer 10 that includes a ferromagnetic layer 18 having a reversible magnetization direction and is adjacent to the heavy metal layer 2, in which a thickness of the heavy metal layer 2 is 2 nm or more and 8 nm or less.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: December 20, 2022
    Assignee: TOHOKU UNIVERSITY
    Inventors: Yoshiaki Saito, Shoji Ikeda, Hideo Sato, Tetsuo Endoh
  • Noninvasive neural stimulation through audio
    Patent number: 11532298
    Abstract: First data comprising a first range of audio frequencies is received. The first range of audio frequencies corresponds to a predetermined cochlear region of a listener. Second data comprising a second range of audio frequencies is also received. Third data comprising a first modulated range of audio frequencies is acquired. The third data is acquired by modulating the first range of audio frequencies according to a stimulation protocol that is configured to provide neural stimulation of a brain of the listener. The second data and the third data are arranged to generate an audio composition from the second data and the third data.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: December 20, 2022
    Assignee: BrainFM, Inc.
    Inventor: Adam Hewett
  • Method for programming memory
    Patent number: 11527289
    Abstract: A method includes setting a current level of a write signal to a first non-zero value for a first period of time. The write signal is provided to a memory element during the first period of time. The current level of the write signal is adjusted from the first non-zero value to a second non-zero value, different from the first non-zero value, for a second period of time. The write signal is provided to the memory element during the second period of time. The current level of the write signal is adjusted from the second non-zero value to a third value, different from the first non-zero value and different from the second non-zero value, for a third period of time. The write signal is provided to the memory element during the third period of time.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: December 13, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: I-Che Lee, Huai-Ying Huang
  • Tissue property estimation with ultrasound medical imaging
    Patent number: 11523774
    Abstract: For tissue property estimation with ultrasound, multiple different types of measurements are performed by an ultrasound system, including scatter measurements and shear wave propagation measurements. The tissue property, such as liver fat fraction, is estimated using a combination of these different types of measurements.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: December 13, 2022
    Assignee: Siemens Medical Solutions USA, Inc.
    Inventors: Yassin Labyed, Andrzej Milkowski
  • Memory apparatus and method of operation using state bit-scan dependent ramp rate for peak current reduction during program operation
    Patent number: 11521686
    Abstract: A memory apparatus and method of operation is provided. The apparatus includes memory cells connected to word lines and bit lines and configured to retain a threshold voltage corresponding to one of a plurality of data states following a program operation. A control circuit is coupled to the word lines and the bit lines. The control circuit is configured to count a bit-scan quantity of the memory cells during a bit-scan of the program operation. The control circuit determines whether the bit-scan quantity of the plurality of memory cells is greater than at least one predetermined bit-scan threshold. In response to the bit-scan quantity of the memory cells being greater than the at least one predetermined bit-scan threshold, the control circuit is configured to adjust a word line ramp rate of a word line voltage applied to the word lines during the program operation.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: December 6, 2022
    Assignee: SanDisk Technologies LLC
    Inventors: Yu-Chung Lien, Hua-Ling Hsu, Huai-Yuan Tseng, Fanglin Zhang
  • Analog neuromorphic circuit implemented using resistive memories
    Patent number: 11521054
    Abstract: An analog neuromorphic circuit is disclosed, having input voltages applied to a plurality of inputs of the analog neuromorphic circuit. The circuit also includes a plurality of resistive memories that provide a resistance to each input voltage applied to each of the inputs so that each input voltage is multiplied in parallel by the corresponding resistance of each corresponding resistive memory to generate a corresponding current for each input voltage and each corresponding current is added in parallel. The circuit also includes at least one output signal that is generated from each of the input voltages multiplied in parallel with each of the corresponding currents for each of the input voltages added in parallel. The multiplying of each input voltage with each corresponding resistance is executed simultaneously with adding each corresponding current for each input voltage.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: December 6, 2022
    Assignee: University of Dayton
    Inventors: Chris Yakopcic, Md Raqibul Hasan, Tarek M. Taha
  • Memory circuit and method of operating same
    Patent number: 11521663
    Abstract: A memory circuit includes a first memory cell on a first layer, a second memory cell on a second layer different from the first layer, a first select transistor on a third layer different from the first layer and the second layer, a first bit line, a second bit line and a first source line. The first bit lines extends in a first direction, and is coupled to the first memory cell, the second memory cell and the first select transistor. The second bit line extends in the first direction, and is coupled to the first select transistor. The first source line extends in the first direction, is coupled to the first memory cell and the second memory cell, and is separated from the first bit line in a second direction different from the first direction.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: December 6, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Ching Liu, Chia-En Huang, Yih Wang
  • Multi-resistance MRAM
    Patent number: 11515472
    Abstract: Apparatuses, systems, and methods are disclosed for magnetoresistive random access memory. A magnetic tunnel junction (MTJ) for storing data may include a reference layer. A free layer of an MTJ may be separated from a reference layer by a barrier layer. A free layer may be configured such that one or more resistance states for an MTJ correspond to one or more positions of a magnetic domain wall within the free layer. A domain stabilization layer may be coupled to a portion of a free layer, and may be configured to prevent migration of a domain wall into the portion of the free layer.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: November 29, 2022
    Assignee: SanDisk Technologies LLC
    Inventors: Young-Suk Choi, Won Ho Choi