Abstract: Abuse of a content-sharing service is detected by an arrangement in which an in-memory cache is distributed among a plurality of nodes, such as front-end web servers, and which caches each item accessed by users of the service as a single instance in the distributed cache. Associated with each cached item is a unit of metadata which functions as a counter that is automatically incremented each time the item is served from the distributed cache. Because abusive items often tend to become quickly popular for downloading, when the counter exceeds a predetermined threshold over a given time interval, it is indicative of an access rate that makes the item a candidate for being deemed abusive. A reference to the item and its access count are responsively written to a persistent store such as a log file or database.

Abstract: A system and method for searching a mapping table of a flash memory is provided. The system includes at least one random access memory for storing the mapping table retrieved from the flash memory and at least one search engine for searching for data from the mapping table stored in the at least one random access memory using dedicated hardware. Thus, the search efficiency for the mapping table and system performance may be increased.

Abstract: This invention generally provides a method for speeding up system boot time, by initializing a subset of memory during the system firmware test/initialization, and allowing the system to boot an operating system with this subset of installed memory. While the system is completing the operating system boot with the subset of installed memory, a remainder of the installed system memory is being initialized/tested. When the initialization the remainder of system memory is completed (and after the OS has booted), the SMI handler is invoked. The SMI handler then simulates a physical memory “Hot Add” event, and reports the event to the OS. This allows much of the memory initialization/test activity to occur in parallel with the firmware initialization/test and operating system startup processes.

Abstract: A memory management unit includes a translation lookaside buffer including a page table. The page table includes M entries where M is an integer greater than zero. A register interface selects one of the M entries. The translation lookaside buffer calculates an effective address based on the selected one of the M entries while at least one of mapping the selected one of the M entries to an index and selecting a set of the M entries based on a control signal.

Abstract: A method, apparatus, and computer for identifying selection of a bad victim during victim selection at a cache and recovering from such bad victim selection without causing the system to crash or suspend forward progress of the victim selection process. Among the bad victim selection addressed are recovery from selection of a deleted member and recovery from use of LRU state bits that do not map to a member within the congruence class. When LRU victim selection logic generates an output vector identifying a victim, the output vector is checked to ensure that it is a valid vector (non-null) and that it is not pointing to a deleted member. When the output vector is not valid or points to a deleted member, the LRU victim selection logic is triggered to re-start the victim selection process.

Abstract: A multiprocessing system includes, in part, a multitude of processing units each in direct communication with a bus, a multitude of memory units in direct communication with the bus, and at least one shared memory not in direct communication with the bus but directly accessible to the plurality of processing units. The shared memory may be a cache memory that stores instructions and/or data. The shared memory includes a multitude of banks, a first subset of which may store data and a second subset of which may store instructions. A conflict detection block resolves access conflicts to each of the of the banks in accordance with a number of address bits and a predefined arbitration scheme. The conflict detection block provides each of the processing units with sequential access to the banks during consecutive cycles of a clock signal.

Abstract: A transaction log for flash recovery includes a chained sequence of blocks specifying the operations that have been performed, such as a write to a sector or an erase to a block. Checkpoints are performed writing the entire flash state to flash. Once a checkpoint is performed, all of the log entries prior to the checkpoint are deleted and the log processing on recovery begins with the latest checkpoint. If the system is able to safely shutdown, then a checkpoint may be performed before the driver unloads, and on initialization, the entire persisted flash state may be loaded into the flash memory with a minimal amount of flash scanning. If a power failure occurs during system operation, then on the next boot-up, only the sectors or blocks specified in the log entries after the latest checkpoint have to be scanned, rather than all the sectors on the part.

Abstract: Embodiments that facilitate type checking of assembly language instructions are disclosed. In one embodiment, a method includes receiving a low level language instruction in a memory. The instruction includes a word having a first type. The memory includes either a stack or a heap. Each of the stack or heap includes a plurality of positions. The method also includes labeling the plurality of positions in one of the stack or the heap as one or more specified positions and one or more unspecified positions. The method further includes assigning a second type to the memory, the second type including the first type of the word. The word is stored in a specified position or an unspecified position. The method additionally includes determining whether the instruction is well-typed by applying one or more rules to the instruction and to the second type.

Abstract: A method for controlling a switch apparatus connected to a first and a second storage apparatus, and a host, the switch apparatus managing a virtual storage area maintained by the first and second storage apparatuses, the host accessible to the virtual storage area by transmitting a command for identifying a subarea of the virtual storage area, the second storage apparatus allowable to an access faster than the first storage apparatus does, the method includes: receiving a command; determining which of the first and second storage apparatuses maintains the subarea to be accessed; accessing the subarea corresponding to the command; detecting a frequency of access to each of the subareas; and moving data stored in the first storage apparatus and having higher frequency of access than data stored in the second storage apparatus into the subareas maintained in the second storage apparatus.

Abstract: A method of breaking a redundant array of independent disks level 1 (RAID 1 ) for preservation of data integrity is disclosed. In one embodiment, a method for breaking a RAID 1 to preserve data integrity of the RAID 1 includes breaking a redundancy of the RAID 1 when a size of data stored in the RAID 1 exceeds a storage capacity of the RAID 1, where the RAID 1 includes a first disk and a second disk mirroring the first disk. Further, the method includes writing a portion of the data exceeding the storage capacity of the RAID 1 to the second disk, and restoring the redundancy of the RAID 1 by using two additional disks implemented to the RAID 1.

Abstract: An MFP that is configured to receive instruction sets for processing documents, such as workflows, from a portable memory device. The MFP may be part of a larger network computer system and may also be able to receive workflows for processing documents from other components of the system in addition to the portable memory device. The portable memory device may comprise a memory stick, or any other portable electronic device that has memory functionality. The system may also be able to filter files on the portable memory device so that the MFP only receives workflow files related to processing documents.

Abstract: A system includes a first device and one or more second devices that each provides a user with usage information for using target information, based on control information, wherein the first device has a memory that stores the control information which contains device information and condition information, so as to be associated with the target information, a receiving unit that receives from a requester a request, an inquiry unit that inquires of the second device, when the requester is not managed by its own device, about whether the requester is managed by the device, and a providing unit that provides the requester, when, based on a response to the inquiry and the memory, the requester is managed by the second device designated by the device information, with the usage information, based on the condition information, and the second device has a response unit that sends the response to the inquiry.

Abstract: A secure memory access system and method for providing secure access to Hyper Management Mode memory ranges is presented.

Abstract: An embodiment of the present invention is directed to a method of deterministic collision detection involving at least two ports. The method includes receiving a read/write operation at a first data rate at a first port of a multi-port device, receiving a read/write operation at a second data rate at a second port of the multi-port device, detecting a collision between the first port and the second port if a same address space is accessed by the first port and the second port coincidentally, asserting a busy signal at least one of said first port and said second port a number of clock cycles after detecting said collision, storing an address location of said address space in a memory register, and deterministically report the collision using the address location and the number of clock cycles.

Abstract: A processor having a multithreading memory system, including a main memory element, at least one special memory element and a controller. The main memory element may be configured to receive a data signal and a control signal. The at least one special memory element may be associated with the main memory element. Further, the special memory element may be configured to receive an output signal from the main memory element. The controller may be configured to receive an output signal from the at least one special memory element and a scan input signal. Further, the controller may be further configured to select one of the output signal from the at least one special memory element and the scan input signal based on an advance thread signal. The selected one of the output signal from the at least one special memory element and the scan input signal may be forwarded to the main memory element as the control signal.

Abstract: A hard disk system state monitoring method is provided. The hard disk system state monitoring method is to monitor the state of a hard disk system. The hard disk system comprises a backplane, an expander and a plurality of hard disks adapted in the device slots of the backplane. The hard disk system state monitoring method comprises the steps of: retrieving a logic and physical address mapping table from the expander; retrieving a physical address and device slot number mapping table; generating a logical address and device slot number mapping table according to the logic and physical address mapping table and physical address and device slot number mapping table; receiving a plurality of hard disk instant state signals; and establishing a hard disk system state database according to the logical address and device slot number mapping table and the hard disk instant state signals.

Abstract: In one embodiment of the present invention, a memory device is disclosed to include memory organized into blocks, each block having a status associated therewith and all of the blocks of the nonvolatile memory having collectively a capacity status associated therewith and a display for showing the capacity status even when no power is being applied to the display.

Abstract: A memory management system includes a memory controller module configured to receive a frame of data. The frame of data includes a plurality of data words that generate boundary indicators based on at least one of a start of the frame and an end of the frame. The plurality of data words inserts the boundary indicators into the frame of data. The memory is configured to store the frame of data, including the data words and the boundary indicators, during transmission of the frame of data between a host and a storage device.

Abstract: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design to reduce the number of memory directory updates during block replacement in a system having a directory-based cache is provided. The design structure may be implemented to utilize a read/write bit to determine the accessibility of a cache line and limit memory directory updates during block replacement to regions that are determined to be readable and writable by multiple processors.

Abstract: A method for exchanging data between a producer and a consumer is provided. The method includes writing the data with the producer without blocking the consumer and without waiting for access to the consumer. The method also includes reading the data with the consumer without blocking the producer and without waiting for access to the producer. The data is exchanged from the producer to the consumer upon reading the data.