Abstract: A method and system for allocating memory to a memory operation executed by a processor in a computer arrangement having a first processor configured for unified operation with a second processor. The method includes receiving a memory operation from a processor and mapping the memory operation to one of a plurality of memory heaps. The mapping produces a mapping result. The method also includes providing the mapping result to the processor.

Abstract: A method for managing data using a number of non-volatile memory arrays is described. The method includes writing data from a volatile memory region to a first non-volatile memory array. The method also includes writing a remaining portion of the data from the volatile memory region to a second non-volatile memory array in response to detecting that an event has occurred. The second non-volatile memory array has a lower write latency than the first non-volatile memory array.

Abstract: In one example in accordance with the present disclosure, a system may comprise a memory accessor to access a memory and a pointer loader to load a virtual address (VA) pointer corresponding to a first location in the memory and a physical address (PA) pointer corresponding to the VA pointer. The system may comprise a pointer handler to determine a first physical address in the memory mapped to the first location in the memory and a location matcher to determine whether the second physical address mapped to the PA pointer matches the first physical address. The system may also comprise an exception handler to raise an exception when the second physical address does not match the first physical address.

Abstract: A method, non-transitory computer readable medium, and device that assists with reducing initialization duration and performance impact during configuration of storage drives includes identifying a plurality of new storage drives in a storage system. Next, one or more zeroed out storage drives is identified from the identified plurality of new storage drives based on information present in a data portion of each the identified plurality of new storage drives. A volume group comprising the identified one or more zeroed out drives is created and this created volume group is provided for data operation.

Abstract: The systems described herein are configured to enhance the efficiency of memory in a host file system with respect to hosted virtual file systems. In situations when the hosted virtual file systems use smaller file block sizes than the file block sizes of the host file system. During storage of a file, a file block is assigned a block address and unmapping bits. The block address and unmapping bits are stored in a pointer block or other similar data structure associated with the file. Particularly, the block address is stored in a first address block and the unmapping bits are stored in at least one additional address block located in proximity to the block address, such that the unmap granularity of the file is not limited by the fixed size of address blocks in the system.

Abstract: A method includes detecting triggering of establishing a data access optimization protocol for at least a portion of a dispersed storage network (DSN). The establishing the data access optimization protocol includes determining an error rate parameter based on subscription data regarding the at least a portion of the DSN, determining system error rate of the at least a portion of the DSN, and establishing a data access threshold plus protocol based on the error rate parameter and the system error rate. The data access threshold plus protocol includes a value greater than a threshold number. When the data access optimization protocol is established, the method further includes generating a set of data access requests for the set of encoded data slices in accordance with the data access optimization protocol, and sending the set of data access requests to a set of storage units affiliated with the at least a portion of the DSN.

Abstract: A method of controlling a nonvolatile memory device includes: receiving a plurality of logical pages associated with a plurality of physical addresses, respectively; storing the plurality of logical pages at the plurality of physical addresses in a selected one of a plurality of sub-clusters according to a given order of logical addresses of the logical pages; generating a first table including an entry for each one of the ordered logical addresses identifying a cluster of the selected sub-cluster and an offset into the selected sub-cluster; and generating a second table including an entry for the selected sub-cluster and the cluster indicating one of the ordered logical addresses associated with a first physical page of the selected sub-cluster.

Abstract: A system for managing cache utilization includes a processor core, a lower-level cache, and a higher-level cache. In response to activating the higher-level cache, the system counts lower-level cache victims evicted from the lower-level cache. While a count of the lower-level cache victims is not greater than a threshold number, the system transfers each lower-level cache victim to a system memory without storing the lower-level cache victim to the higher-level cache. When the count of the lower-level cache victims is greater than the threshold number, the system writes each lower-level cache victim to the higher-level cache. In this manner, if the higher-level cache is deactivated before the threshold number of lower-level cache victims is reached, the higher-level cache is empty and thus may be deactivated without flushing.

Abstract: A system comprises a number of master devices and an interconnect for managing coherency between the master devices. In response to a read-with-overridable-invalidate transaction received by the interconnect from a requesting master device requesting that target data associated with a target address is provided to the requesting master device, when target data associated with the target address is stored by a cache, the interconnect issues a snoop request to said cache triggering invalidation of the target data from the cache except when the interconnect or cache determines to override the invalidation and retain the target data in the cache. This enables greater efficiency in cache usage since data which the requesting master considers is unlikely to be needed again can be invalidated from caches located outside the master device itself.

Abstract: Example implementations relate to command source verification. An example device can include instructions executable to send a command via a predefined path to a predefined location within a memory resource storing instructions executable to verify a source of the command using a predefined protocol and execute the command in response to the source verification.

Abstract: A method for authorizing I/O (input/output) commands in a storage cluster is provided. The method includes generating a token responsive to an authority initiating an I/O command, wherein the token is specific to assignment of the authority and a storage node of the storage cluster. The method includes verifying the I/O command using the token, wherein the token includes a signature confirming validity of the token and wherein the token is revocable.

Abstract: Two or more read modes of a data storage system and device are defined. The data storage device is capable of concurrently reading from two or more tracks using two or more read transducers. The read modes utilize different numbers of the two or more read transducers while reading data. The read modes are selected based on an operating condition of the data storage system or device.

Abstract: A control device of the present invention includes: a storage part which retains a storage device list including an operation performance of each storage device and a power consumption corresponding to the operation performance; and a configuration determination part which, on the basis of the storage device list, determines a storage device combination configuration realizing the minimum power consumption of the whole logical volume formed of a combination of storage devices when the logical volume operates under a set operation performance condition.

Abstract: One potential result of differing characteristics for certain two-terminal memory (TTM) is that memory management techniques, such as logical-to-physical (L2P), can differ as well. Previous memory management techniques do not adequately leverage the advantages associated with TTM. For example, by identifying and leveraging certain advantageous characteristics of TTM, L2P tables can be designed to be smaller and more efficient. Moreover, other memory management operations such as wear-leveling, recovery from power loss, and so forth, can be more efficient.

Abstract: A primary write request that is to modify a primary portion of primary data stored in a primary storage node is received. The primary write request is to be replicated to create a current secondary write request. The current secondary write request is to modify a current secondary portion of secondary data that is stored in a secondary storage node. A current data range of the current secondary portion is determined. A determination is made of whether a previous secondary write request is in process of modifying a previous data range that at least partially overlaps with a current data range of the current secondary portion. Execution of the primary write request is suspended, until the previous secondary write request has completed updating the secondary storage node.

Abstract: A dynamic random access memory (DRAM) processing unit (DPU) may include at least one computing cell array having a plurality of DRAM-based computing cells arranged in an array having at least one column in which the at least one column may include at least three rows of DRAM-based computing cells configured to provide a logic function that operates on a first and a second row of the at least three rows and configured to store a result of the logic function in a third row of the at least three rows; and a controller that may be coupled to the at least one computing cell array to configure the at least one computing cell array to perform a DPU operation.

Abstract: The present disclosure relates to protecting computer systems from installation of rogue shared libraries when executable files are launched. An example method generally includes detecting that a downloaded file has been written to an insecure location on the computing device. A computing device determines that the downloaded file includes at least a first executable component and, upon determining that the downloaded file includes executable components, generates a copy of the executable component in a protected repository on the computing device. The computing device overwrites the contents of the executable component with at least instructions to launch the copy of the downloaded file from the protected repository.

Abstract: Systems, apparatuses, and methods for selecting default page sizes in a variable page size translation lookaside buffer (TLB) are disclosed. In one embodiment, a system includes at least one processor, a memory subsystem, and a first TLB. The first TLB is configured to allocate a first entry for a first request responsive to detecting a miss for the first request in the first TLB. Prior to determining a page size targeted by the first request, the first TLB specifies, in the first entry, that the first request targets a page of a first page size. Responsive to determining that the first request actually targets a second page size, the first TLB reissues the first request with an indication that the first request targets the second page size. On the reissue, the first TLB allocates a second entry and specifies the second page size for the first request.

Abstract: The examples described herein discuss various systems, software, devices, and methods for managing a primary command queue by ordering and/or reordering and distributing incoming commands based, at least in part, on positional information of one or more components of data storage devices. More specifically, in some embodiments, the examples discussed herein describe ordering and distributing incoming commands from a primary command queue in a position-aware manner that takes into account disk rotation (e.g., rotational position) and/or actuator head location for the various data storage devices of a data storage system enclosure. Among other benefits, ordering incoming commands at the primary command queue and distributing the ordered commands to individual device queues improves overall command execution latency.

Abstract: A compare and swap transaction can be issued by a master device to request a processing unit to select whether to write a swap data value to a storage location corresponding to a target address in dependence on whether a compare data value matches a target data value read from the storage location. The compare and swap data values are transported within a data field of the compare and swap transaction. The compare data value is packed into a first region of the data field in dependence of an offset portion of the target address and having a position within the data field corresponding to the position of the target data value within the storage location. This reduces latency and circuitry required at the processing unit for handling the compare and swap transaction.