Abstract: A system and method for a package including a wire bond wall to reduce coupling is presented. The package includes a substrate, and a first circuit on the substrate. The first circuit includes a first electrical device, a second electrical device, and a first wire bond array interconnecting the first electrical device and the second electrical device. The package includes a second circuit on the substrate adjacent to the first circuit, the second circuit includes a second wire bond array interconnecting a third electrical device and a fourth electrical device. The package includes a wire bond wall including a plurality of wire bonds over the substrate between the first circuit and the second circuit. The wire bond wall is configured to reduce an electromagnetic coupling between the first circuit and the second circuit during an operation of at least one of the first circuit and the second circuit.

Abstract: A power amplification module includes a first transistor which amplifies and outputs a radio frequency signal input to its base; a current source which outputs a control current; a second transistor connected to an output of the current source, a first current from the control current input to its collector, a control voltage generation circuit connected to the output and which generates a control voltage according to a second current from the control current; a first FET, the drain being supplied with a supply voltage, the source being connected to the base of the first transistor, and the gate being supplied with the control voltage; and a second FET, the drain being supplied with the supply voltage, the source being connected to the base of the second transistor, and the gate being supplied with the control voltage.

Abstract: A device includes an amplifier stage, a source follower, a resistive device, and a transistor. The source follower has an input terminal electrically coupled to an internal node of the amplifier stage, and an output terminal electrically coupled to an input terminal of the amplifier stage and an output terminal of the device. The resistive device has a first terminal electrically coupled to the output terminal of the device. The transistor is electrically coupled to a second terminal of the resistive device and the amplifier stage.

Abstract: A device has at least two current mode logarithmic amplifiers having currents as their inputs, and multiplexing logic electrically connected to outputs of the current mode logarithmic amplifiers to select one of the current mode amplifiers to produce an output signal.

Abstract: Thermal levels in an inductor of a boost converter may be managed by controlling an average current through the inductor. For example, a switching frequency of the boost converter between charging and discharging the inductor may be increased or decreased. Increasing or decreasing the switching frequency results in a corresponding decrease or increase in the switching period for the boost converter. The controller may adjust the switching frequency to control the average current level while maintaining a peak-to-peak current level in the inductor by monitoring the inductance of the inductor and the peak current level in the inductor.

Abstract: This application discloses correction circuitry for correcting a phase distortion in an amplification circuit by measuring an amplitude distortion and controlling a phase shifting component based upon the measured amplitude distortion. In one embodiment, a first amplitude distortion sensor is coupled to a first node of an amplification circuit, and a first phase shifter is coupled to a second node of the amplification circuit. Additionally, a first control circuit is coupled to the first amplitude sensor and to the first phase shifter. The first control circuit is configured to correlate a first amplitude distortion measured by the first amplitude distortion sensor to a first inferred phase distortion, and to generate a first phase correction signal based upon the first inferred phase distortion, and is configured to send the first phase correction signal towards the first phase shifter.

Abstract: A device may be associated with a power source. The device may include a charge pump configured to output a pulse-width modulated voltage based upon an input voltage from the power source, with the pulse-width modulated voltage varying between a first voltage and a second voltage. The device may also include a low-pass filter comprising an output capacitor, with the output capacitor being configured to average the pulsed-width modulated voltage and to output a filtered voltage having a value different than that of the input voltage. The device may further include a controller configured to selectively decouple the charge pump from the power source when a load imposed on the low-pass filter is below a threshold load.

Abstract: Systems, methods, and apparatus are disclosed for wideband power amplification in a platform, such as an airplane. An amplifier module may include a first amplification stage. The first amplification stage may comprise a first plurality of amplification circuits. The amplifier module may also include a first plurality of couplers configured to couple an input port to each amplification circuit of the first amplification stage. The amplifier module may include a second amplification stage comprising a second plurality of amplification circuits. The amplifier module may also include a second plurality of couplers configured to couple the first amplification stage to the second amplification stage. The amplifier module may include a third plurality of couplers configured to combine an output of each amplification circuit of the second plurality of amplification circuits into an output signal. The third plurality of couplers may comprise one or more Lange couplers.

Abstract: A multi-way Doherty power amplifier, DPA, is disclosed, comprising a first path comprising a carrier amplifier or at least one carrier amplifier segment partitioned from the carrier amplifier; a second to N-th paths each comprising at least one carrier amplifier segment and/or at least one peaking amplifier segment partitioned from a peaking amplifier; and a power splitter for splitting an input power signal to each of the at least one carrier amplifier segment and/or at least one peaking amplifier segment in a same path, wherein N is an integer not less than 2; a signal preparation unit configured for generating separately input power signal for the first path and each of the second path to N-th paths; and an impedance inverting network configured for combining output signal power from each path. The performance of each amplifier cell can be maximized independently without any compromises made for each other.

Abstract: A power switch 307a is provided between a bias generation circuit 301 and a high potential power source, or a power switch 307b is provided between the bias generation circuit 301 and a low potential power source. A bias potential Vb output from the bias generation circuit 301 is held by a potential holding circuit 300. The bias potential Vb held by the potential holding circuit 300 is input to a bias generation circuit 301a, and a bias potential Vb2 output from the bias generation circuit 301a on which an input signal IN is superimposed is input to an amplifier circuit 302. The potential holding circuit 300 is constituted of a capacitor 306 and a switch 305 formed of, for example, a transistor with a low off-state current that is formed using a wide band gap oxide semiconductor. Structures other than the above structure are claimed.

Abstract: A power amplifier includes an amplification transistor which performs power amplification, a bias circuit which outputs a bias voltage to a base of the amplification transistor, a control terminal to which a control voltage is applied for controlling switching between an operating state and a stopping state of the bias circuit, and a bias voltage adjustment circuit connected to the control terminal. The bias voltage adjustment circuit includes a variable capacitance element which is connected to the control terminal and whose capacitance value decreases as the control voltage increases, a discharge circuit which discharges electric charge accumulated in the variable capacitance element to the control terminal, and a control circuit which is connected to the bias circuit and controls the bias voltage. The bias voltage adjustment circuit outputs, to the bias circuit, a bias voltage adjustment signal which increases the bias voltage for a predetermined period after the control voltage is applied.

Abstract: A hybrid, translinear amplifier has at least one gain stage including first and second gain transistors, at least a first load transistor electrically coupled to the first gain transistor and at least a second load transistor electrically coupled to the second gain transistor, and load resistors electrically coupled to the load transistors. A hybrid, translinear amplifier with selectable gain has a first hybrid, translinear amplifier cell having at least first and second load transistors, each load transistor having a load resistor, at least one additional hybrid, translinear amplifier cell having at least third, fourth, fifth and sixth load transistors, each load transistor having a load resistor, at least two switches electrically coupled to the amplifier cells to allow selection of one of the amplifier cells, and a differential output signal having a gain corresponding to a selected amplifier cell.

Abstract: An apparatus includes a first path tuned to a first frequency band and a second path tuned to a second frequency band. The apparatus also includes cross-coupled circuitry having a first input coupled to the first path and a second input coupled to the second path and having a first output coupled to the second path and a second output coupled to the first path.

Abstract: A high-frequency amplifier circuit (10) includes a high-frequency amplifying element (11), a bias circuit (12), and a bias adjusting circuit (13). The high-frequency amplifying element (11) includes an input end and an output end. The bias circuit (12) is connected to the high-frequency amplifying element (11) and supplies a first bias voltage to an input side of the high-frequency amplifying element (11). The bias adjusting circuit (13) is connected between the input end and the bias circuit (12) and adjusts the first bias voltage based on a high-frequency signal inputted to the input end. The bias adjusting circuit (13) includes a lumped element and an active element.

Abstract: A Doherty amplifier is disclosed, being adapted to receive an RF input signal and to output an RF output signal and comprising a main amplifier and a peak amplifier, each comprising: a first amplifier (T1, T1?) and a second amplifier (T2, T2?), each amplifier having a respective input terminal and a respective output terminal, the first amplifier and the second amplifier being adapted to amplify a respective input signal derived from the RF input signal and received at the respective input terminal and to deliver a first output signal and a second output signal, respectively; a first phase shifter (14, 14?) and a second phase shifter (15, 15?) coupled to the output terminal of the first amplifier and to the output terminal of the second amplifier, respectively; a third phase shifter (16, 16?); and a fourth phase shifter (17, 17?); wherein the Doherty amplifier further comprises a first combining node (A) and a second combining node (B) and, wherein each third phase shifter is coupled between the respective fi

Abstract: A method, apparatus, and computer program for modeling mathematically an effect of a plurality of factors on signal distortion caused by a non-linear amplifier are provided. First, there is computed a global model which incorporates a combined effect of the plurality of factors on signal distortion caused by the non-linear amplifier. Before applying the pre-distorted transmission signal to the non-linear amplifier, a transmission signal is pre-distorted with coefficients derived from the global model thus compensating for the signal distortion caused by the non-linear amplifier.

Abstract: Apparatus and methods for biasing power amplifiers are disclosed herein. In certain implementations, a power amplifier system includes a power amplifier and a bias circuit that generates a bias voltage for biasing the power amplifier. The bias circuit includes an amplifier, a current source for generating a reference current, and a reference transistor having a current therethrough that changes in relation to the bias voltage. The amplifier can control the bias voltage based on an error current corresponding to a difference between the reference current and the current through the reference transistor. The amplifier can be used to control the bias voltage such that the reference current and the current through the reference transistor are substantially equal.

Abstract: An output stage circuit is provided, which includes a power supply, a quiescent current control circuit, an output circuit, and a quiescent current equalization circuit. The quiescent current equalization circuit is configured to decrease or increase a quiescent current flowing through a quiescent current biasing circuit in the quiescent current control circuit when a change of a voltage of the power supply is detected, such that a quiescent current flowing through the output circuit remains constant. A quiescent current equalization method, a Class AB amplifier and an electronic device are also provided. When the voltage of the power supply is increased, the quiescent current of the output circuit of the output stage circuit can maintain constant. As such, the power supply rejection ratio (PSRR) of the output circuit can be efficiently increased and the power consumption of the device can be reduced.

Abstract: Methods, systems, and apparatuses for detecting and suppressing analog error in an output stage of a digital class-D amplifier are described. In embodiments, the digital class-D amplifier includes a PWM stage, an output stage, and a feedback circuit. The PWM stage receives the signal difference between an input digital signal and a feedback digital signal, generates a digital pulse-width modulated (PWM) signal based thereon, and provides the digital PWM signal as a first component of the digital feedback signal. The output stage receives the digital PWM signal and generates an analog output signal for driving a load responsive to the digital PWM signal. The feedback circuit combines an analog representation of the PWM signal and the analog output signal to generate a second component of the digital feedback signal.

Abstract: The present invention provides a power amplifier that can reduce irregularities in characteristics such as gains. A high-frequency power amplifier that is used for a mobile communication terminal includes: an amplifier element that includes a composite semiconductor bipolar transistor and that amplifies high-frequency power of a predetermined frequency band with a bias voltage and a bias current supplied thereto; a bias circuit that supplies the bias voltage and the bias current to the amplifier element on the basis of a bias reference voltage; a bias reference voltage supply circuit that generates and supplies the bias reference voltage to the bias circuit; and a bias reference voltage control unit that controls the bias reference voltage supply circuit so as to generate the bias reference voltage of a voltage corresponding to a given signal.