Patents Examined by Hieu Nguyen
  • Patent number: 9336954
    Abstract: An amplifier provides a first amplifier circuit (16), a second amplifier circuit (17), a first hybrid-coupler circuit (18) and a termination (3). The hybrid-coupler circuit (18) provides an output terminal (13) and an insulation terminal (12). In this context, the termination (3) is connected to the insulation terminal (12) of the hybrid-coupler circuit (18). The termination (3) comprises a first capacitor (34) and/or an inductance (35), which is disposed directly at the insulation terminal (12) of the hybrid-coupler circuit (18).
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: May 10, 2016
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventor: Lothar Schenk
  • Patent number: 9337781
    Abstract: The augmented twin nonlinear two-box modeling and predistortion method for power amplifiers and transmitters provides power amplifier distortion modeling and predistortion linearization. A memoryless nonlinearity is combined with a memory polynomial function that includes cross-terms. The method can utilize an augmented forward twin-nonlinear two-box model, an augmented reverse twin-nonlinear two-box model, or alternatively, an augmented parallel twin-nonlinear two-box model. The present two-box models are validated in modeling and predistortion applications. Measurement results demonstrate the superiority of the present two-box models with respect to conventional state of the art models. The present two-box models lead to better accuracy with reduced complexity.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: May 10, 2016
    Assignee: KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS
    Inventor: Oualid Hammi
  • Patent number: 9337792
    Abstract: A multistage amplifier may include a multistage amplifier circuit and a resistive voltage divider network. The multistage amplifier circuit may have multiple transconductance input stages, each of which may have differential inputs and an adjustable tail current input that controls the amount of the transconductance of the input stage. The resistive voltage divider network may control the closed loop gain of the multistage amplifier circuit and include multiple resistors that provide different voltage divider ratios at different points. Each point may be connected to one of the transconductance input stages. Adjustment of tail currents at the tail current inputs may control the degree to which each point affects the closed loop gain of the multistage amplifier.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: May 10, 2016
    Assignee: LINEAR TECHNOLOGY CORPORATION
    Inventor: Xiaoqiang Shou
  • Patent number: 9331639
    Abstract: It is possible to increase linearity in a power amplification circuit. A power amplification circuit includes a first amplification element which amplifies and outputs an input signal with a gain according to the level of the input signal and the level of a bias voltage, a second amplification element which has the same gain characteristic as the first amplification element and amplifies and outputs the input signal, and a variable bias voltage generation circuit which generates a bias voltage decreasing with an increase in level of an output signal of the second amplification element.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: May 3, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 9331637
    Abstract: Methods and apparatus, including computer program products, are provided for hybrid DC-DC converters. In one aspect, there is provided a method. The method may include tracking, by an envelope detector, an envelope of a signal being amplified by an amplifier. The method may further include supplying, by a first direct-current to direct-current converter, power to the amplifier, the power supplied by the first direct-current to direct-current converter including one or more high-frequency components of the envelope tracked by the envelope detector. The method may further include supplying, by a second direct-current to direct-current converter, power to the amplifier, the power supplied by the second direct-current to direct-current converter including one or more low-frequency components of the envelope tracked by the envelope detector. Related systems, apparatuses, and computer program products are also disclosed.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: May 3, 2016
    Assignee: Nokia Technologies Oy
    Inventor: Faizan Ul Haq
  • Patent number: 9319008
    Abstract: A circuit includes a first input terminal for receiving a first pulsed voltage and a second input terminal for receiving a second pulsed voltage. The circuit further includes a load and an LC filter. The LC filter includes a coupled inductor pair that includes a first winding and a second winding magnetically coupled to each other. The first winding is coupled between the first input terminal and the load, and the second winding is coupled between the second input terminal and the load. A frequency of a first current flowing through the first winding is increased by the second pulsed voltage applied to the second winding.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: April 19, 2016
    Assignee: Versatile Power, Inc.
    Inventors: Alexandr Ikriannikov, David Hoffman, Noah A. Wilson
  • Patent number: 9306510
    Abstract: An audio amplifier apparatus and method which has a preamp, active 2-way crossover, solid-state power amplifier, and tube power amplifier. Audio input from a musical instrument enters the preamp where pre-amplification, equalization, and other processes such as limiting or compression take place. Audio leaves the preamp and goes to a crossover, wherein frequencies below a crossover point are sent to a solid-state power amp via a first signal path, and wherein audio frequencies above the crossover point are sent to a tube power amp via a second signal path. Outputs from the solid-state power amp and tube power amp are sent to external or internal loudspeakers.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: April 5, 2016
    Inventor: Jason O. Robling
  • Patent number: 9306511
    Abstract: A system comprises a power amplifier configured to amplify an input signal, a splitter configured to split the amplified input signal into a plurality of output signals, a plurality of filters configured to filter the plurality of output signals, respectively, to produce a plurality of filtered output signals, and a combiner configured to combine the filtered output signals to produce a combined output signal.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: April 5, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Yut Hoong Chow, Wen Hue Chiok, Ray Kooi Tatt Chuah
  • Patent number: 9306515
    Abstract: A power amplifier is provided. The power amplifier comprises a plurality of power amplifier units and a bias unit. The power amplifier units are connected in parallel with each other to receive a differential input signal. The power amplifier units perform a power amplifying so as to output a differential output signal. The bias unit is coupled to the power amplifier units and supplies a plurality of bias signals to the power amplifier units respectively. At least two of the power amplifier units are enable to operate in different class regions in according with the corresponding bias signals.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: April 5, 2016
    Assignee: Shenzhen South Silicon Valley Microelectronics Co. Ltd
    Inventors: Hua-Yu Liao, Cheng-Yu Wang, Ying-Tang Chang
  • Patent number: 9306503
    Abstract: A system for combining power includes a plurality of branches and a secondary winding. The plurality of branches are configured to provide branch power. Each of the branches contribute to the branch power at non-peak power. The secondary winding is configured to combine the branch power from the plurality of branches into an output power.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: April 5, 2016
    Assignee: Intel Corporation
    Inventors: Hongtao Xu, Georgios (Yorgos) Palaskas, Parmoon Seddighrad
  • Patent number: 9298198
    Abstract: A direct current (DC)-DC converter, which includes a parallel amplifier, a radio frequency (RF) trap, and a switching supply, is disclosed. The switching supply includes switching circuitry and a first inductive element. The parallel amplifier has a feedback input and a parallel amplifier output. The switching circuitry has a switching circuitry output. The first inductive element is coupled between the switching circuitry output and the feedback input. The RF trap is coupled between the parallel amplifier output and a ground.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: March 29, 2016
    Assignee: RF Micro Devices, Inc.
    Inventors: Michael R. Kay, Philippe Gorisse, Nadim Khlat, Andrew F. Folkmann, Manbir Singh Nag, Jean-Frederic Chiron
  • Patent number: 9294056
    Abstract: A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: March 22, 2016
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Dan William Nobbe, David Halchin, Jeffrey A. Dykstra, Michael P. Gaynor, David Kovac, Kelly Michael Mekechuk, Gary Frederick Kaatz, Chris Olson
  • Patent number: 9294045
    Abstract: Embodiments of a radio frequency (RF) amplification device having an RF amplification circuit and an amplifier control circuit operably associated with the RF amplification circuit are disclosed. The RF amplification circuit is configured to amplify an RF signal in accordance with a transfer function. The amplifier control circuit includes a closed-loop linearization circuit and a calibration circuit. The closed-loop linearization circuit is configured to be activated so that the transfer function defines a closed-loop response and inactive so that the transfer function defines an open-loop response. For example, the closed-loop linearization circuit may become inactive at small-signal power levels. Accordingly, the amplifier control circuit also includes a calibration circuit configured to reduce a difference between the open-loop response and the closed-loop response of the transfer function.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: March 22, 2016
    Assignee: RF Micro Devices, Inc.
    Inventors: Baker Scott, George Maxim, Dirk Robert Walter Leipold
  • Patent number: 9287838
    Abstract: A high slew rate operational amplifier including an input terminal, an output terminal, and at least one slew-rate enhancing circuit is disclosed. Each slew-rate enhancing circuit includes a first stage enhancing unit and a second stage enhancing unit. The first stage enhancing unit is coupled between the input terminal and the output terminal. The first stage enhancing unit and the second stage enhancing unit are coupled. The slew-rate enhancing circuit has a threshold voltage and the threshold voltage is related to the size of the first stage enhancing unit. When the threshold voltage is driven, the slew-rate enhancing circuit will rapidly start the second stage enhancing unit to perform a slew rate compensation on the high slew rate operational amplifier.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: March 15, 2016
    Assignee: Raydium Semiconductor Corporation
    Inventor: Po-Cheng Lin
  • Patent number: 9281785
    Abstract: A differential cross-coupled common-source or common-emitter low-noise amplifier having capacitive degeneration is disclosed. Further, a radio receiver comprising such a low-noise amplifier is disclosed. Further, a method of controlling switched capacitive networks of an amplifier is disclosed. The method comprises controlling capacitances of the switched degeneration capacitor networks and/or the switched cross-coupling capacitor networks. Further, a computer program for implementing the method is disclosed.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: March 8, 2016
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventor: Henrik Sjöland
  • Patent number: 9276532
    Abstract: A circuit may include one or more transistors connected directly to an output, and an inductance network. The inductance network may connect to a source node of at least one of the transistors, to compensate capacitance of the output. Thus, the response time of the circuit may decrease, and a non-dominant frequency response pole frequency of the circuit may increase.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: March 1, 2016
    Assignee: ANALOG DEVICES, INC.
    Inventors: Ahmed Mohamed Abdelatty Ali, Huseyin Dinc
  • Patent number: 9276535
    Abstract: A transconductance amplifier comprises a set of amplifier stages. The last stage of the amplifier is split with a certain ratio whereby one part is used to deliver output current and other part to deliver feedback current to the input.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: March 1, 2016
    Assignee: NXP B.V.
    Inventors: Jan van Sinderen, Johannes Brekelmans
  • Patent number: 9276534
    Abstract: A circuit may include one or more transistors connected directly to an output, and a biasing network connected to at least one of a substrate, a well, and a back-gate of at least one of the transistors. The biasing network may bias the at least one of the substrate, the well, and the back-gate to a virtual floating bias, such that the virtual floating bias shifts in voltage level based upon an AC input signal of the circuit, to reduce the parasitic capacitance of the output node of the circuit.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: March 1, 2016
    Assignee: ANALOG DEVICES, INC.
    Inventor: Ahmed Mohamed Abdelatty Ali
  • Patent number: 9263994
    Abstract: An amplifying device including: a first amplifier configured to generate a first output signal by amplifying an input signal, a second amplifier configured to generate a second output signal by amplifying the first output signal, and a processor configured to perform a first compensation by compensating a distortion for the second amplifier in accordance with the first output signal and the second output signal.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: February 16, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Nobukazu Fudaba, Hiroyoshi Ishikawa, Yuichi Utsunomiya, Toshio Kawasaki, Kazuo Nagatani
  • Patent number: 9252726
    Abstract: An operational amplifier has two paths, a high frequency path and a low frequency path. In addition, it has three main sections of stages. A stage converts input voltage to an amplified output voltage, a stage converting an input voltage in to an output current and a final stage where the outputs of the two previous sections are supplied as inputs. Among them, the final stage acts as a voltage follower to a signal applied to its plus (+) input and as a transimpedance amplifier for a signal applied to its minus input (?). In this configuration, a path for low frequencies and a path for high frequencies are created in a single operational amplifier.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: February 2, 2016
    Inventor: Takashi Narita