Patents Examined by Hieu P Nguyen
  • Patent number: 10707816
    Abstract: An audio amplifier includes an output stage including a first toroidal transformer with a first pair of secondary windings that are coupled in parallel across an output terminal. The output stage further includes a second toroidal transformer with a second pair of secondary windings that are connected in a series combination that is coupled across the output terminal.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: July 7, 2020
    Assignee: REAL ANALOG, LLC
    Inventor: Rudolph J. Liedtke
  • Patent number: 10707813
    Abstract: A power amplifier and method for operating the same is disclosed. The amplifier includes a number of transistors coupled in series between a power node and a ground node. These transistors include a first transistor having a source terminal coupled to the power node, and a second transistor having its source terminal coupled to a ground node. A subset of transistors is also coupled in series between the first and second transistors. During operation in a first mode, the first and second transistors act as switching transistors, switching according to data received thereby. The subset of transistors, during the first mode, act as cascode transistors. During a second mode of operation, the transistors of the subset act as switching transistors, switching in accordance with the received data.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: July 7, 2020
    Assignee: Apple Inc.
    Inventors: David M. Signoff, Morteza Nick, Anuranjan Jha
  • Patent number: 10707819
    Abstract: Monolithic microwave integrated circuits (MMICs) with phase tuning are disclosed. A MMIC structure may include a MMIC amplifier with electrically coupled input and output lines. The MMIC structure may further include an adjustable cover over the MMIC amplifier that includes at least one portion that can be adjusted closer to or farther away from either the input or output lines. In this manner, a signal capacitance between the adjustable cover and the input or output lines is adjustable, and accordingly, a signal phase of the MMIC structure may be tuned. A spatial power-combining device may include a plurality of amplifier assemblies, wherein each amplifier assembly includes a MMIC amplifier with an adjustable cover. In this manner, the plurality of amplifier assemblies may be phase-tuned to a target value.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: July 7, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Soack Yoon, Ankush Mohan, Dan Denninghoff
  • Patent number: 10707817
    Abstract: According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: July 7, 2020
    Assignees: SPEEDLINK TECHNOLOGY INC., GEORGIA TECH RESEARCH CORPORATION
    Inventors: Min-Yu Huang, Hua Wang, Thomas Chen, Taiyun Chi
  • Patent number: 10707815
    Abstract: An amplifier device includes an amplifying unit, a bias module, an impedance unit and an adjusting module. The amplifying unit has a first end coupled to a voltage source and used for outputting an output signal amplified by the amplifying unit, a second end used for receiving an input signal, and a third end coupled to a first reference potential terminal. The bias module is coupled to the second end of the amplifying unit, and provides a bias voltage to the amplifying unit and adjusts linearity of the amplifier device according to a source voltage from the voltage source. The impedance unit is coupled to the bias module and used to receive a control voltage to adjust an impedance value of the impedance unit. The adjusting module is used to output the control voltage to the impedance unit according to the source voltage and a reference voltage.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: July 7, 2020
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Hung-Chia Lo, Tien-Yun Peng
  • Patent number: 10700651
    Abstract: A wide bandpass filtering power amplifier using discriminating coupling is disclosed, which comprises a DC bias circuit, an input impedance matching circuit, a transistor and an output impedance matching circuit. The DC bias circuit is connected to the input impedance matching circuit which is further connected to the transistor, and the transistor is further connected to the output impedance matching circuit which comprises a tuning microstrip line and a bandpass filter. The complexity and the area of the impedance matching circuit in the power amplifier are effectively reduced. At the same time, the filtering PA has good frequency selectivity by using the discriminating coupling BPF. Meanwhile the work efficiency and bandwidth of the filtering power amplifier are effectively improved by taking both of the extended continuous mode theory and filter synthesis theory into account.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: June 30, 2020
    Assignee: South China University of Technology
    Inventors: Yuanchun Li, Qinchuang Chen, Quan Xue
  • Patent number: 10693421
    Abstract: A power amplification module includes a first transistor which amplifies and outputs a radio frequency signal input to its base; a current source which outputs a control current; a second transistor connected to an output of the current source, a first current from the control current input to its collector, a control voltage generation circuit connected to the output and which generates a control voltage according to a second current from the control current; a first FET, the drain being supplied with a supply voltage, the source being connected to the base of the first transistor, and the gate being supplied with the control voltage; and a second FET, the drain being supplied with the supply voltage, the source being connected to the base of the second transistor, and the gate being supplied with the control voltage.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: June 23, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kenichi Shimamoto, Satoshi Tanaka, Tadashi Matsuoka
  • Patent number: 10693420
    Abstract: A PA power supply, which includes a first ET power supply, power supply control circuitry, a first PMOS switching element, and a second PMOS switching element, is disclosed. During a first operating mode, the power supply control circuitry selects an OFF state of the first PMOS switching element, selects an ON state of the second PMOS switching element, and adjusts a voltage of a first switch control signal to maintain the OFF state of the first PMOS switching element using a voltage at a source of the first PMOS switching element and a voltage at a drain of the first PMOS switching element; the PA power supply provides a first PA power supply signal; and the first ET power supply provides a first ET power supply signal, such that the first PA power supply signal is based on the first ET power supply signal.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: June 23, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Manbir Singh Nag, Michael R. Kay, Philippe Gorisse, Nadim Khlat
  • Patent number: 10693423
    Abstract: A dynamic amplification circuit includes a first drive circuit (310) generates a first driving voltage according to a first control signal and a first driving current; a second drive circuit (320) generates a first driving signal according to the first and a second driving voltage; a third drive circuit (330) generates a second control signal according to the first control signal and the first driving signal; and a dynamic amplifier DA (340) includes a first branch (101) including a first capacitor and a second branch (102) including a second capacitor which are connected by a first resistor (150) and a second resistor (160), an operation state of the DA (340) is controlled through the first and second control signals, a duration of the DA (340) in an amplification phase is proportional to a product of a resistance value of the first resistor and a capacitance value of the first capacitor.
    Type: Grant
    Filed: September 30, 2018
    Date of Patent: June 23, 2020
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventor: Shuo Fan
  • Patent number: 10686410
    Abstract: A rail balancing circuit is described herein for use with a power supply, the RBC comprising: a circuit adapted to respond to over-voltage and under-voltage conditions in the power supply that comprises a positive rail voltage source and a negative rail voltage source, such that any deviation from a balanced condition between the positive rail voltage source and the negative rail voltage source is substantially instantaneously corrected to bring both the positive and negative rail voltage sources back to the balanced condition.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: June 16, 2020
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: 10680557
    Abstract: An apparatus, comprising an input transformer; a first differential transistor pair configured to receive a first back gate bias voltage; a second differential transistor pair configured to receive a second back gate bias voltage; a cross-coupled neutralization cap comprising PMOS or NMOS transistors and configured to receive a third back gate bias voltage; and an output transformer. A method of fixing at least one back gate bias voltage to impart a desired capacitance to the transistors of at least one of the first differential transistor pair, the second differential transistor pair, or the neutralization cap. The apparatus and method may provide a power amplifier having improved linearity and efficiency.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: June 9, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Shafiullah Syed, Abdellatif Bellaouar, Chi Zhang
  • Patent number: 10680563
    Abstract: A multi-stage radio frequency power amplifier (RFPA) includes an output stage SMPA and a driver stage SMPA. As the multi-stage RFPA operates, the magnitude of an RF switch drive signal generated by the driver stage SMPA is dynamically minimized based on I-V characteristic curves of the output stage SMPA's power transistor and the output stage SMPA's dynamically changing load line. By constraining the magnitude of the RF switch drive signal as the multi-stage RFPA operates, VGS feedthrough of the RF switch drive signal is minimized, to the extent possible. Amplitude distortion and phase distortion in the RF output that might occur due to unconstrained VGS feedthrough, particularly at low output RF power levels, are therefore avoided. Operating all stages of the multi-stage RFPA in switch mode also results in high energy efficiency and an output RF spectrum with very low wideband noise (WBN).
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: June 9, 2020
    Assignee: Eridan Communications, Inc.
    Inventors: Earl W McCune, Jr., Quentin Diduck
  • Patent number: 10673393
    Abstract: An amplifier for a receiver circuit is disclosed. The amplifier has an input node (Vin) and an output node (Vout). It comprises a tunable tank circuit connected to the output node (Vout), a feedback circuit path connected between the output node (Vout) and the input node (Vin), and a tunable capacitor connected between an internal node of the feedback circuit path and a reference-voltage node. A receiver circuit and a communication apparatus is disclosed as well.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: June 2, 2020
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (publ)
    Inventor: Fenghao Mu
  • Patent number: 10673394
    Abstract: A power amplifier (PA) cell is coupled to an input signal source an a load, and includes a transistor coupled to the load; a first inductor coupled to a gate of the transistor; and a second inductor coupled to a source of the transistor, wherein the first inductor and the second inductor each includes a first conductive coil and a second conductive coil, respectively, having first and second inductance values, respectively, such that the power cell is coupled to the input signal source without an input impedance matching circuit disposed between the gate of the transistor and the input signal source, and without an output impedance matching circuit disposed between a drain of the transistor and the load.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: June 2, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Jun-De Jin
  • Patent number: 10673395
    Abstract: An amplifier according to an embodiment of the present disclosure includes a first transistor and a first matching circuit. The first matching circuit is connected between an input terminal and a control terminal of the first transistor. A first terminal of the first transistor is connected to a ground. A second terminal of the first transistor is connected to a power supply and an output terminal. The first matching circuit includes a first inductor, a second inductor, and a first switch. The first inductor has an end connected to the control terminal. The second inductor has an end connected to the other end of the first inductor. The first switch is configured to selectively switch between electrical continuity between the input terminal and the other end of the first inductor and electrical continuity between the input terminal and the other end of the second inductor.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: June 2, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Daisuke Watanabe, Ken Wakaki
  • Patent number: 10673392
    Abstract: A digital amplifier includes a pulse-width adjustment circuit that adjusts the pulse width of a digital signal, a switching circuit that amplifies the output signal of the pulse-width adjustment circuit, and a feedback signal generator that generates a feedback signal based on the output signal of the switching circuit.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: June 2, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tsuyoshi Nakahira, Akihiro Nishigaki
  • Patent number: 10673401
    Abstract: An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: June 2, 2020
    Assignee: pSemi Corporation
    Inventors: Emre Ayranci, Miles Sanner
  • Patent number: 10666207
    Abstract: The operative bandwidth of a broadband RF amplifier is improved by using a low-pass type broadband impedance transformer, instead of a broadband matching network, in a multi-stage impedance matching network connected, e.g., to the amplifier input. The multi-stage impedance matching network comprises three stages connected in series. The first stage is a low-pass type broadband impedance transformer that provides broadband fundamental impedances and high reflection for the second harmonics. The second stage is a phase shifter that controls the location of the second harmonic reflection coefficient phases. The third stage is a high-pass input matching circuit that transforms the complex conjugate device input impedance to a real impedance.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: May 26, 2020
    Assignee: Cree, Inc.
    Inventors: Haedong Jang, Richard Wilson, Björn Herrmann, Zulhazmi Mokhti
  • Patent number: 10656006
    Abstract: A sensing system with an AC feedback to the non-signal and non-biased terminal of the transducer. An impedance element, such as two anti-parallel diodes, are provided at the amplifier input, and the amplifier gain is negative and has a size sufficient to ensure that the input on the one terminal does not exceed the forward voltage of the diode.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: May 19, 2020
    Assignee: Sonion Nederland B.V.
    Inventor: Adrianus Maria Lafort
  • Patent number: 10658984
    Abstract: A differential amplifier circuit includes a differential pair including a first field-effect transistor (FET) and a second FET, a first current source that generates a current which flows in the first FET and the second FET, and an output circuit that outputs an output voltage corresponding to a difference between a gate voltage of the first FET and a gate voltage of the second FET in accordance with an operation of the differential pair. A back gate of the first FET is connected to a gate of the first FET, and a back gate of the second FET is connected to a gate of the second FET. A first feedback voltage corresponding to the output voltage is input to the gate of the second FET.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: May 19, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yusuke Shimamune