Abstract: A process for manufacturing an electroluminescent device, comprising: (a) using a stack comprising, successively: a substrate having a surface; matrix arrays of pixels formed on the surface of the substrate, of columnar shape; an encapsulating layer arranged to cover the matrix arrays of pixels; a dielectric layer formed on the encapsulating layer; (b) performing a directional etch along the normal to the surface of the substrate, of a portion of the dielectric layer extending between the pixels of the matrix arrays of pixels; the dielectric layer having a portion remaining at the end of step (b); and (c) performing a selective chemical etch of the remaining portion of the dielectric layer with a chemical etchant that permits selective etching of the remaining portion of the dielectric layer with respect to the encapsulating layer.

Abstract: A semiconductor device includes a p-type nitride semiconductor layer, the p-type nitride semiconductor layer including an Al-containing nitride semiconductor layer and an Al-containing compound layer containing Al and C as main constituent elements and provided on the surface of the Al-containing nitride semiconductor layer.

Abstract: A method for manufacturing a light-emitting element includes: forming a semiconductor structure comprising a light-emitting layer on a first surface of a substrate, wherein the first surface comprising a plurality of protrusions and a second region; dividing the semiconductor structure into a plurality of light-emitting portions by removing a portion of the semiconductor structure so as to form an exposed region of the substrate, wherein the second region is exposed from under the semiconductor structure in the exposed region; bonding a light-transmitting body to a second surface of the substrate that is opposite the first surface so as to form a bonded body, wherein the light-transmitting body comprises a fluorescer; forming a plurality of modified regions along the exposed region; removing a portion of the light-transmitting body that overlaps the plurality of modified regions in a plan view; and singulating the bonded body along the modified regions.

Abstract: A semiconductor light-emitting element includes: an n-type semiconductor layer made of an n-type AlGaN-based semiconductor material; an active layer provided on the n-type semiconductor layer and made of an AlGaN-based semiconductor material; a p-type semiconductor layer provided on the active layer; and a p-side contact electrode that includes an Rh layer in contact with an upper surface of the p-type semiconductor layer and having a thickness of 10 nm or smaller and an Al layer in contact with an upper surface of the Rh layer and having a thickness of 20 nm or larger.

Abstract: A light-emitting device includes: a light-emitting mesa structure having a first top surface and a peripheral surface connected to the first top surface; a transparent conductive layer that is disposed on the first top surface and that has a second top surface; a first insulating structure that is at least disposed on the peripheral surface and that has a third top surface and an inner tapered surface indented from the third top surface, the inner tapered surface having an acute angle with respect to the second top surface; and a reflective layer that is disposed on the transparent conductive layer and that has a first side surface in contact with the inner tapered surface. A method for manufacturing the light-emitting device is also disclosed.

Abstract: An electronic device includes a semiconductor device, a wiring board, a heat dissipating member, and a housing. The semiconductor device includes a semiconductor element, a conductive member electrically connected to the semiconductor element, and a resin mold sealing the semiconductor element. The wiring board includes a wiring portion on which the semiconductor device is mounted, and a resist portion disposed around the wiring portion. The heat dissipating member is in thermal contact with at least one of surfaces of the semiconductor device. The housing is in thermal contact with the semiconductor device through the heat dissipating member. Each of the resin mold and the heat dissipating member has a thermal conductivity higher than that of the resist portion.

Abstract: A method for producing an optoelectronic component by providing a semiconductor layer sequence on a substrate where the semiconductor layer sequence is configured to emit radiation. The method may further include applying a contact layer to the semiconductor layer sequence where the contact layer has a layer thickness of at most 10 nm. The method may further include applying a reflective layer to the contact layer and applying a barrier layer directly to the reflective layer.

Abstract: A display apparatus includes a circuit board including a driving circuit, and a pixel array including a plurality of pixels on the circuit board, each including a plurality of sub-pixels, and a light blocking partition between the plurality of sub-pixels. Each of the plurality of sub-pixels includes a lower light emitting diode (LED) cell configured to generate light of a first wavelength. A first sub-pixel includes a transparent resin structure on the first lower LED cell, a second sub-pixel includes an inter-cell insulating layer on the second lower LED cell and an upper LED cell having on the inter-cell insulating layer and configured to generate light of a second wavelength, and a third sub-pixel includes a wavelength conversion structure on the third lower LED cell and configured to convert light of the first wavelength into light of a third wavelength.

Abstract: A flexible color filter, a method of manufacturing thereof, and a full-color micro light-emitting diode device are provided. The full-color micro light-emitting diode device includes a flexible color filter. The flexible color filter includes a polymer resin substrate, a reflective layer, a light diffusion layer, and a quantum dot layer.

Abstract: A method of manufacturing a light-emitting device includes providing a structure body including a silicon substrate having a first portion, a second portion, and a third portion between the first portion and the second portion, and a first semiconductor layered body including a first light-emitting layer, the first semiconductor layered body being disposed on or above the silicon substrate. The method includes forming a first resin layer covering a lateral side of the silicon substrate and a lateral side of the first semiconductor layered body. The method includes a removal step of removing the first portion to expose a first surface of the first semiconductor layered body, removing the second portion to expose a second surface of the first semiconductor layered body, and leaving the third portion. The method includes forming a first wavelength conversion member on or above the first surface exposed by the removal of the first portion.

Abstract: A light-emitting assembly with improved illumination includes a first substrate, a light guide layer, light emitters, a touch sensor, a first reflective layer, and a second reflective layer. The first substrate defines a light-transmitting area. The light emitters are in the light guide layer. The light emitters emit light to illuminate the light-transmitting area. The touch sensor is opposite to the light-transmitting area. The first reflective layer is between the first substrate and the light guide layer and defines an opening aligned with the light-transmitting area. The second reflective layer is on a side of the light guide layer away from the first substrate. An electronic device using the light-emitting assembly and a method for making the light-emitting assembly are also disclosed.

Abstract: A method comprises depositing a protection layer over a first substrate, wherein the first substrate is part of a first semiconductor die, forming an under bump metallization structure over the protection layer, forming a connector over the under bump metallization structure, forming a first dummy plane along a first edge of a top surface of the first semiconductor die and forming a second dummy plane along a second edge of the top surface of the first semiconductor die, wherein the first dummy plane and the second dummy plane form an L-shaped region.

Abstract: Some embodiments include a method of forming vertically-stacked memory cells. An opening is formed through a stack of alternating insulative and conductive levels. Cavities are formed to extend into the conductive levels. Regions of the insulative levels remain as ledges which separate adjacent cavities from one another. Material is removed from the ledges to thin the ledges, and then charge-blocking dielectric and charge-storage structures are formed within the cavities. Some embodiments include an integrated structure having a stack of alternating insulative levels and conductive levels. Cavities extend into the conductive levels. Ledges of the insulative levels separate adjacent cavities from one another. The ledges are thinned relative to regions of the insulative levels not encompassed by the ledges. Charge-blocking dielectric and charge-storage structures are within the cavities.

Abstract: Disclosed are a display device and a manufacturing method thereof. The display device includes a plurality of pixels, a light emitting device provided in each of the plurality of pixels, the light emitting device having a first surface and a second surface, which are opposite to each other, a first electrode electrically connected to the first surface of the light emitting device, a second electrode electrically connected to the second surface of the light emitting device, and a metal oxide pattern interposed between the second surface of the light emitting device and the second electrode. The metal oxide pattern is provided to cover a portion of the second surface and to expose a remaining portion of the second surface. The second electrode is electrically connected to the exposed remaining portion of the second surface, and the metal oxide pattern includes single-crystalline or polycrystalline alumina.

Abstract: The wavelength conversion material includes a general formula (I) MmAaBbCcDdEe:ESxREy and satisfies a condition (II) that a proportion of D for the wavelength conversion material greater than or equal to 50%. M is selected from a group consisting of Ca, Sr and Ba. A is selected from a group consisting of elements Mg, Mn, Zn and Cd. B is selected from a group consisting of elements B, Al, Ga and In. C is selected from a group consisting of Si, Ge, Ti and Hf. D is selected from a group consisting of elements 0, S and Se. E is selected from a group consisting of elements N and P. ES is selected from a group consisting of divalent Eu, Sm and Yb. RE is selected from a group consisting of trivalent Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er and Tm.

Abstract: The nitride-based semiconductor device includes a carrier traveling layer 1 composed of non-doped AlxGa1-xN (0?X<1); a barrier layer 2 formed on the carrier traveling layer 1 and composed of non-doped or n-type AlYGa1-YN (0<Y?1, X<Y) having a lattice constant smaller than that of the carrier traveling layer 1; a threshold voltage control layer 3 formed on the barrier layer 2 and composed of a non-doped semiconductor having a lattice constant equal to that of the carrier traveling layer 1; and a carrier inducing layer 4 formed on the threshold voltage control layer 3 and composed of a non-doped or n-type semiconductor having a lattice constant smaller than that of the carrier traveling layer 1. The nitride-based semiconductor device further includes a gate electrode 5 formed in a recess structure, a source electrode 6 and a drain electrode 7.

Abstract: Systems and methods are provided for fabricating semiconductor device structures on a substrate. A first fin structure is formed on a substrate. A second fin structure is formed on the substrate. A first semiconductor material is formed on both the first fin structure and the second fin structure. A second semiconductor material is formed on the first semiconductor material on both the first fin structure and the second fin structure. The first semiconductor material on the first fin structure is oxidized to form a first oxide. The second semiconductor material on the first fin structure is removed. A first dielectric material and a first electrode are formed on the first fin structure. A second dielectric material and a second electrode are formed on the second fin structure.

Abstract: A heterostructure for an optoelectronic device is disclosed. The heterostructure includes an active region including at least one quantum well and at least one barrier and an electron blocking layer located adjacent to the active region, wherein the electron blocking layer includes a region of graded composition. An asymmetric p-type superlattice layer is located adjacent to the electron blocking layer, wherein the p-type superlattice includes at least one superlattice period comprising a set of wells and a set of barriers. A thickness of at least one of: each well in the set of wells or each barrier in the set of barriers varies along a length of the p-type superlattice.

Abstract: A method is described for low temperature curing of silicone structures, including the steps of providing patterning photoresist structures on a substrate. The photoresist structures define at least one open region that can be at least partially filled with a condensation cure silicone system. Vapor phase catalyst deposition is used to accelerate the cure of the condensation cure silicone, and the photoresist structure is removed to leave free standing or layered silicone structures. Phosphor containing silicone structures that are coatable with a reflective metal or other material are enabled by the method.

Abstract: A silicon carbide crystal includes a seed layer, a bulk layer and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.