Patents Examined by Hua Qi
  • Patent number: 9076827
    Abstract: Apparatus and method for control of epitaxial growth parameters, for example during manufacture of light emitting diodes (LEDs). Embodiments include PL measurement of a group III-V film following growth while a substrate at an elevated temperature is in a transfer chamber of a multi-chamber cluster tool. In other embodiments, a film thickness measurement, a contactless resistivity measurement, and a particle and/or roughness measure is performed while the substrate is disposed in the transfer chamber. One or more of the measurements performed in the transfer chamber are temperature corrected to room temperature by estimating the elevated temperature based on emission from a GaN base layer disposed below the group III-V film. In other embodiments, temperature correction is based on an absorbance band edge of the GaN base layer determined from collected white light reflectance spectra. Temperature corrected metrology is then used to control growth processes.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: July 7, 2015
    Assignee: Applied Materials, Inc.
    Inventors: David P. Bour, Alain Duboust, Alexey Goder
  • Patent number: 9068276
    Abstract: A method of growing a single crystal material using a device that includes a conical plug. The conical plug includes a first portion defining a first conical hole about an axis, the first conical hole having a first angle, and includes a second portion contiguous with the first portion and defining a second conical hole about the axis, the second conical hole having a second angle having the same sign as the first angle and being greater than the first angle. The device includes an upper tube comprising the conical plug fused therein and a seeding well plug. The device includes a lower tube including the seeding well plug fused therein. A single crystal KPb2Cl5 material is grown from the oriented single crystal KPb2Cl5 seed through the first conical hole and then the second conical hole and then with continuing growth in the upper tube.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: June 30, 2015
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Nicholas J. Condon, Steven R. Bowman, Shawn P. O'Connor
  • Patent number: 9057146
    Abstract: A sheet of a material is disposed in a melt of the material. The sheet is formed using a cooling plate in one instance. An exciting coil and sensing coil are positioned downstream of the cooling plate. The exciting coil and sensing coil use eddy currents to determine a thickness of the solid sheet on top of the melt.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: June 16, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Gary J. Rosen, Frank Sinclair, Alexander Soskov, James S. Buff
  • Patent number: 9040010
    Abstract: The present disclosure provides an apparatus for manufacturing a single crystal silicon ingot having a dual crucible for silicon melting which can be reused due to a dual crucible structure. The apparatus includes a dual crucible for silicon melting, into which raw silicon is charged, a crucible heater heating the dual crucible to melt the raw silicon into molten silicon, a crucible drive unit controlling rotation and elevation of the dual crucible, and a pull-up drive unit disposed above the dual crucible and pulling up a seed crystal dipped in the molten silicon to produce a silicon ingot. The dual crucible has a container shape open at an upper side thereof, and includes a graphite crucible having an inclined surface connecting an inner bottom and an inner wall, and a quartz crucible inserted into the graphite crucible and receiving the raw silicon charged into the dual crucible.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: May 26, 2015
    Assignee: KOREA INSTITUTE OF ENERGY RESEARCH
    Inventors: Jin-Seok Lee, Bo-Yun Jang, Young-Soo Ahn
  • Patent number: 9028611
    Abstract: A method for producing a Group III nitride semiconductor includes reacting a molten mixture containing at least a Group III element and an alkali metal with a gas containing at least nitrogen, to thereby grow a Group III nitride semiconductor crystal on the seed crystal. The method includes forming a template substrate including a sapphire substrate and a first Group III nitride semiconductor layer as the seed crystal which is formed by vapor phase growth and which includes a c-plane as a main plane is employed, and the template substrate is placed and maintained in the molten mixture under conditions where crystal growth of the Group III nitride semiconductor is inhibited, to thereby partially melt back a plurality of separated parts of the first Group III nitride semiconductor layer to such a depth that the sapphire substrate is partially exposed.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: May 12, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Shiro Yamazaki
  • Patent number: 8999061
    Abstract: The method for producing a silicon epitaxial wafer according to the present invention has: a growth step G at which an epitaxial layer is grown on a silicon single crystal substrate; a first polishing step E at which, before the growth step G, both main surfaces of the silicon single crystal substrate are subjected to rough polishing simultaneously; and a second polishing step H at which, after the growth step G, the both main surfaces of the silicon single crystal substrate are subjected to finish polishing simultaneously.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: April 7, 2015
    Assignee: Sumco Corporation
    Inventors: Masayuki Ishibashi, Tomonori Miura
  • Patent number: 8992682
    Abstract: A graphite crucible for silicon single crystal manufacturing by the Czochralski method, having a long life cycle, contains at least one gas venting hole provided in a corner portion of the crucible. Gas generated by reaction between the graphite crucible and a quartz crucible is released to the outside through the gas venting hole, and formation of SiC on the surface of the graphite crucible and deformation of the quartz crucible caused by the pressure of the generated gas are prevented.
    Type: Grant
    Filed: October 28, 2010
    Date of Patent: March 31, 2015
    Assignee: Siltronic AG
    Inventors: Hideo Kato, Hideaki Murakami, Mikio Suehiro
  • Patent number: 8986835
    Abstract: A GaN nanorod and formation method. Formation includes providing a substrate having a GaN film, depositing SiNx on the GaN film, etching a growth opening through the SiNx and into the GaN film, growing a GaN nanorod through the growth opening, the nanorod having a nanopore running substantially through its centerline. Focused ion beam etching can be used. The growing can be done using organometallic vapor phase epitaxy. The nanopore diameter can be controlled using the growth opening diameter or the growing step duration. The GaN nanorods can be removed from the substrate. The SiNx layer can be removed after the growing step. A SiOx template can be formed on the GaN film and the GaN can be grown to cover the SiOx template before depositing SiNx on the GaN film. The SiOx template can be removed after growing the nanorods.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: March 24, 2015
    Assignee: Purdue Research Foundation
    Inventors: Isaac Harshman Wildeson, Timothy David Sands
  • Patent number: 8980002
    Abstract: Methods are disclosed for growing group III-nitride semiconductor compounds with advanced buffer layer technique. In an embodiment, a method includes providing a suitable substrate in a processing chamber of a hydride vapor phase epitaxy processing system. The method includes forming an AlN buffer layer by flowing an ammonia gas into a growth zone of the processing chamber, flowing an aluminum halide containing precursor to the growth zone and at the same time flowing additional hydrogen halide or halogen gas into the growth zone of the processing chamber. The additional hydrogen halide or halogen gas that is flowed into the growth zone during buffer layer deposition suppresses homogeneous AlN particle formation. The hydrogen halide or halogen gas may continue flowing for a time period while the flow of the aluminum halide containing precursor is turned off.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: March 17, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Yuriy Melnik, Lu Chen, Hidehiro Kojiri
  • Patent number: 8936685
    Abstract: The present invention provides a vitreous silica crucible which can suppress the sidewall lowering of the crucible under high temperature during pulling a silicon single crystal, and a method of manufacturing such a vitreous silica crucible. The vitreous silica crucible 10 includes an opaque vitreous silica layer 11 provided on the outer surface side of the crucible and containing numerous bubbles, and a transparent vitreous silica layer 12 provided on the inner surface side. The opaque vitreous silica layer 11 includes a first opaque vitreous silica portion 11a provided on the crucible upper portion, and a second opaque vitreous silica portion 11b provided on the crucible lower portion. The specific gravity of the second opaque vitreous silica portion 11b is 1.7 to 2.1, and the specific gravity of the first opaque vitreous silica portion 11a is 1.4 to 1.8, and smaller than that of the second opaque vitreous silica portion.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: January 20, 2015
    Assignee: Japan Super Quartz Corporation
    Inventors: Toshiaki Sudo, Makiko Kodama, Minoru Kanda, Hiroshi Kishi
  • Patent number: 8888911
    Abstract: The present invention provides a technique which enables production of single crystal silicon having relatively low resistivity by preventing cell growth during crystal growth from occurring, especially in a case where a relatively large amount of dopant is added to a molten silicon raw material. Specifically, the present invention provides a method of producing single crystal silicon by the Czochralski process, comprising producing single crystal silicon having relatively low resistivity by controlling a height of a solid-liquid interface when the single crystal silicon is pulled up.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: November 18, 2014
    Assignee: Sumco Techxiv Corporation
    Inventors: Masayuki Uto, Tuneaki Tomonaga, Toshimichi Kubota, Fukuo Ogawa, Yasuhito Narushima
  • Patent number: 8882077
    Abstract: This invention relates seed layers and a process of manufacturing seed layers for casting silicon suitable for use in solar cells or solar modules. The process includes the step of positioning tiles with aligned edges to form seams on a suitable surface, and the step of joining the tiles at the seams to form a seed layer. The step of joining includes heating the tiles to melt at least a portion of the tiles, contacting the tiles at both ends of at least one seam with electrodes, using plasma deposition of amorphous silicon, applying photons to melt a portion of the tiles, and/or layer deposition. Seed layers of this invention include a rectilinear shape of at least about 500 millimeters in width and length.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: November 11, 2014
    Assignee: AMG Idealcast Solar Corporation
    Inventor: Nathan G. Stoddard
  • Patent number: 8858707
    Abstract: A method for making silicon nanorods is provided. In accordance with the method, Au nanocrystals are reacted with a silane in a liquid medium to form nanorods, wherein each of said nanorods has an average diameter within the range of about 1.2 nm to about 10 nm and has a length within the range of about 1 nm to about 100 nm.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: October 14, 2014
    Assignee: Merck Patent GmbH
    Inventors: Andrew T. Heitsch, Colin M. Hessel, Brian A. Korgel
  • Patent number: 8858706
    Abstract: A single-crystal manufacturing apparatus according to the Czochralski method, including: a crucible that contains a raw material; a main chamber configured to accommodate a heater for heating and melting the raw material; and a pulling chamber configured to pull and accommodate a grown single crystal, the pulling chamber being continuously provided above the main chamber; an inner shield provided between the heater and the main chamber and for insulating heat radiated from the heater, and a supporting member for supporting the inner shield from below. The inner shield is supported at three or more supporting points contacting the supporting member, and a lower end of the inner shield except at the supporting points does not contact the supporting member.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: October 14, 2014
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Toshiro Shimada, Kosei Sugawara
  • Patent number: 8821634
    Abstract: A high temperature furnace comprising hot zone insulation having at least one shaped thermocouple assembly port to reduce temperature measurement variability is disclosed. The shaped thermocouple assembly port has an opening in the insulation facing the hot zone that is larger than the opening on the furnace shell side of the insulation. A method for producing a crystalline ingot in a high temperature furnace utilizing insulation having a shaped thermocouple assembly port is also disclosed.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: September 2, 2014
    Assignee: GTAT Corporation
    Inventors: Ning Duanmu, Dean C. Skelton, Menahem Lowy, Dzung Duc Nguyen
  • Patent number: 8808452
    Abstract: A method for using a silicon film formation apparatus includes performing a pre-coating process to cover a reaction tube with a silicon coating film, an etching process to etch natural oxide films on product target objects, a silicon film formation process to form a silicon product film on the product target objects, and a cleaning process to etch silicon films on the reaction tube, in this order. The pre-coating process includes supplying a silicon source gas into the reaction tube from a first supply port having a lowermost opening at a first position below the process field, while exhausting gas upward from inside the reaction tube. The etching process includes supplying an etching gas into the reaction tube from a second supply port having a lowermost opening between the process field and the first position, while exhausting gas upward from inside the reaction tube by the exhaust system.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: August 19, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Naotaka Noro, Takahiro Miyahara
  • Patent number: 8721789
    Abstract: An apparatus for crystallization of silicon includes a crucible for containing silicon, a heating and heat dissipating arrangement provided for melting the silicon contained in the crucible and for subsequently solidifying the molten silicon, and an electromagnetic stirring device provided for stirring the molten silicon in the crucible during the solidification of the molten silicon. A control arrangement is provided for controlling the heating and heat dissipating arrangement to solidify the molten silicon at a specified solidification rate and for controlling the electromagnetic stirring device to stir the molten silicon in response to the specified solidification rate of the molten silicon such that the ratio of a speed of the molten silicon and the specified solidification rate is above a first threshold value.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: May 13, 2014
    Assignee: ABB AB
    Inventors: Jan-Erik Eriksson, Olof Hjortstam, Ulf Sand
  • Patent number: 8679251
    Abstract: Silicon single crystals are grown from the melt by providing the melt in a crucible; imposing a horizontal magnetic field on the melt; directing a gas between the single crystal and a heat shield to a melt free surface, and controlling the gas to flow over a region of the melt free surface extending in a direction substantially perpendicular to the magnetic induction. A suitable apparatus has a crucible for holding the melt; a heat shield surrounding the silicon single crystal having a lower end which is connected to a bottom cover facing a melt free surface and a non-axisymmetric shape with respect to a crucible axis, such that gas which is directed between the crystal and the heat shield to the melt free surface is forced to flow over a region of the melt which extends substantially perpendicular to the magnetic induction.
    Type: Grant
    Filed: April 8, 2013
    Date of Patent: March 25, 2014
    Assignee: Siltronic AG
    Inventor: Piotr Filar
  • Patent number: 8641823
    Abstract: Reactor designs for use in ammonothermal growth of group-III nitride crystals. Internal heating is used to enhance and/or engineer fluid motion, gas mixing, and the ability to create solubility gradients within a vessel used for the ammonothermal growth of group-III nitride crystals. Novel baffle designs are used for control and improvement of continuous fluid motion within a vessel used for the ammonothermal growth of group-III nitride crystals.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: February 4, 2014
    Assignee: The Regents of the University of California
    Inventors: Siddha Pimputkar, Derrick S. Kamber, James S. Speck, Shuji Nakamura
  • Patent number: 8632632
    Abstract: An apparatus for crystallization of silicon includes a crucible for containing silicon, a heating and heat dissipating arrangement provided for melting the silicon contained in the crucible and for subsequently solidifying the molten silicon, and an electromagnetic stirring device provided for stirring the molten silicon in the crucible during the solidification of the molten silicon. A control arrangement is provided for controlling the heating and heat dissipating arrangement to solidify the molten silicon at a specified solidification rate and for controlling the electromagnetic stirring device to stir the molten silicon in response to the specified solidification rate of the molten silicon such that the ratio of a speed of the molten silicon and the specified solidification rate is above a first threshold value.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: January 21, 2014
    Assignee: ABB AB
    Inventors: Jan-Erik Eriksson, Olof Hjortstam, Ulf Sand