Abstract: A susceptor is disclosed that can increase a heat capacity of a susceptor outer peripheral portion by enlarging the thickness of the susceptor and equalize thermal conditions for an outer peripheral portion and the inner peripheral portion of a wafer and a method for manufacturing an epitaxial wafer that uses this susceptor to perform vapor-phase epitaxy of an epitaxial layer. Back surface depositions have a close relationship with heat transfer that occurs between a wafer and a susceptor, i.e., a wafer outer peripheral portion has a higher temperature than a wafer inner peripheral portion since the wafer is in contact with or close to the susceptor at the wafer outer peripheral portion and hence the back surface depositions are apt to be generated. This is solved by equalizing thermal conditions for the wafer outer peripheral portion and the inner peripheral portion of the wafer back surface.

Abstract: Described herein is a method for growing indium nitride (InN) materials by growing hexagonal and/or cubic InN using a pulsed growth method at a temperature lower than 300° C. Also described is a material comprising InN in a face-centered cubic lattice crystalline structure having an NaCl type phase.

Abstract: Dust that is accumulated in an exhaust passage provided in a chamber, the exhaust passage for discharging gas in the chamber of a semiconductor crystal manufacturing device, is removed by being sucked from the outside of the chamber. Moreover, an opening and closing valve for cleaning that is detachably attached to an opening of the exhaust passage, the opening facing the chamber, is opened and closed intermittently in a suction state. Furthermore, the opening and closing valve for cleaning is driven by a valve driving unit. The dust accumulated in the exhaust passage is removed efficiently, whereby the time required to clean the exhaust passage is shortened and fluctuations of the pressure inside the chamber when a semiconductor crystal is manufactured are suppressed.

Abstract: A method for producing an array or bed of metallic nanotubes includes formation of nanowires made from sacrificial material on a growth support, deposition of a metal layer on the nanowires so as to form metallic nanotubes concentric with the nanowires, deposition of a polymer binding layer between the nanowires, elimination of the support, the binding layer supporting the metallic nanotubes, and etching of the sacrificial material.

Abstract: A ceiling portion for use in a processing apparatus and an epitaxial growth apparatus having the ceiling portion are disclosed herein. In one embodiment the ceiling portion includes a ring shaped support and a ceiling plate. The ring shaped support includes an inner surface having a first slope portion decreasing from a top surface of the ring shaped support towards a center of the ring shaped support and a protrusion, protruding from the inner surface, having a second slope portion decreasing in a protruding direction towards the center of the ring shaped support. The ceiling plate is coupled to the support. In another embodiment, the first slope portion and the second slope portion meet at a point, wherein an angle formed by the first slope portion and the second slope portion is less than 90 degrees.

Abstract: A method of manufacturing a vitreous silica crucible includes: a taking-out process of taking out the vitreous silica crucible from the mold, a honing process of removing the unfused silica powder layer on the outer surface of the vitreous silica crucible, and further comprising, after the taking-out process and before the honing process, a marking process of marking an identifier comprised of one or more groove line on the outer surface of the vitreous silica crucible, wherein the groove line after the honing process has a cross-sectional shape of an inverse trapezoid and a depth of 0.2 to 0.5 mm, and a width of 0.8 mm or more at the opening of the groove line. The groove line is formed by repeating shifting a focal point of a laser.

Abstract: Methods of making electrically conductive, doped zinc oxide nanowires and nanowire films are provided. The methods comprises the steps of forming an aqueous solution comprising a dopant-containing precursor salt, a zinc-containing precursor salt and a pH buffering agent and heating the aqueous solution to a temperature below its boiling point in the presence of seed crystals, whereby doped zinc oxide nanowires are grown in situ from the seed crystals in the aqueous solution.

Abstract: A method comprises shaping an aluminum oxide ceramic material into a component for an electronic device. The component has first and second major surfaces. A selected region of one or both of the first and second major surfaces is heated to an annealing temperature. The selected region is then cooled below the annealing temperature, so that residual compressive stress is generated in the selected region.

Abstract: An apparatus for SIC single crystal has an induction heating control unit such that frequency f (Hz) of alternating current to the induction heating unit satisfies Formula (1); D1 (mm) is permeation depth of electromagnetic waves into a crucible side wall by the heating unit, D2 (mm) is permeation depth of electromagnetic waves into a SIC solution, T (mm) is thickness of the crucible side wall of the crucible, and R (mm) is crucible inner radius: (D1?T)×D2/R>1.5??(1) where, D1 is defined by Formula (2) and D2 by Formula (3): D1=503292×(1/(f×?c×?c))1/2??(2) D2=503292×(1/(f×?s×?s))1/2??(3); ?c is electric conductivity (S/m) of the sidewall, ?s is electric conductivity (S/m) of the SiC solution; ?c is relative permeability of the sidewall, and ?s is relative permeability of the SIC solution.

Abstract: A method for making an epitaxial structure includes the following steps. A substrate having an epitaxial growth surface is provided. A buffer layer is formed on the epitaxial growth surface. A carbon nanotube layer is placed on the buffer layer. A first epitaxial layer is epitaxially grown on the buffer layer. The substrate and the buffer layer are removed to expose a second epitaxial growth surface. A second epitaxial layer is epitaxially grown on the second epitaxial growth surface.

Abstract: Plate-like samples each having as a principal plane thereof a cross section perpendicular to the long axis direction of a polycrystalline silicon rod grown by the deposition using a chemical vapor deposition method are sampled; an X-ray diffraction measurement is performed omnidirectionally in the plane of each of the plate-like samples thus sampled; and when none of the plate-like samples has any X-ray diffraction peak with a diffraction intensity deviating from the average value ±2×standard deviation (?±2?) found for any one of the Miller indices <111>, <220>, <311> and <400>, the polycrystalline silicon rod is selected as the raw material for use in the production of single-crystalline silicon. The use of such a polycrystalline silicon raw material suppresses the local occurrence of the portions remaining unmelted, and can contribute to the stable production of single-crystalline silicon.

Abstract: The present invention is provided with a support on a gripping member, the support being composed of linear springs which elastically support an engaging portion. Thus, the support can be reused, and generation of rupture and dislocation of a single crystal ingot from a gripping part of the engaging portion can be prevented.

Abstract: A method for producing a monolithic template comprises a Si wafer with a layer of a III/V semiconductor epitaxially applied to its surface. The III/V semiconductor has a lattice constant differing by less than 10% from that of Si. The method includes epitaxially growing a layer of a III/V semiconductor on the surface of the Si wafer at a wafer temperature from 350 to 650° C., a growth rate from 0.1 to 2 ?m/h, and a layer thickness from 1 to 100 nm. A layer of another III/V semiconductor, identical to or different from the previously applied III/V semiconductor, is epitaxially grown on the III/V semiconductor layer at a wafer temperature from 500 to 800° C., a growth rate from 0.1 to 10 ?m/h, and a layer thickness from 10 to 150 nm.

Abstract: A method of production of a SiC single crystal uses the solution method to prevent the formation of defects due to seed touch, i.e., causing a seed crystal to touch the melt, and thereby cause growth of a SiC single crystal reduced in defect density. According to the method, a SiC seed crystal touches a melt containing Si in a graphite crucible to thereby cause growth of the SiC single crystal on the SiC seed crystal. The method includes making the SiC seed crystal touch the melt, and then making the melt rise in temperature once to a temperature higher than the temperature at the time of touch and also higher than the temperature for causing growth.

Abstract: The present invention provides a method for producing a Group III nitride semiconductor single crystal having excellent crystallinity, and a method for producing a GaN substrate having excellent crystallinity, the method including controlling melting back. Specifically, a mask layer is formed on a GaN substrate serving as a growth substrate. Then, a plurality of trenches which penetrate the mask layer and reach the GaN substrate are formed through photolithography. The obtained seed crystal and raw materials of a single crystal are fed to a crucible and subjected to treatment under pressurized and high temperature conditions. Portions of the GaN substrate exposed to the trenches undergo melting back with a flux. Through dissolution of the GaN substrate, the dimensions of the trenches increase, to provide large trenches. The GaN layer is grown from the surface of the mask layer as a starting point.

Abstract: The distance between the heat shield and the melt level of the melt can be regulated in a high precision. The real image includes at least the circular opening of the heat shield provided in such a way that the heat shield covers a part of the melt level of the silicon melt. The mirror image is a reflected image of the heat shield on the surface of the silicon melt. Based on the distance between the obtained real image and the mirror image, the melt level position of the silicon melt is computed, and the distance between the heat shield and the melt level position is regulated.

Abstract: Disclosed is an electromagnetic casting method of polycrystalline silicon which is characterized in that polycrystalline silicon is continuously cast by charging silicon raw materials into a bottomless cold mold, melting the silicon raw materials using electromagnetic induction heating, and pulling down the molten silicon to solidify it, wherein the depth of solid-liquid interface before the start of the final solidification process is decreased by reducing a pull down rate of ingot in a final phase of steady-state casting. By adopting the method, the region of precipitation of foreign substances in the finally solidified portion of ingot can be reduced and cracking generation can be prevented upon production of a polycrystalline silicon as a substrate material for a solar cell.

Abstract: An oxide semiconductor film with excellent crystallinity is formed. At the time when an oxide semiconductor film is formed, as a substrate is heated to a temperature of higher than or equal to a first temperature and lower than a second temperature, a part of the substrate having a typical length of 1 nm to 1 ?m is heated to a temperature higher than or equal to the second temperature. Here, the first temperature means a temperature at which crystallization occurs with some stimulation, and the second temperature means a temperature at which crystallization occurs spontaneously without any stimulation. Further, the typical length is defined as the square root of a value obtained in such a manner that the area of the part is divided by the circular constant.

Abstract: The present invention provides a method of manufacturing a vitreous silica crucible including: a taking-out process of taking out the vitreous silica crucible from the mold, a honing process of removing the unfused silica powder layer on the outer surface of the vitreous silica crucible, and further comprising, after the taking-out process and before the honing process, a marking process of marking an identifier comprised of one or more groove line on the outer surface of the vitreous silica crucible, wherein the groove line after the honing process has a depth of 0.2 to 0.5 mm, and a width of 0.8 mm or more at the opening of the groove line.

Abstract: Diamond is grown on a substrate (S) from a mixture of a carbon-containing gas and hydrogen gas, by a DC plasma enhanced CVD process of applying a DC voltage between a stage electrode (12) for holding the substrate (S) and a voltage-applying electrode (13). During the step of growing diamond by applying a DC voltage, a single pulse voltage of opposite polarity to the DC voltage for diamond growth is applied between the stage electrode and the voltage-applying electrode at a predetermined timing. Diamond of quality is produced at a stable growth rate.