Patents Examined by Ishwarbhai B. Patel
  • Patent number: 11227823
    Abstract: A wiring structure is provided. The wiring structure includes an upper redistribution structure, a lower redistribution structure, a conductive structure, an upper bonding layer and a lower bonding layer. The conductive structure is disposed between and electrically connected to the upper redistribution structure and the lower redistribution structure. The upper bonding layer is disposed between the upper redistribution structure and the conductive structure to bond the upper redistribution structure and the conductive structure together. The lower bonding layer is disposed between the lower redistribution structure and the conductive structure to bond the lower redistribution structure and the conductive structure together.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: January 18, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Tang-Yuan Chen, Chih-Pin Hung
  • Patent number: 11225059
    Abstract: A glass plate module according to the present invention includes a glass plate, an electrically conductive layer laminated on the glass plate, at least one connection terminal fixed to the electrically conductive layer and made of an electrically conductive material, and lead-free solder for fixing the connection terminal to the electrically conductive layer. The connection terminal includes an installation portion that is fixed to the electrically conductive layer via the lead-free solder, a standing portion that extends from an end portion of the installation portion in a direction away from the glass plate, and a connection portion that is coupled to an end portion of the standing portion on the opposite side to the installation portion and extends in a direction away from the installation portion along a surface direction of the glass plate.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: January 18, 2022
    Assignee: NIPPON SHEET GLASS COMPANY, LIMITED
    Inventor: Junichi Tokiwa
  • Patent number: 11229115
    Abstract: In a multilayer wiring board having through holes used in an electronic device, wiring is efficiently performed at high density while preventing crosstalk of differential signals. A wiring board includes: a plurality of pads arranged linearly at a predetermined pitch; a plurality of through holes arranged in parallel along an arrangement direction of the pads; and a wiring pattern connecting the pad to the through hole. Between the through holes connected to the pads which are connected to the ground via the wiring patterns, two through holes through which each of a pair of differential signals constituting a differential signal pair passes are provided such that a direction of a straight line connecting the two through holes is inclined to the arrangement direction of the pads.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: January 18, 2022
    Assignee: Hitachi, Ltd.
    Inventors: Norio Chujo, Yutaka Uematsu, Masayoshi Yagyu
  • Patent number: 11222791
    Abstract: A printed wiring board includes a resin insulating layer, a metal post formed in the resin insulating layer such that the metal post is protruding from a first surface of the resin insulating layer, a conductor layer formed on a second surface of the resin insulating layer on the opposite side with respect to the first surface of the resin insulating layer, and a via conductor formed in the resin insulating layer such that the via conductor is penetrating through the resin insulating layer and connecting the metal post and the conductor layer. The metal post has a protruding portion protruding from the first surface of the resin insulating layer and an embedded portion integrally formed with the protruding portion and embedded in the resin insulating layer.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: January 11, 2022
    Assignee: IBIDEN CO., LTD.
    Inventors: Yoji Sawada, Nobuhisa Kuroda, Kazuyuki Ueda, Shota Tachibana
  • Patent number: 11212918
    Abstract: Various embodiments include an electrical assembly with: an electronic switching element electrically contacted on an underside and arranged on a flexible first wiring support; wherein the electronic switching element is electrically contacted on an upper side lying opposite the lower side; and a second wiring support arranged lying opposite the first wiring support on the upper side electrical contacting area of the electronic switching element. The first wiring support and the second wiring support each comprise a permanently elastic, electrically insulating, thermally conductive material.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: December 28, 2021
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Rene Blank, Martin Franke, Peter Frühauf, Rüdiger Knofe, Bernd Müller, Stefan Nerreter, Jörg Strogies, Klaus Wilke
  • Patent number: 11212906
    Abstract: A laminated substrate that includes a substrate body having a plurality of laminated ceramic layers containing a first glass; a wiring conductor within the substrate body and made from silver, copper, a silver alloy, or a copper alloy; and a thermal conductor within or on a main surface of the substrate body. The thermal conductor is at least one of (1) a thermal via penetrating a part of a first ceramic layer of the plurality of laminated ceramic layers in a thickness direction thereof, and (2) a heat spreader extending along a main surface of the first ceramic layer of the plurality of laminated ceramic layers. A first thermal conductivity of the thermal conductor is higher than a second thermal conductivity of the first ceramic layer, and the thermal conductor contains an insulating ceramic as a main material thereof, and further contains a second glass.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: December 28, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kosuke Sugiura, Issei Yamamoto
  • Patent number: 11212915
    Abstract: A stretchable mounting board that includes a mounting electrode section electrically connected to stretchable wiring, and solder electrically connected to the mounting electrode section. The mounting electrode section has a first electrode layer on a side thereof facing the stretchable wiring and which includes bismuth and tin, and a second electrode layer on a side thereof facing the solder and which includes bismuth and tin. A concentration of the bismuth in the first electrode layer is lower than a concentration of the bismuth in the second electrode layer, and the concentration of the bismuth in the second electrode layer is constant along a thickness direction thereof.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: December 28, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hayato Katsu, Keisuke Nishida, Ryo Asai, Takayuki Okada, Shinsuke Tani
  • Patent number: 11206734
    Abstract: A wiring structure is provided, including a conductive wiring and an insulating layer. The conductive wiring is disposed on a substrate and has a top side, a bottom side and two side walls opposite to each other. The insulating layer which wraps around the conductive wiring at least through the top side and two side walls, wherein there is a gap between the insulating layer and at least one of the two side walls.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: December 21, 2021
    Inventors: Roger Huang, Joe Huang, Lavender Cheng, Sean Chang
  • Patent number: 11202367
    Abstract: An embodiment of the present invention relates to a flexible printed circuit board (FPCB), which is applied to various electronic display devices, and may provide the FPCB, including a base, a first metal layer and a second metal layer on both surfaces of the base, a first plating layer on the first metal layer, a second plating layer on the second metal layer, and a first insulating pattern and a second insulating pattern respectively disposed on some region of the first plating layer and the second plating layer, wherein the first plating layer and the second plating layer may have different thicknesses.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: December 14, 2021
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jun Young Lim, Woong Sik Kim, Hyung Kyu Yoon
  • Patent number: 11166365
    Abstract: A printed circuit board includes: a first insulating layer; and a heat radiating circuit pattern disposed on a first surface of the first insulating layer and having a pad and a via. The heat radiating circuit pattern includes: a first metal layer disposed on the first insulating layer; a graphite layer disposed on the first metal layer; and a second metal layer disposed on the graphite layer.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: November 2, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: A-ran Lee, Kee-Ju Um, Ju-Ho Kim, Myeong-Hui Jung, Kyuong-Hwan Lim, Jin-Won Lee, Seung-On Kang, Jong-Guk Kim
  • Patent number: 11166387
    Abstract: A wiring board including a build-up circuit layer, a patterned conductive layer, first and second adhesion promoting material layers and first and second solder mask layers is provided. The build-up circuit layer has a first surface and a second surface opposite thereto. The patterned conductive layer is disposed on the second surface. The first adhesion promoting material layer is disposed on the first surface and includes at least one first opening. The second adhesion promoting material layer is disposed on the second surface and the patterned conductive layer, and includes at least one second opening. The first solder mask layer is disposed on the first adhesion promoting material layer and includes at least one third opening provided corresponding to the first opening. The second solder mask layer is disposed on the second adhesion promoting material layer and includes at least one fourth opening provided corresponding to the second opening.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: November 2, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Kai-Ming Yang, Chen-Hao Lin, Pu-Ju Lin
  • Patent number: 11160166
    Abstract: A printed circuit board with high-capacity and high-current copper circuit includes a conductive trace, a first protecting layer, and a second protecting layer on opposite sides of the conductive trace. The conductive trace includes a basic conductive trace pattern, a first conductive trace pattern, and a second conductive trace pattern. The first and second conductive trace patterns are directly formed on opposite surfaces of the basic copper conductive trace pattern. A width of trace of the first conductive trace pattern is the same as a line width of the second conductive trace pattern.
    Type: Grant
    Filed: January 13, 2018
    Date of Patent: October 26, 2021
    Assignees: Avary Holding (Shenzhen) Co., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd.
    Inventors: Fang-Bo Xu, Peng Wu, Jian-Quan Shen, Ke-Jian Wu
  • Patent number: 11160164
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, interlayer insulating layers interposed between the first conductor layers and between the second conductor layers, and via conductors formed in the core layer such that each via conductor decreases in diameter from one of the inner conductor layers toward the other one of the inner conductor layers and that the other one of the inner conductor layers has thickness greater than thickness of the one of the inner conductor layers. The first and/or second inner conductor layers includes a first laminated structure including metal foil and plating film layers, the first and/or second outer conductor layers includes the first laminated structure, and the first and/or second intermediate conductor layers includes a second laminated structure including metal foil and plating film layers.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: October 26, 2021
    Assignee: IBIDEN CO., LTD.
    Inventors: Takenobu Nakamura, Takahiro Yamazaki, Takashi Yamauchi, Toshihide Makino
  • Patent number: 11147157
    Abstract: A substrate structure with high reflectance includes a base material, a patterned circuit layer, an insulating layer and a metal reflecting layer. The base material includes a first surface and a second surface opposite to the first surface. The patterned circuit layer is disposed on the first surface. The insulating layer covers the patterned circuit layer and a part of the first surface exposed by the patterned circuit layer. The metal reflecting layer covers the insulating layer, and a reflectance of the metal reflecting layer is substantially greater than or equal to 85%. A manufacturing method of a substrate structure with high reflectance is also provided.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: October 12, 2021
    Assignee: UNIFLEX Technology Inc.
    Inventors: Cheng-I Tu, Ying-Hsing Chen, Meng-Huan Chia, Hsin-Ching Su, Yi-Chun Liu, Cheng-Chung Lai, Yuan-Chih Lee
  • Patent number: 11140773
    Abstract: A substrate structure with high reflectance includes a base material, a patterned circuit layer, an insulating layer and a metal reflecting layer. The base material includes a first surface and a second surface opposite to the first surface. The patterned circuit layer is disposed on the first surface. The insulating layer covers the patterned circuit layer and a part of the first surface exposed by the patterned circuit layer. The metal reflecting layer covers the insulating layer, and a reflectance of the metal reflecting layer is substantially greater than or equal to 85%. A manufacturing method of a substrate structure with high reflectance is also provided.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: October 5, 2021
    Assignee: UNIFLEX Technology Inc.
    Inventors: Cheng-I Tu, Ying-Hsing Chen, Meng-Huan Chia, Hsin-Ching Su, Yi-Chun Liu, Cheng-Chung Lai, Yuan-Chih Lee
  • Patent number: 11127664
    Abstract: A circuit board includes a composite layer of a non-conductor inorganic material and an organic material, a plurality of conductive structures, a first built-up structure, and a second built-up structure. The composite layer of the non-conductor inorganic material and the organic material has a first surface and a second surface opposite to each other and a plurality of openings. The conductive structures are respectively disposed in the openings of the composite layer of the non-conductor inorganic material and the organic material. The first built-up structure is disposed on the first surface of the composite layer of the non-conductor inorganic material and the organic material and electrically connected to the conductive structures. The second built-up structure is disposed on the second surface of the composite layer of the non-conductor inorganic material and the organic material and electrically connected to the conductive structures.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: September 21, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Ra-Min Tain, Kai-Ming Yang, Wang-Hsiang Tsai, Tzyy-Jang Tseng
  • Patent number: 11116080
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate layers, second conductor layers including second inner, outer and intermediate layers, interlayer insulating layers interposed between the first conductor layers and between the second conductor layers, and via conductors formed in the insulating layers such that each via conductor connects two conductor layers and is integrally formed with one of the conductor layers on side away from the core layer. The first and/or second inner conductor layers has a first conductor layer structure including metal foil and plating film layers, the first and/or second outer conductor layers has the first structure, the first and/or second intermediate conductor layers has a second conductor layer structure including metal foil and plating film layers, and the via conductors include a group integrally formed with the first structure and including constricted via conductors each having a constricted portion.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: September 7, 2021
    Assignee: IBIDEN CO., LTD.
    Inventors: Takenobu Nakamura, Takahiro Yamazaki, Takashi Yamauchi, Toshihide Makino
  • Patent number: 11104282
    Abstract: A circuit assembly where the circuit board includes a first surface and a second surface that is opposite to the first surface and on which a plurality of bus bars are routed, the inductor includes a main body and a terminal that is led out from the main body and has a shape that is bent toward the circuit board, and a leading end of the terminal is connected through a screwing member to a bus bar of the plurality of bus bars exposed from an opening provided on the circuit board, the screwing member is held in an insulating holder housed in a housing recess provided in the heat dissipation plate, and the heat dissipation plate is overlaid so as to transfer heat on the circuit board on the second surface of the circuit board.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: August 31, 2021
    Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takuya Ota, Shigeki Yamane, Hirotoshi Maeda, Toshiyuki Tsuchida, Junya Aichi
  • Patent number: 11096275
    Abstract: A conductive tape formed by laying a conductive pathway on a tape layer is disclosed. Various apparatus and methods for laying conductive pathways to form conductive tape are disclosed. The conductive pathways may be laid by varying the lateral position of the conductive pathway on the tape substrate. Such patterns all stretchable conductive tape to be realized. Multiple conductive pathways may be laid in the tape and the lateral separation of the pathways in the tape may vary. In some embodiments the pathways are formed from conductive yarn or by printing or laying conductive ink.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: August 17, 2021
    Assignee: MAS INNOVATION (PRIVATE) LIMITED
    Inventors: Kosalasiri Jayasundara, Raweendra Kumara, Ranil Vitharana
  • Patent number: 11096277
    Abstract: A circuit board and method of manufacture therefor utilize voltage domain edge plating disposed on at least a portion of one or more edges of a circuit board to electrically couple voltage domain conductive shapes disposed in different conductive layers of the circuit board. By doing so, interconnection of multiple voltage domain conductive shapes in different conductive layers may be facilitated with improved power integrity, while also providing EMI shielding along the edge of the circuit board.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: August 17, 2021
    Assignee: International Business Machines Corporation
    Inventors: Edni Del Rosal, Anil Yuksel, David Green