Patents Examined by Ishwarbhai Patel
  • Patent number: 8686300
    Abstract: A printed wiring board includes a resin insulation layer having a first surface and a second surface on an opposite side of the first surface, the resin insulation layer having an opening for a first via conductor, a pad formed on the first surface of the resin insulation layer and provided to mount an electronic component, a first conductive circuit formed on the second surface of the resin insulation layer, and a first via conductor formed in the opening and connecting the pad and the first conductive circuit. The pad has an embedded portion embedded in the resin insulation layer and a protruding portion protruding from the resin insulation layer, and the embedded portion has an external shape which is greater than an external shape the protruding portion.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: April 1, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Satoru Kawai, Kenji Sakai, Liyi Chen
  • Patent number: 8642897
    Abstract: A wiring board including a core substrate having an accommodation portion, an electronic component in the accommodation portion having a substrate, a resin layer on a surface of the substrate and an electrode on the resin layer, a first interlayer resin insulation layer on a surface of the core substrate and a surface of the substrate of the component, and a second interlayer resin insulation layer on the opposite surface of the core substrate and a surface of the substrate having the resin layer and electrode. The first insulation layer has resin in the amount greater than the amount of resin in the second insulation layer such that the total amount of resin component including the resin in the first insulation layer is adjusted to be substantially the same as the total amount of resin component including the resin in the second insulation layer and resin in the resin layer.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: February 4, 2014
    Assignee: Ibiden Co., Ltd.
    Inventor: Shunsuke Sakai
  • Patent number: 8642896
    Abstract: A printed circuit board include: a printed circuit board main body having a mounting area on a first surface of the printed circuit board main body and a recess being provided at a recess area on a second surface that is a back side of the first surface of the printed circuit board main body, the electronic component being mounted on the mounting area, the recess area being provided to correspond to the mounting area; and a thermal expansion control element being placed in the recess and having a smaller thermal expansion coefficient than the printed circuit board main body.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: February 4, 2014
    Assignee: Fujitsu Limited
    Inventor: Kenji Fukuzono
  • Patent number: 8624128
    Abstract: A printed circuit board and a manufacturing method of the printed circuit board are disclosed. The printed circuit board includes: a first insulation layer having a first pattern formed thereon; a first trench caved in one surface of the first insulation layer along at least a portion of the first pattern; and a second insulation layer stacked on one surface of the first insulation layer so as to cover the first pattern. The first trench is filled by the second insulation layer.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: January 7, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ju-Pyo Hong, Young-Do Kweon, Jin-Gu Kim, Seon-Hee Moon, Dong-Jin Lee, Seung-Wook Park
  • Patent number: 8624129
    Abstract: A power device that includes a printed circuit board having one or more dielectric and copper layers between a top and a bottom metal layer. The power device includes an area extending through all metal and dielectric layers of the printed circuit board except the bottom metal layer. A semiconductor device is positioned within the area and mounted to the bottom metal layer of the printed circuit board.
    Type: Grant
    Filed: January 12, 2006
    Date of Patent: January 7, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Robert W. Monroe
  • Patent number: 8624132
    Abstract: A printed wiring board including a wiring substrate provided with at least one conductor circuit, a solder resist layer provided on the surface of the wiring substrate, at least one conductor pad formed from a part of the conductor circuit exposed from an opening provided in the solder resist layer, and at least one solder bump for mounting electronic parts on the conductor pad. In the printed wiring board, since the at least one conductor pad is aligned at a pitch of about 200 ?m or less, and a ratio (W/D) of a diameter W of the solder bump to an opening diameter D of the opening formed in the solder resist layer is about 1.05 to about 1.7, connection reliability and insulation reliability can be easily improved.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: January 7, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Yoichiro Kawamura, Shigeki Sawa, Katsuhiko Tanno, Hironori Tanaka, Naoaki Fujii
  • Patent number: 8614397
    Abstract: In a circuit device of the present invention, the lower surface side of a circuit board is covered with a second resin encapsulant, and the upper surface side and the like of the circuit board are covered with a first resin encapsulant. Since heat dissipation to the outside of the circuit device is achieved mainly through the second resin encapsulant, a particle size of filler contained in the second resin encapsulant is made larger than a particle size of filler contained in the first resin encapsulant. Heat dissipation to the outside of the circuit device is greatly improved.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: December 24, 2013
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Katsuyoshi Mino, Akira Iwabuchi, Ko Nishimura, Masami Motegi
  • Patent number: 8609993
    Abstract: A power module substrate includes: a ceramics substrate composed of AlN, having a top face; a metal plate composed of pure aluminum and joined to the top face of the ceramics substrate with a brazing filler metal including silicon interposed therebetween; and a high concentration section formed at a joint interface at which the metal plate is joined to the ceramics substrate, having a silicon concentration that is more than five times the silicon concentration in the metal plate.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: December 17, 2013
    Assignee: Mitsubishi Materials Corporation
    Inventors: Yoshirou Kuromitsu, Kazuhiro Akiyama, Takeshi Kitahara, Hiroshi Tonomura
  • Patent number: 8609997
    Abstract: A multilayer wiring substrate includes a center wiring layer arranged in a center of the substrate in a thickness direction, and wiring layers stacked on one side of the center wiring layer and the other side of the center wiring layer via an insulating layer. The wiring layers on one side of the center wiring layer and the wiring layers on the other side are provided in a same layer number. The insulating layers on one side of the center wiring layer and the insulating layers on the other side are provided in a same layer number.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: December 17, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Tomohiro Shomura, Shinichi Imasaka
  • Patent number: 8610001
    Abstract: A printed wiring board including an insulation layer, a conductive circuit on the insulation layer, an outermost interlayer resin insulation layer formed on the insulation layer and the conductive circuit and having a via-conductor opening connected to the conductive circuit, a land structure including a first land formed on the outermost interlayer resin insulation layer around the via-conductor opening and a second land formed on the outermost interlayer resin insulation layer around the first land, and a via conductor formed in the via-conductor opening through the outermost interlayer resin insulation layer such that the first land of the land structure on the outermost interlayer resin insulation layer is connected to the conductive circuit on the insulation layer. The land structure has a space between the first land and second land of the land structure, and the first land of the land structure is directly connected to the via conductor.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: December 17, 2013
    Assignee: Ibiden Co., Ltd.
    Inventor: Hisashi Kato
  • Patent number: 8604355
    Abstract: A welding system component includes a circuit board for the welding system component. An interface has a main riser portion with a fastener passageway formed therethrough. The interface has an extension portion with a terminal passageway formed therethrough. The extension portion is electrically connected to the circuit board with a terminal disposed in the terminal passageway. The extension portion is spaced away from a surface of the circuit board. A capacitor is electrically connected to the main riser portion with a fastener disposed in the fastener passageway.
    Type: Grant
    Filed: March 15, 2010
    Date of Patent: December 10, 2013
    Assignee: Lincoln Global, Inc.
    Inventors: George Koprivnak, Robert Dodge, Jeremie Buday, David Perrin
  • Patent number: 8604359
    Abstract: A package substrate includes a core board, a first dielectric layer, a second circuit pattern, a first solder mask and an insulating layer. A first circuit pattern is disposed on a first surface of the core board. The first dielectric layer covers the first circuit pattern. The second circuit pattern is located on the first dielectric layer and the second circuit pattern includes an interconnection circuit pattern within a chip mounting area. The first solder mask covers a portion of the second circuit pattern outside the chip mounting area. The insulating layer covers the chip mounting area and the interconnection circuit pattern. A plurality of embedded bump pads are located on an upper surface of the insulating layer.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: December 10, 2013
    Assignee: Unimicron Technology Corp.
    Inventors: Tsung-Yuan Chen, Shih-Lian Cheng
  • Patent number: 8592690
    Abstract: A circuit board (100) includes a first shielding layer (20) extending horizontally, an accessorial shielding layer, a signal circuit layer (3) positioned between the first shielding layer and the accessorial shielding layer, and a circumferential shielding layer (6) surrounding the circuit board and electrically connecting with the first shielding layer and the accessorial shielding layer to improve shielding effect.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: November 26, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: John Chow, Yueh-Shan Shih, Yong-Chun Xu, Jian-She Hu
  • Patent number: 8586875
    Abstract: A wiring board includes a substrate having a first penetrating hole penetrating through the substrate, a first through-hole conductor formed on the inner wall of the first penetrating hole, a filler filled inside the first conductor and forming a second penetrating hole, and a second through-hole conductor formed in the second penetrating hole, a first conductive circuit formed on a first surface of the substrate; a second conductive circuit formed on a second surface of the substrate; a first conductive portion formed on one end of the second penetrating hole, and a second conductive portion formed on the opposite end of the second penetrating hole. The first conductor is connecting the first and second circuits. The second conductor is connecting the first and second conductive portions. The first circuit has the thickness which is set greater than the thickness of the first conductive portion.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: November 19, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Haruhiko Morita, Atsushi Ishida, Ryojiro Tominaga
  • Patent number: 8575492
    Abstract: A device and method of heat sinking a surface mount device (SMD) component. In an example method through holes are formed in a printed circuit board (PCB), a first copper layer is electroless plated in the holes, a second copper layer is standard plated in the holes and surrounding surfaces of the PCB, a third copper layer is masked and pulse plated in the holes, the holes are filled with non-conductive material and then is sanded flush with the second copper layer. A fourth copper layer electroless plated on the PCB over the area of the holes, a fifth copper layer (or pad) plated on the PCB over the area of the holes, and a surface mount device is attached to the fifth copper layer.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: November 5, 2013
    Assignee: Honeywell International Inc.
    Inventors: Lee H. Tullidge, Leonard De Oto, Tim Larson, Patrick O'Keefe, Herb Gertz
  • Patent number: 8569632
    Abstract: There is provided a circuit board including a substrate having a hole. Inside the hole, a metal wiring is formed. The wiring is made of a solder alloy having a melting point of 100 to 600° C., and the metal wiring includes a polycrystalline region of the solder alloy. The metal wiring of the present invention is superior in conductivity.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: October 29, 2013
    Assignee: Napra Co., Ltd.
    Inventors: Shigenobu Sekine, Yurina Sekine
  • Patent number: 8569631
    Abstract: A noise dampening energy efficient circuit board includes a carbon material layer for dampening electromagnetic interference between surface mount components and trace patterns of the circuit board. One or more ground plane layers are arranged relative to the carbon material layer to cooperatively dampen and repel noise of varying frequencies. The positioning of the carbon material layer with respect to the ground plane layer enhances the ground plane operation. Glass fiber material layers and other insulating dielectric layers are disposed at particular locations within the noise dampening energy efficient circuit board. The carbon material layer and the ground plane layer dampen electromagnetic noise, thereby permitting energy saving design considerations, increasing energy efficiencies and reducing power consumption. Mounting posts of the surface mount components include insulating sleeves to selectively insulate different layers of the circuit board from surface mount components.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: October 29, 2013
    Assignee: Tangitek, LLC
    Inventors: Robert L. Doneker, Kent G. R. Thompson
  • Patent number: 8552306
    Abstract: An assembly having a substrate and at least one component fastened thereon by sintering using a sintering agent, in particular sintering paste. The sintering agent is situated in a recess of the substrate that accommodates at least some areas of the component. A method for producing an assembly having a substrate and at least one component fastened thereon by sintering using a sintering agent, in particular sintering paste. The sintering agent is brought into a recess of the substrate that accommodates at least some areas of the component.
    Type: Grant
    Filed: July 4, 2008
    Date of Patent: October 8, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Daniel Wolde-Giorgis, Thomas Kalich
  • Patent number: 8552308
    Abstract: A differential signal pair transmission structure adapted to a wiring board and including a first signal path and a second signal path is provided. The first signal path includes a first upper trace, a first lower trace and a first conductive through via. The second signal path includes a second upper trace, a second lower trace and a second conductive through via. A portion of the first signal path and a portion of the second signal path overlaps in the normal projection onto the upper or lower surface of the wiring board. Normal projections of the first and the second signal path projecting onto the upper surface of the wiring board are substantially symmetric with respect to a line which is perpendicular to a segment connecting normal projections of axes of the first and the second through via onto the upper surface and passes through the midpoint of the segment.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: October 8, 2013
    Assignee: VIA Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Patent number: 8546698
    Abstract: A wiring board has a first rigid wiring board having a first wiring layer on a first main surface, a second rigid wiring board having a second wiring layer on a second main surface, a first connection portion connecting the first wiring layer and the second wiring layer, and a first interlayer insulation layer formed on the first wiring layer, the second wiring layer and the first connection portion. In such a wiring board, the first rigid wiring board and the second rigid wiring board are positioned in such a way that the first main surface and the second main surface are set at substantially the same level, and the first wiring layer and the second wiring layer are electrically connected by the first connection portion.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: October 1, 2013
    Assignee: Ibiden Co., Ltd.
    Inventor: Nobuyuki Naganuma