Patents Examined by Ismail A Muse
  • Patent number: 11394904
    Abstract: A solid-state imaging apparatus includes first, second, and third semiconductor regions. The third semiconductor region has a second conductivity type. The third semiconductor region extends from a region below the second semiconductor region of a first pixel to a region below the second semiconductor region of a second pixel in the first and second pixels adjacent to each other among a plurality of pixels.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: July 19, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Patent number: 11387223
    Abstract: A display device includes a substrate. A first electrode, a second electrode, and a third electrode are on the substrate, and are sequentially arranged along a first direction. A first light emitting element is located between the first electrode and the second electrode. A second light emitting element is located between the second electrode and the third electrode. A first contact electrode overlaps the first electrode and one end of the first light emitting element, and is in contact with the first electrode and the one end of the first light emitting element. A second contact electrode overlaps and is in contact with the other end of the first light emitting element. A third contact electrode overlaps and is in contact with the second electrode and the other end of the second light emitting element. The second contact electrode extends while detouring the third contact electrode.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: July 12, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Min Kyu Woo, Kyung Bae Kim, Jin Yeong Kim, Chong Chui Chai
  • Patent number: 11380657
    Abstract: Discussed is a display device comprising a substrate; a plurality of cells provided with a partition wall protruding on the substrate, and sequentially arranged along one direction; a plurality of semiconductor light-emitting elements respectively accommodated in the plurality of cells; and a first electrode provided with a plurality of electrode lines arranged on a bottom of the plurality of cells, and electrically connected to the plurality of semiconductor light-emitting elements, wherein the bottom of the plurality of cells comprise a first region covered by the plurality of electrode lines, and a second region formed between the plurality of electrode lines.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: July 5, 2022
    Assignee: LG ELECTRONICS INC.
    Inventors: Changseo Park, Bongchu Shim
  • Patent number: 11380659
    Abstract: A method of manufacturing a light-emitting device that includes providing a plurality of element structures, each of which includes a submount substrate, a light-emitting element, and a light-transmissive member in this order. The method further includes disposing the plurality of element structures such that the light-transmissive members face a sheet member, and forming a covering member on the sheet member to cover at least a portion of each of lateral surfaces of the submount substrate of each of the element structures.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: July 5, 2022
    Assignee: NICHIA CORPORATION
    Inventors: Takashi Ishii, Dai Wakamatsu, Hiroaki Kageyama
  • Patent number: 11380660
    Abstract: The present disclosure provides a manufacturing method of a micro-LED display device. In the method, a display backboard and a substrate are made separately, and then the display backboard and the substrate are synthesized, after the substrate is removed, a micro-LED array, a protective layer, and a transparent electrode layer are formed on the display backboard formed with an LED single crystal film layer. Beneficial effect is that LED transfer bonding can be self-aligned, conventional mass transfer process can be avoided, process is simple, production cost is reduced, and product yield and pixels of the micro-LED display device are greatly improved.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: July 5, 2022
    Inventor: Xiaobo Hu
  • Patent number: 11380593
    Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin on a substrate, a second fin on the substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes an insulating liner and a fill material on the insulating liner. The insulating liner abuts a first sidewall of the first fin and a second sidewall of the second fin. The insulating liner includes a material with a band gap greater than 5 eV.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: July 5, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Wen Huang, Jaming Chang, Kai Hung Cheng, Chia-Hui Lin, Jei Ming Chen
  • Patent number: 11374051
    Abstract: The present disclosure provides a photoelectric conversion array substrate and a photoelectric conversion device, and the photoelectric conversion array substrate includes: a base substrate; a thin film transistor located on the base substrate and including a gate, a gate insulating layer disposed on the gate, an active layer disposed on the gate insulating layer, and a source electrode and a drain electrode located on the active layer; a photodetection unit located on the base substrate and including a signal output electrode, a photosensitive layer and a transparent electrode that are located on the base substrate, the signal output electrode electrically connected to the drain electrode, wherein an orthographic projection of the transparent electrode on the base substrate is located within an orthographic projection of the photosensitive layer on the base substrate; a first protective layer covering the source electrode and the drain electrode.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: June 28, 2022
    Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Gang Yu
  • Patent number: 11373986
    Abstract: Reflective bank structures for light emitting devices are described. The reflective bank structure may include a substrate, an insulating layer on the substrate, and an array of bank openings in the insulating layer with each bank opening including a bottom surface and sidewalls. A reflective layer spans sidewalls of each of the bank openings in the insulating layer.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: June 28, 2022
    Assignee: Apple Inc.
    Inventors: Kapil V. Sakariya, Andreas Bibl, Hsin-Hua Hu
  • Patent number: 11367804
    Abstract: A directional photodetector comprises a photosensitive element and a light selector. The photosensitive element comprises a single-photon avalanche diode, SPAD, or an array of SPADs or SPAD array. The light selector is arranged on or above the photosensitive element, in particular on or above an active surface of the photosensitive element. The light selector is configured to restrict a field of view of the photosensitive element at least for light with a wavelength within a specified wavelength range. The light selector is configured to restrict the field of view by predominantly passing light with a direction of incidence within a range of passing directions of the light selector.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: June 21, 2022
    Assignee: AMS AG
    Inventor: Robert Kappel
  • Patent number: 11362246
    Abstract: A method of manufacturing a display device 1 includes: providing a substrate including sub-pixel defined therein and a first wiring disposed for the sub-pixel, and light-emitting element having a lower surface and a lateral surface and including a first electrode disposed on the lower surface, and a second electrode disposed on the lateral surface; mounting the light-emitting element and electrically connecting the first electrode to the first wiring; forming a resin member on the substrate and covering the light-emitting element; exposing an upper portion of the light-emitting element from an upper surface of the resin member such that the second electrode is partially exposed by removing an upper portion of the resin member; and forming a second wiring on the upper surface of the resin member excluding a portion of the light-emitting element exposed from the resin member and electrically connecting the second wiring to the second electrode.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: June 14, 2022
    Assignee: NICHIA CORPORATION
    Inventors: Kinya Ichikawa, Katsuyoshi Kadan, Masahiko Sano, Ryohei Hirose, Hiroshi Yoneda
  • Patent number: 11362072
    Abstract: A light emitting diode, a display substrate and a transfer method are disclosed. The transfer method includes: disposing a display substrate on an adsorption carrier plate, and absorbing, by a transport head, multiple light emitting diodes from a donor substrate; dropping, by the transport head, the multiple light emitting diodes onto the display substrate, the light emitting diodes falling into positioning holes on the display substrate; and absorbing and removing, by the transport head, a light emitting diode on the display substrate which does not fall into a positioning hole.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: June 14, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Li Qiang, Zhaohui Qiang, Tao Yang, Dongsheng Yin
  • Patent number: 11362105
    Abstract: A vertical memory device includes gate electrode structures, channels, first to third division patterns, and a first support layer. The gate electrode structure includes gate electrodes stacked in a first direction, and extends in a second direction. The gate electrode structures are spaced apart from one another in a third direction. The first division pattern extends in the second direction between the gate electrode structures. The second and third division patterns are alternately disposed in the second direction between the gate electrode structures. The first support layer is on the gate electrode structures at substantially the same height as upper portions of the first and second division patterns, and contacts the upper portions of the first and second division patterns. The upper portions of the first and second division patterns are arranged in a zigzag pattern in the second direction in a plan view.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: June 14, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seungmin Song, Kangmin Kim, Joongshik Shin, Geunwon Lim
  • Patent number: 11348905
    Abstract: MicroLED chips are transferred from an epitaxy wafer to a first coupon substrate. The first coupon substrate has a first, soft adhesive layer that temporarily holds the microLED chips. Using a first transfer substrate, a subset of the microLED chips are transferred from the first coupon substrate to a second coupon substrate having a second, soft adhesive layer. A pattern of microLED chips are transferred from another substrate to the second coupon substrate via a second transfer substrate to fill vacancies in the subset of microLED chips. The transfer substrates are operable to hold and release pluralities of micro objects.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: May 31, 2022
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Yunda Wang, Jengping Lu, Qian Wang, Sourobh Raychaudhuri
  • Patent number: 11342372
    Abstract: An image sensor device is provided. The image sensor device includes a semiconductor substrate having a first side, a second side opposite to the first side, and at least one light-sensing region close to the first side. The image sensor device includes a dielectric feature covering the second side and extending into the semiconductor substrate. The dielectric feature in the semiconductor substrate surrounds the light-sensing region. The image sensor device includes a reflective layer in the dielectric feature in the semiconductor substrate, wherein a top portion of the reflective layer protrudes away from the second side, and a top surface of the reflective layer and a top surface of the insulating layer are substantially coplanar.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: May 24, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Chieh Fang, Ming-Chi Wu, Ji-Heng Jiang, Chi-Yuan Wen, Chien-Nan Tu, Yu-Lung Yeh, Shih-Shiung Chen, Kun-Yu Lin
  • Patent number: 11342350
    Abstract: A semiconductor memory device is provided. The semiconductor memory device includes a memory cell array disposed on a substrate, a bit line connected to the memory cell array, a peripheral circuit disposed between the memory cell array and the substrate, the peripheral circuit including a transistor, a conductive line disposed between the memory cell array and the transistor, a lower connection structure connecting the conductive line and the transistor, and two or more upper connection structures connecting the bit line and the conductive line, the two or more upper connection structures being spaced apart from each other.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: May 24, 2022
    Assignee: SK hynix Inc.
    Inventors: Sang Heon Lee, Hyun Heo
  • Patent number: 11328988
    Abstract: A device includes a device level having a metallization structure coupled to a semiconductor device and a transistor above the device level. The transistor has a body including a single crystal group III-V or group IV semiconductor material, a source structure on a first portion of the body and a drain structure on a second portion of the body, where the source structure is separate from the drain structure. The transistor further includes a gate structure including a first gate structure portion in a recess in the body and a second gate structure portion between the source structure and the drain structure. A source contact is coupled with the source structure and a drain contact is coupled with the drain structure. The source contact is in contact with the metallization structure in the device level.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: May 10, 2022
    Assignee: Intel Corporation
    Inventors: Gilbert Dewey, Ryan Keech, Cory Bomberger, Cheng-Ying Huang, Ashish Agrawal, Willy Rachmady, Anand Murthy
  • Patent number: 11322645
    Abstract: The disclosure discloses a method for manufacturing light-emitting diode (LED) chips. The manufacturing method includes: providing a plurality of LED elements; randomly mixing the plurality of LED elements; performing a mesa process on the plurality of LED elements; and forming at least one pair of electrodes on the plurality of LED elements. An electronic device includes the LED chips.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: May 3, 2022
    Assignee: Innolux Corporation
    Inventors: Tsau-Hua Hsieh, Jian-Jung Shih, Tzu-Min Yan
  • Patent number: 11322485
    Abstract: The present disclosure relates to the field of display, specifically, to a mass transfer method for a light-emitting unit, an array substrate, and a display device. The method comprises: providing a plurality of light-emitting units in an array, wherein each light-emitting unit comprises a first electrode extending to a side edge of the light-emitting unit; providing a base substrate comprising a plurality of areas in an array, each area comprising a second electrode and an electro-curable adhesive thereon; picking up the light-emitting units by a transfer device; applying voltages to the first and second electrodes respectively; aligning the transfer device with the base substrate, such that a portion of each first electrode extending to the side edge of the light-emitting unit contacts a respective electro-curable adhesive; and separating the transfer device from the light-emitting units, such that each light-emitting unit is transferred to a respective area of the base substrate.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: May 3, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Chengtan Zhao
  • Patent number: 11312623
    Abstract: The present disclosure relates to a method of forming an integrated chip structure. The method includes forming a plurality of interconnect layers within a dielectric structure over a substrate. A dielectric layer arranged along a top of the dielectric structure is patterned to define a via hole exposing an uppermost one of the plurality of interconnect layers. An extension via is formed within the via hole and one or more conductive materials are formed over the dielectric layer and the extension via. The one or more conductive materials are patterned to define a sensing electrode over and electrically coupled to the extension via. A microelectromechanical systems (MEMS) substrate is bonded to the substrate. The MEMs substrate is vertically separated from the sensing electrode.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: April 26, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Patent number: 11316086
    Abstract: A printed structure comprises a device comprising device electrical contacts disposed on a common side of the device and a substrate non-native to the device comprising substrate electrical contacts disposed on a surface of the substrate. At least one of the substrate electrical contacts has a rounded shape. The device electrical contacts are in physical and electrical contact with corresponding substrate electrical contacts. The substrate electrical contacts can comprise a polymer core coated with a patterned contact electrical conductor on a surface of the polymer core. A method of making polymer cores comprising patterning a polymer on the substrate and reflowing the patterned polymer to form one or more rounded shapes of the polymer and coating and then patterning the one or more rounded shapes with a conductive material.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: April 26, 2022
    Assignee: X Display Company Technology Limited
    Inventors: Christopher Andrew Bower, Ronald S. Cok