Abstract: A method of fabricating a micro light emitting diode (micro LED) apparatus includes forming a first substrate including a first silicon layer, a second silicon layer, and a silicon oxide layer sandwiched between the first silicon layer and the second silicon layer; forming a plurality of micro LEDs on a side of the second silicon layer distal to the silicon oxide layer; bonding the first substrate having the plurality of micro LEDs with a second substrate; and removing the silicon oxide layer and the first silicon layer.

Abstract: A disclosed super-junction (SJ) device includes a first epitaxial (epi) layer that forms a first SJ layer of the SJ device, and includes a second epi layer disposed on the first SJ layer that forms a device layer of the SJ device. An active area of the first and second epi layers includes a first set of SJ pillars comprising a particular doping concentration of a first conductivity type and a second set of SJ pillars comprising the particular doping concentration of a second conductivity type. A termination area of the first and second epi layers has a minimized epi doping concentration of the first conductivity type that is less than the particular doping concentration, and the termination area of the second epi layer includes a plurality of floating regions of the second conductivity type that form a junction termination of the SJ device.

Abstract: A method of forming a solder connection includes forming a solder mask on a thermal pad of a printed circuit board. The solder mask leaves unmasked portions of the thermal pad and forming the solder mask includes forming a plurality of mask stripes extending from edges of each unmasked portion towards a center of the unmasked portion. The method includes depositing solder paste on the unmasked portions of the thermal pad and placing an exposed thermal pad of an integrated circuit package on the solder paste deposited on the thermal pad of the printed circuit board. The method includes forming a solder connection by heating the solder paste between the unmasked portions of the thermal pad on the printed circuit board and the exposed thermal pad of the integrated circuit package.

Abstract: A semiconductor light emitting element according to an embodiment of the present disclosure includes: a n-type semiconductor layer; a p-type semiconductor layer formed in a first region on the n-type semiconductor layer; a p-type electrode formed on the p-type semiconductor layer; a n-type electrode formed in a second region different from the first region on the n-type semiconductor layer; and a magnetic layer formed under the n-type semiconductor layer.

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a gate structure on the substrate. The semiconductor device includes a channel on the substrate. The semiconductor device includes a source/drain layer on the channel. Moreover, the semiconductor device includes a spacer on a sidewall of the gate structure. The spacer includes a central portion overlapping the channel in a vertical direction, and a protrusion portion protruding from the central portion. Related methods of manufacturing semiconductor devices are also provided.

Abstract: The present application relates to a display screen and an electronic device. The display screen comprises a first display area for arranging a front device, wherein the first display area is provided with a first type of light-emitting unit; the first type of light-emitting unit comprises a pixel area and an electrochromic light transmittance material disposed around the pixel area; the electrochromic light transmittance material exhibits a light absorption property when being energized; and the electrochromic light transmittance material exhibits a light transmission property when not being energized. In addition, the present application also relates to an electronic device comprising the above-mentioned display screen.

Abstract: A semiconductor chip includes a semiconductor die formed on a substrate, a first power mesh formed on the substrate, and a second power mesh formed on the substrate electrically isolated from the first power mesh. The semiconductor chip also includes a first circuit block formed on the substrate and electrically connected to the first power mesh, and a second circuit block formed on the substrate and electrically connected to the second power mesh. The first circuit block and the second circuit block are communicatively coupled to a first plurality of external circuit connections and a second plurality of external circuit connections, respectively. The semiconductor chip also includes one or more first signal pins and one or more second signal pins formed on the substrate, the first and second signal pins designed to receive external signals.

Abstract: A method for manufacturing a light emitting device includes: providing an intermediate structure including first and second layered structures arranged in a first direction in a light reflecting member, wherein each of the layered structures includes a first and second electrodes arranged in a second direction, and wherein the intermediate structure has a first surface at which the first and second electrodes are exposed; on the first surface, forming a first hole in the light reflecting member between the first electrodes as viewed in the second direction; on the first surface, forming a second hole in the light reflecting member between the second electrodes as viewed in the second direction; forming a conductive film on exposed surfaces of the first and second electrodes, and in the first and second holes; and severing the light reflecting member and the conductive film at positions that pass through the first and second holes.

Abstract: The present application discloses a method for manufacturing an LED filament, which includes: operation , a plurality of metal sheets are provided and arranged at least two rows in parallel; operation S2, a plurality of brackets are provided, and each bracket is located between two corresponding metal sheets and fixedly connected to the two metal sheets; operation S3, a plurality of LED chips are provided and attached to each of the brackets, and the LED chips are electrically connected to the metal sheets by conducting wire; operation S4, each bracket, the LED chips defined on the bracket, the conducting wire defined on the bracket, and the joints of the bracket and the metal sheets are all cladded using packaging material to form an encapsulation layer, and the encapsulation layer, the bracket, the LED chips, the conducting wire, and the connected two metal sheets cooperatively form an LED filament.

Abstract: A low forming voltage NVM device is provided by forming a pair of sacrificial conductive pads on an interconnect dielectric material layer that embeds a pair of second electrically conductive structures and a patterned material stack. One of the sacrificial conductive pads has a first area and contacts a surface of one of the second electrically conductive structures that contacts a surface of an underlying first electrically conductive structure, and the other of the sacrificial conductive pads has a second area, different from the first area, and contacts a surface of another of the second electrically conductive structures that contacts a surface of a top electrode of the patterned material stack. A plasma treatment is performed to induce an antenna effect and to convert a dielectric switching material of the patterned material stack into a conductive filament. After plasma treatment, the pair of sacrificial conductive pads is removed.

Abstract: Some embodiments relate to a memory device. The memory device includes a memory cell overlying a substrate, the memory cell includes a data storage structure disposed between a lower electrode and an upper electrode. An upper interconnect wire overlying the upper electrode. A first inter-level dielectric (ILD) layer surrounding the memory cell and the upper interconnect wire. A second ILD layer overlying the first ILD layer and surrounding the upper interconnect wire. A sidewall spacer laterally surrounding the memory cell. The sidewall spacer has a first sidewall abutting the first ILD layer and a second sidewall abutting the second ILD layer.

Abstract: A light-emitting element which has low driving voltage and high emission efficiency is provided. The light-emitting element includes, between a pair of electrodes, a hole-transport layer and a light-emitting layer over the hole-transport layer. The light-emitting layer contains a first organic compound having an electron-transport property, a second organic compound having a hole-transport property, and a light-emitting third organic compound converting triplet excitation energy into light emission. A combination of the first organic compound and the second organic compound forms an exciplex. The hole-transport layer contains at least a fourth organic compound whose HOMO level is lower than or equal to that of the second organic compound and a fifth organic compound whose HOMO level is higher than that of the second organic compound.

Abstract: A method of producing semiconductor nanoparticles is provided. The method includes heating primary semiconductor nanoparticles and a salt of an element M1 in a solvent at a temperature set in a range of 100° C. to 300° C. The primary semiconductor nanoparticles contain the element M1, an element M2, optionally an element M3, and an element Z, and have an average particle size of 50 nm or less. The element M1 is at least one element selected from the group consisting of Ag, Cu, and Au. The element M2 is at least one element selected from the group consisting of Al, Ga, In, and Tl. The element M3 is at least one element selected from the group consisting of Zn and Cd. The element Z is at least one element selected from the group consisting of S, Se, and Te.

Abstract: OLEDs containing a stacked hybrid architecture including a phosphorescent organic emissive unit and two fluorescent organic emissive units are disclosed. The stacked hybrid architecture includes a plurality of electrodes and a hybrid emissive stacked disposed between at least two of the electrodes. The stack contains at least three emissive units and at least two charge generation layers. At least one of the three emissive units is a phosphorescent organic emissive unit and at least two of the three emissive units are fluorescent organic emissive units. More specifically, the two fluorescent organic emissive units may be blue organic emissive units that emit light from the same or different color regions.

Abstract: Semiconductor device packages may include a first semiconductor device over a substrate and a second semiconductor device over the first semiconductor device. An active surface of the second semiconductor device may face away from the substrate. Electrical interconnections may extend from bond pads of the second semiconductor device, along surfaces of the second semiconductor device, first semiconductor device, and substrate to pads of routing members of the substrate. The electrical interconnections may include conductors in contact with the bond pads and the routing members and a dielectric material interposed between the conductors and the first semiconductor device, the second semiconductor device and the substrate between the bond pads and the pad of the routing members. An encapsulant distinct from the dielectric material may cover the electrical interconnections, the first semiconductor device, the second semiconductor device, and an upper surface of the substrate.

Abstract: The present disclosure provides a display panel and a display device. The display panel has a display area and a non-display area surrounding the display area. The display panel includes: at least one barrier portion located in the non-display area, the at least one barrier portion including a first barrier portion and a second barrier portion, and the second barrier portion being located at a side of the first barrier portion that is away from the display area; a first signal line for applying a first signal; and at least one electrostatic discharge unit arranged between the first barrier portion and the second barrier portion. The at least one electrostatic discharge unit includes a first electrostatic discharge unit. The first electrostatic discharge unit is connected to the first signal line and configured to discharge static electricity on the first signal line.

Abstract: An LED, a manufacturing method thereof, and a display device including an LED are provided. Specifically, the disclosure relates to a flip-chip LED with high efficiency including a current confinement structure and a manufacturing method thereof, and a display device including such an LED. In particular, a flip-chip LED according to the disclosure includes a resistive area that surrounds a light-emitting layer and restricts current flow from the light emitting layer to the sidewalls.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a first light-emitting diode (LED) layer including a first LED of a first color type, the first LED layer having a first side and a second side opposite to the first side; a second LED layer over the first LED layer, the second LED layer including a second LED of a second color type, and the second LED layer having a first side and a second side opposite to the first side; and a third LED layer over the second LED layer, the third LED layer including a third LED of a third color type, and the third LED layer having a first side and a second side opposite to the first side; wherein the first color type, the second color type, and the third color type are different from each other.

Abstract: A display apparatus includes a substrate on which a first indented portion indented inward along one side of the substrate is formed; a first pad unit and a second pad unit spaced apart from each other on the substrate along the one side; a display unit above the substrate and having a shape indented inward between the first pad unit and the second pad unit; an encapsulating unit encapsulating the display unit; and a wiring film bent from a first surface of the substrate to a second surface of the substrate, the wiring film including a third pad unit and a fourth pad unit connected to the first pad unit and the second pad unit, respectively, and a second indented portion indented inward between the third pad unit and the fourth pad unit.

Abstract: A method for transferring a large number of light emitting elements in a single operation during display panel manufacture includes providing a receiving substrate with light emitting elements; orienting the light emitting elements on a first platform by a first electromagnetic plate; transferring the light emitting elements on the first platform to a second platform by a second electromagnetic plate; and transferring the light emitting elements on the second platform to the receiving substrate by a third electromagnetic plate. Each light emitting element undergoes a coarse positioning and finer positionings during the transfer process, so an accuracy of the light emitting elements is high.