Patents Examined by Ismail Muse
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Patent number: 11837686Abstract: An optical device package includes a substrate, a light emitting device, a light detecting device, one or more electronic chips, a clear encapsulation layer and a patterned reflective layer. The substrate has a surface. The light emitting device is disposed on the surface of the substrate, the light detecting device is disposed on the surface of the substrate, and the light emitting device and the light detecting device have a gap. The one or more electronic chips are at least partially embedded in the substrate, and electrically connected to the light emitting device and the light detecting device. The clear encapsulation layer is disposed on the surface of the substrate and encapsulates the light emitting device and the light detecting device. The patterned reflective layer is disposed on an upper surface of the clear encapsulation layer and at least overlaps the gap between the light emitting device and the light detecting device in a projection direction perpendicular to the surface of the substrate.Type: GrantFiled: December 6, 2019Date of Patent: December 5, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chanyuan Liu, Kuo-Hsien Liao, Alex Chi-Hong Chan, Fuh-Yuh Shih
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Patent number: 11825691Abstract: Embodiments of the present disclosure disclose a display panel and a fabricating method thereof. In the solution, on one hand, water-absorbing magnetic nanoparticles in a packaging layer are distributed along a direction perpendicular to the cover plate at a side far away from an OLED component, or distributed along an extension direction of the packaging layer at a periphery of a region in which the OLED component is located, thus reducing the damage to the OLED component of a display substrate. On the other hand, since the water-absorbing magnetic nanoparticles have magnetic property, the water-absorbing magnetic nanoparticles can be doped in the packaging layer material in a packaging and waterproofing process, and a magnetic field is applied to induce the magnetic nanoparticles to move to the side far away from the OLED component or to the periphery of the region in which the OLED component is located.Type: GrantFiled: November 28, 2017Date of Patent: November 21, 2023Assignee: BOE Technology Group Co., Ltd.Inventor: Donghui Yu
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Patent number: 11823921Abstract: A substrate processing apparatus includes a suctioning unit for suctioning a processing liquid existing inside a processing liquid pipe that communicates with a discharge port, and a controller. In the suctioning step, the controller executes a suctioning step of suctioning the processing liquid existing inside the processing liquid pipe by the suctioning unit. The controller selectively executes a first suctioning step of retracting a leading end surface of the processing liquid and disposing the leading end surface of the processing liquid after suctioning in a preliminarily set standby position inside the processing liquid pipe, and a second suctioning step of retracting the leading end surface of the processing liquid further back than the standby position.Type: GrantFiled: June 28, 2018Date of Patent: November 21, 2023Inventors: Michinori Iwao, Shuichi Yasuda, Kazuhiro Fujita, Noriyuki Kikumoto, Takahiro Yamaguchi
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Patent number: 11810904Abstract: A micro light emitting diode structure includes a temporary substrate, a plurality of micro light emitting elements, a plurality of light blocking structures, and a connection layer. The micro light emitting elements and the light blocking structures are disposed on the temporary substrate and arranged alternately. Each of the light blocking structures includes a light blocking layer, and a light shielding layer disposed on the light blocking layer. The micro light emitting elements and the light blocking structures are fixed to the temporary substrate by the connection layer. A reflectivity of the light blocking layer is greater than a reflectivity of the connection layer, and a Young's modulus of the light blocking layer is greater than a Young's modulus of the connection layer.Type: GrantFiled: October 29, 2020Date of Patent: November 7, 2023Assignee: PlayNitride Display Co., Ltd.Inventor: Yun-Li Li
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Patent number: 11804568Abstract: Optoelectronic components, groups of optoelectronic components, and methods for producing a component or a plurality of optoelectronic components are provided. The method may include providing a growth substrate having a buffer layer arranged thereon. The buffer layer may be structured in such a way that it has a plurality of the openings which are spaced apart from one another in lateral directions. A plurality of semiconductor bodies may be formed in the openings, wherein in the areas of the openings, the buffer layer has subregions which are arranged in a vertical direction between the growth substrate and the semiconductor bodies. The growth substrate may be detached from the semiconductor bodies. The buffer layer may be removed at least in the areas of the subregions.Type: GrantFiled: April 26, 2019Date of Patent: October 31, 2023Assignee: Osram OLED GmbHInventors: Rainer Hartmann, Clemens Vierheilig, Tobias Meyer, Andreas Rueckerl, Tilman Schimpke, Michael Binder
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Patent number: 11798850Abstract: A semiconductor device including a contact structure is provided. The semiconductor device includes an isolation region defining a lower active region. First and second source/drain regions and first and second gate electrodes are on the lower active region. The first and second source/drain regions are adjacent to each other. First and second gate capping patterns are on the first and second gate electrodes, respectively. First and second contact structures are on the first and second source/drain regions, respectively. A lower insulating pattern is between the first and second source/drain regions. An upper insulating pattern is between the first and second contact structures. Silicon oxide has etching selectivity with respect to an insulating material which the upper insulating pattern, the first gate capping pattern, and the second gate capping pattern are formed of.Type: GrantFiled: August 10, 2021Date of Patent: October 24, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hwi Chan Jun, Chang Hwa Kim, Dae Won Ha
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Patent number: 11798864Abstract: Provided is a semiconductor package including: a first substrate comprising a specific pattern formed thereon to enable electrical connection; a second substrate, which is spaced apart from and faces the first substrate, comprising a specific pattern formed thereon to enable electrical connection; at least one semiconductor chip attached to the first substrate; at least one metal post formed in a non-vertical structure between the first substrate and the second substrate for dispersing a coefficient of thermal expansion (CTE) stress directly generated from the second substrate, wherein the metal post comprises one end attached on the at least one semiconductor chip, and the other end attached on the pattern of the first substrate or the second substrate; at least one terminal lead electrically connected to the first substrate or the second substrate; and a package housing covering the first and second substrates and exposing the terminal leads to the outside.Type: GrantFiled: January 13, 2021Date of Patent: October 24, 2023Assignee: JMJ Korea Co., Ltd.Inventor: Yun Hwa Choi
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Patent number: 11798898Abstract: Package structures are provided. A package structure includes an adhesive layer and a semiconductor substrate over the adhesive layer. The package structure also includes a connector over the semiconductor substrate. The package structure further includes a first buffer layer surrounding the connector and the semiconductor substrate and covering the adhesive layer. An interface between the adhesive layer and the first buffer layer is substantially level with a bottom surface of the semiconductor substrate. In addition, the package structure includes an encapsulation layer surrounding the first buffer layer. The package structure also includes a redistribution layer over the first buffer layer and the encapsulation layer.Type: GrantFiled: July 2, 2021Date of Patent: October 24, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsiao-Wen Lee, Hsien-Wen Liu, Shin-Puu Jeng
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Patent number: 11784170Abstract: A light emitting device that includes a plurality of element structures, a frame, and a covering member. Each of the plurality of element structures includes a light emitting element. The frame surrounds the plurality of element structures. The covering member is disposed on an inner side of the frame. The covering member is disposed between the frame and an element structure of the plurality of element structures adjacent to the frame and between adjacent element structures of the plurality of element structures. An upper surface and a lower surface of each of the plurality of element structures are exposed from the covering member.Type: GrantFiled: May 27, 2022Date of Patent: October 10, 2023Assignee: NICHIA CORPORATIONInventors: Takashi Ishii, Dai Wakamatsu, Hiroaki Kageyama
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Patent number: 11784294Abstract: Vertical solid-state transducers (“SSTs”) having backside contacts are disclosed herein. An SST in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the SST, a second semiconductor material at a second side of the SST opposite the first side, and an active region between the first and second semiconductor materials. The SST can further include first and second contacts electrically coupled to the first and second semiconductor materials, respectively. A portion of the first contact can be covered by a dielectric material, and a portion can remain exposed through the dielectric material. A conductive carrier substrate can be disposed on the dielectric material. An isolating via can extend through the conductive carrier substrate to the dielectric material and surround the exposed portion of the first contact to define first and second terminals electrically accessible from the first side.Type: GrantFiled: January 4, 2021Date of Patent: October 10, 2023Assignee: Micron Technology, Inc.Inventors: Vladimir Odnoblyudov, Martin F. Schubert
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Patent number: 11777065Abstract: A white-light-emitting inorganic light-emitting-diode (iLED) structure comprises first iLEDs electrically connected in series, each first iLED emitting a different color of light from any other first iLED when electrical power is provided to the first iLEDs, and a second iLED electrically connected to one of the first iLEDs, the second iLED emitting the same color of light as the one of the first iLEDs when electrical power is provided to the first iLEDs. The second iLED can be electrically connected in series or in parallel with the one of the first iLEDs. Such iLED structures can be used at least in displays, lamps, and indicators.Type: GrantFiled: May 29, 2020Date of Patent: October 3, 2023Assignee: X Display Company Technology LimitedInventors: Matthew Alexander Meitl, Ronald S. Cok
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Patent number: 11768403Abstract: A backlight assembly, a manufacturing method thereof, and a display device are provided. The backlight assembly includes: a substrate, an anode trace and a cathode trace of an LED on the substrate, a planarization layer on a layer where the anode trace and the cathode trace of the LED are located, and an anode connection pad and a cathode connection pad on the planarization layer. The anode trace of the LED is coupled to the anode connection pad through a first via hole penetrating through the planarization layer, and the cathode trace of the LED is coupled to the cathode connection pad through a second via hole penetrating through the planarization layer. An exhaust channel is further arranged on the planarization layer to discharge gas accumulated in the planarization layer.Type: GrantFiled: December 11, 2019Date of Patent: September 26, 2023Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Shengguang Ban, Zhanfeng Cao, Ke Wang
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Patent number: 11769852Abstract: A method of manufacturing a light emitting element according to certain embodiments of the present disclosure includes: scanning and irradiating a first laser light having a first irradiation intensity to a sapphire substrate along predetermined dividing lines collectively in a shape of a tessellation of a plurality of hexagonal shapes in a top view to create a plurality of first modified regions along the predetermined dividing lines; and scanning and irradiating a second laser light having a second irradiation intensity greater than the first irradiation intensity to the sapphire substrate along the predetermined dividing lines to create a plurality of second modified regions overlapping the plurality of first modified regions.Type: GrantFiled: July 31, 2020Date of Patent: September 26, 2023Assignee: NICHIA CORPORATIONInventors: Masayuki Ibaraki, Minoru Yamamoto, Naoto Inoue, Hiroaki Tamemoto
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Patent number: 11764257Abstract: A disclosed super-junction (SJ) device includes a first epitaxial (epi) layer that forms a first SJ layer of the SJ device, and includes a second epi layer disposed on the first SJ layer that forms a device layer of the SJ device. An active area of the first and second epi layers includes a first set of SJ pillars comprising a particular doping concentration of a first conductivity type and a second set of SJ pillars comprising the particular doping concentration of a second conductivity type. A termination area of the first and second epi layers has a minimized epi doping concentration of the first conductivity type that is less than the particular doping concentration, and the termination area of the second epi layer includes a plurality of floating regions of the second conductivity type that form a junction termination of the SJ device.Type: GrantFiled: January 10, 2022Date of Patent: September 19, 2023Assignee: General Electric CompanyInventors: Stephen Daley Arthur, Victor Mario Torres, Michael J. Hartig, Reza Ghandi, David Alan Lilienfeld, Alexander Viktorovich Bolotnikov
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Patent number: 11757062Abstract: A method for manufacturing a light emitting device includes: preparing a substrate having a first region and a second region surrounding the first region; mounting a plurality of light emitting elements in the first region; mounting a reinforcement member on the second region; forming and curing a sealing member in contact with the reinforcement member and with the light emitting elements, the sealing member having a lower rigidity than the reinforcement member; and cutting the substrate, the reinforcement member, and the sealing member to separate into individual light emitting devices each including one or more of the light emitting elements.Type: GrantFiled: September 9, 2020Date of Patent: September 12, 2023Assignee: NICHIA CORPORATIONInventor: Yoichi Bando
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Patent number: 11757080Abstract: The present invention relates to a multi-sided light-emitting circuit board, which includes: a transparent substrate layer and a first conductive circuit layer on at least one surface of the transparent substrate layer. The first conductive circuit layer includes conductive portions arranged at intervals. A metal piece is formed on a surface of each conductive portion away from the transparent substrate layer. An accommodation space is formed between adjacent metal pieces. The accommodation space is provided with a light-emitting chip. Each light-emitting chip includes two electrodes. The two electrodes are respectively located at opposite ends of the light-emitting chip. The electrodes are respectively electrically connected to adjacent metal pieces. An encapsulant layer is formed on a surface of the first conductive circuit layer. The encapsulant layer covers and encapsulates the metal pieces and the light-emitting chips.Type: GrantFiled: November 27, 2019Date of Patent: September 12, 2023Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTDInventors: Zu-Ai Li, Mei-Hua Huang, Jin-Cheng Wu, Si-Hong He, Ning Hou
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Patent number: 11757249Abstract: A substrate for mounting a light-emitting element includes a substrate with a plate shape and a base that protrudes from a front surface of the substrate, wherein the base has a mounting part for mounting a light-emitting element on a top surface thereof and composes a sloping surface that slopes with respect to the front surface and the substrate and the base are integrally formed of a ceramic.Type: GrantFiled: November 19, 2018Date of Patent: September 12, 2023Assignee: KYOCERA CorporationInventor: Youji Furukubo
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Patent number: 11742457Abstract: The disclosure discloses a method for manufacturing light-emitting diode (LED) chips. The manufacturing method includes: providing a plurality of LED elements; randomly mixing the plurality of LED elements; performing a mesa process on the plurality of LED elements; and forming at least one pair of electrodes on the plurality of LED elements. An electronic device includes the LED chips.Type: GrantFiled: March 24, 2022Date of Patent: August 29, 2023Assignee: Innolux CorporationInventors: Tsau-Hua Hsieh, Jian-Jung Shih, Tzu-Min Yan
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Patent number: 11742368Abstract: An image sensing device is disclosed. The image sensing device includes a semiconductor substrate including an active region, a first impurity region and a second impurity region formed in the active region, a photoelectric conversion region disposed over the semiconductor substrate to be directly coupled to the first impurity region and configured to generate photocharges in response to incident light and transmit the generated photocharges to the first impurity region, a switching element disposed coupled to the first impurity region and the second impurity region and configured to transmit the photocharges stored in the first impurity region to the second impurity region, an insulation structure disposed on sides of the photoelectric conversion region and a plurality of conductive lines disposed in the insulation structure and configured to read out an electrical image signal corresponding to the photocharges generated by the photoelectric conversion region.Type: GrantFiled: March 11, 2021Date of Patent: August 29, 2023Assignee: SK hynix Inc.Inventor: Byoung Gyu Kim
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Patent number: 11742334Abstract: A light emitting assembly includes a substrate, an adhesive layer on the substrate, and a plurality of light emitting units on the adhesive layer. Each of the light emitting units includes a first-type semiconductor layer, a second-type semiconductor layer, an active layer disposed between the first-type and second-type semiconductor layers, a first electrode electrically connected to the first-type semiconductor layer, and a second electrode electrically connected to the second-type semiconductor layer. A light emitting apparatus including the light emitting assembly is provided. Methods for making the light emitting assembly and the light emitting apparatus are provided.Type: GrantFiled: October 27, 2020Date of Patent: August 29, 2023Assignee: Xiamen San'An Optoelectronics Co., Ltd.Inventors: Tung-Kai Liu, Shao-Ying Ting, Chen-Ke Hsu, Chia-En Lee