Patents Examined by J. Dudek
  • Patent number: 11868617
    Abstract: A peripheral device may implement storage virtualization for non-volatile storage devices connected to the peripheral device. A host system connected to the peripheral device may host one or multiple virtual machines. The peripheral device may implement different virtual interfaces for the virtual machines or the host system that present a storage partition at a non-volatile storage device to the virtual machine or host system for storage. Access requests from the virtual machines or host system are directed to the respective virtual interface at the peripheral device. The peripheral device may perform data encryption or decryption, or may perform throttling of access requests. The peripheral device may generate and send physical access requests to perform the access requests received via the virtual interfaces to the non-volatile storage devices. Completion of the access requests may be indicated to the virtual machines via the virtual interfaces.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: January 9, 2024
    Assignee: Amazon Technologies, Inc.
    Inventors: Raviprasad Venkatesha Murthy Mummidi, Matthew Shawn Wilson, Anthony Nicholas Liguori, Nafea Bshara, Saar Gross, Jaspal Kohli
  • Patent number: 11868631
    Abstract: A system startup method includes creating a first thread when a kernel driver in a kernel mode detects a first disk partition, reading, in the kernel mode, metadata of the first disk partition using the first thread, and writing the metadata of the first disk partition into a first page cache using the first thread. In the kernel mode, metadata of a disk partition is pre-cached into a page cache using the first thread, and in a subsequent process in a user mode, the metadata of the disk partition is directly read from the page cache. A storage area of the page cache is memory and has a higher read/write operation rate compared with a disk.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: January 9, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Chen Gong, Biao He, Chao Yu, Wei Fang
  • Patent number: 11868658
    Abstract: A memory controller is configured with a plurality of processors to be operated in parallel so that overhead of firmware may be reduced. The memory controller includes a first processor and a second processor. The first processor is configured to generate a command corresponding to a request received from a host and to translate a logical address included in the request into a physical address of a memory device. The second processor is configured to operate on data to be output to the memory device or on data received from the memory device. If the request is received from the host when the second processor is in an idle state, the first processor may control the second processor to release the idle state of the second processor and to perform an operation of logging command information corresponding to the request.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: January 9, 2024
    Assignee: SK hynix Inc.
    Inventor: Dong Hwan Kim
  • Patent number: 11868643
    Abstract: The memory sub-systems of the present disclosure selects, for memory scans, a memory block which has a highest page fill ratio. In one embodiment, the memory sub-system identifies a number of block stripes located on a logical unit (LU) identified by a logical unit number (LUN), where the LU is one of a plurality of LUs of a memory device. The sub-system determines a fill ratio for each of the plurality of block stripes. The sub-system selects, among the block stripes, a block stripe with a highest fill ratio. The sub-system identifies, from the selected block stripe, a memory block of the LU. The sub-system performs a memory scan operation on the memory block of the memory device.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Alex J. Wesenberg, Johnny A. Lam, Michael Winterfeld
  • Patent number: 11861191
    Abstract: Methods, systems, and devices for parameter table protection for a memory system are described. Upon booting a memory system for a first time, the memory system or a host system may generate an error control code associated with parameter data stored to the memory system. The error control code may be stored to the memory system and may be configured to correct one or more errors in the parameter data upon subsequent boot sequences of the memory system. Accordingly, upon booting the memory system for a second or a subsequent time, the error control code may be used to identify and correct errors in the parameter data, which may reduce the quantity of copies of parameter data stored to the memory system and may prevent the memory system from experiencing a system crash.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: January 2, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Binbin Huo
  • Patent number: 11861183
    Abstract: A disk device includes a volatile memory, a nonvolatile memory, and a controller. The controller is configured to receive, from a host, a key setting request that includes a cryptographic key, a key ID thereof, and tag information of the cryptographic key and generate generation information of the cryptographic key. The controller is also configured to store a first entry including the tag information, the cryptographic key, and the generation information associated with each other in the volatile memory, and store a second entry including the key ID and the generation information associated with each other in the nonvolatile memory.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: January 2, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kazumasa Nomura, Kana Furuhashi
  • Patent number: 11853615
    Abstract: In some examples, a data node may provide a file system executed in a user space. The data node may invoke a device check process configured to perform a test for failure of a storage device associated with a target volume by sending a file system level request for obtaining metadata of data stored to the target volume. For instance, the target volume may be a virtual storage volume that represents storage capacity on a network storage. The user-space file system may receive the request for the metadata and may retrieve preconfigured metadata of the target volume that is stored locally in advance of the invoking of the device check process. The preconfigured metadata may be sent to the device check process in response to the request. For example, the preconfigured metadata may at least partially cause the target volume to pass the test.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: December 26, 2023
    Assignee: HITACHI VANTARA LLC
    Inventors: Benjamin B. Clifford, Yan Liu
  • Patent number: 11853616
    Abstract: An illustrative method may include creating a volume object based on a request that includes a user token that indicates an identifier of a user associated with the request, the volume object corresponding to a physical or virtual volume of storage; creating an ownership object corresponding to the volume object, the creating comprising obtaining the identifier of the user from the user token and including the identifier in the ownership object; and including in the ownership object an access control list that is associated with an operation type, the access control list comprising identifiers of users and/or user groups who have permission to perform operations on the volume object.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: December 26, 2023
    Assignee: Pure Storage, Inc.
    Inventor: Luis Pablo Pabón
  • Patent number: 11853561
    Abstract: A primary storage array calculates signatures of chunks of production device data that are sent to a target device on a secondary storage array. The chunk signatures are sent to a signature device on the secondary storage array, where the chunk signatures are stored within the same LBA range on the signature device as their corresponding chunks are stored on the target device. Snaps of the target and signature device are created and associated as a snap pair. Later, the primary storage array calculates signatures of changed chunks of production device data that are sent to the target device. The changed chunk signatures are sent to the signature device. New snaps of the target and signature device are created and associated as a new snap pair. Chunk data is validated by calculating signatures of the chunks from the target device and comparing those signatures with the chunk signatures from the signature device.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: December 26, 2023
    Assignee: Dell Products L.P.
    Inventors: Arieh Don, Krishna Deepak Nuthakki, Jehuda Shemer
  • Patent number: 11847335
    Abstract: A trigger condition associated with latent read disturb in a memory device is detected. In response to detecting the trigger condition associated with latent read disturb, one or more blocks in the memory device that are impacted by the trigger condition are placed in a stable state to mitigate latent read disturb in the one or more blocks.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: December 19, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Pitamber Shukla, Scott Anthony Stoller, Niccolo' Righetti, Giuseppina Puzzilli
  • Patent number: 11847350
    Abstract: According to one embodiment, a storage system performs a first allocation operation of allocating, for a first namespace, a plurality of first blocks included in the blocks of a nonvolatile memory. The storage system performs a read operation, a write operation or an erase operation on one of the first blocks in response to a command received from a host to read, write or erase the one first block, counts the total number of erase operations performed on the first blocks, and notifies the host of the counted number of erase operations in response to a command received from the host to obtain an erase count associated with the first namespace.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: December 19, 2023
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Shinichi Kanno
  • Patent number: 11847353
    Abstract: Methods, systems, and devices for suspend operation with data transfer to a host system are described. A host system may transmit a read command to a memory system operating in a first mode of operation (e.g., a standard mode associated with a nominal power consumption) indicating for the memory system to transition to a second mode of operation (e.g., a suspend mode associated with a decreased power consumption). Here, the memory system may transmit an image of the memory system stored in volatile memory to the host system and transition the memory system to the second mode. Additionally, the host system may transmit, to the memory system operating in the second mode, a write command including the image and indicating for the memory system to transition to the first mode. Here, the memory system may write the image to the volatile memory and transition to the first mode.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: December 19, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Jonathan S. Parry, Christian M. Gyllenskog, Luca Porzio
  • Patent number: 11842065
    Abstract: A data storage device stores data in non-volatile memory. In one approach, a method includes: storing software in a compressed format in a first mode (e.g., an SLC mode) in a non-volatile memory; exposing, while the software is stored in the first mode, the non-volatile memory to a temperature greater than a predetermined threshold; determining that the temperature of the non-volatile memory has fallen below the predetermined threshold; and in response to determining that the temperature of the non-volatile memory has fallen below the predetermined threshold: decompressing the stored software, and storing the decompressed software in a second mode (e.g., TLC mode) in the non-volatile memory. The second mode has a storage density higher than the first mode.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: December 12, 2023
    Assignee: Lodestar Licensing Group LLC
    Inventor: Junichi Sato
  • Patent number: 11836373
    Abstract: Apparatus and methods are disclosed, including receiving an indication to selectively erase first data stored on a first page of a first subset of a group of multi-level memory cells of the storage system, each multi-level memory cell comprising multiple pages and providing, in response the indication to selectively erase the first data, at least one soft erase pulse to the first page of memory cells associated with the first data to induce distribution overlap across different bit levels of the first page of the group of multi-level memory cell.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: December 5, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Giuseppe Cariello, Fulvio Rori
  • Patent number: 11836390
    Abstract: A storage services device includes: a first processor that provides first server services for a server having a second processor that is coupled to a second storage and that provides second server services of the server and a storage controller coupled to a first storage of the server that transmits information about the first storage to the first processor. The storage services device is disposed in the server and disaggregates, within the server, the first server services from the second server services.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: December 5, 2023
    Assignee: Dell Products L.P.
    Inventors: Balasubramanian Chandrasekaran, Lucas Avery Wilson, Dharmesh M. Patel
  • Patent number: 11836517
    Abstract: A method includes receiving a memory access request comprising a first memory address and translating the first memory address to a second memory address using a first page table associated with the first virtual machine. The first page table indicates whether the memory of the first virtual machine is encrypted. The method further includes determining that the first virtual machine is nested within a second virtual machine and translating the second memory address to a third memory address using a second page table associated with the second virtual machine. The second page table indicates whether the memory of the second virtual machine is encrypted.
    Type: Grant
    Filed: October 6, 2022
    Date of Patent: December 5, 2023
    Assignee: Red Hat, Inc.
    Inventors: Michael Tsirkin, Karen Lee Noel
  • Patent number: 11829258
    Abstract: A drive recorder includes: a recording control unit that records vehicle information in a first recording medium; a deterioration detection unit that detects deterioration of the first recording medium; a backup processing unit that performs a backup process of transferring at least a portion of the vehicle information recorded in the first recording medium to a second recording medium in response to detection of deterioration of the first recording medium; a suspension determination unit that determines whether it is possible to suspend recording the vehicle information in the first recording medium, based on the vehicle information; and an initialization processing unit that initializes the first recording medium when it is determined that the backup process is completed and it is possible to suspend recording the vehicle information.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: November 28, 2023
    Assignee: JVCKENWOOD Corporation
    Inventors: Yuichi Murakami, Yusuke Yamaguchi
  • Patent number: 11829622
    Abstract: A method for selectively untying at least one of compression related links to a stale reference chunk, the method may include determining whether a compression effectiveness condition is fulfilled in relation to a set of referring chunks that are compressed using the stale reference chunk and are linked to the to the stale reference chunk by the compression related links; wherein the compression effectiveness condition is responsive to, at least, a number of the referring chunks of the set; and untying the at least one compression related links to the stale reference chunks when the compression effectiveness condition is not fulfilled.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: November 28, 2023
    Assignee: VAST DATA LTD.
    Inventors: Lior Klipper, Alon Berger, Itay Khazon, Yogev Vaknin
  • Patent number: 11829625
    Abstract: Embodiments of the present disclosure relate to managing communications between slices on a storage device engine. Shared slice memory of a storage device engine is provisioned for use by each slice of the storage device engine. The shared slice memory is a portion of total storage device engine memory. Each slice's access to the shared memory portion is controlled.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: November 28, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Rong Yu, Jingtong Liu, Peng Wu
  • Patent number: 11822796
    Abstract: A method includes detecting a power-up event associated with a memory sub-system comprising a plurality of blocks of memory cells having blocks of memory cells associated therewith, responsive to detecting the power-up event and prior to receipt of signaling indicative of a host initiation sequence, determining that a block of memory cells associated with a respective block among the plurality of blocks of memory cells is an open virtual block of memory cells, determining that the respective block associated with the open virtual block of memory cells exhibits greater than a threshold health characteristic value, and selectively performing a media management operation of a respective block of memory cells associated with the open virtual block of memory cells in response to the determination that the respective block exhibits greater than the threshold health characteristic value.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: November 21, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Tao Liu, Xiangang Luo