Patents Examined by J. Dudek
  • Patent number: 11747981
    Abstract: A data access system has host computers having front-end controllers nFE_SAN connected via a bus or network interconnect to back-end storage controllers nBE_SAN, and physical disk drives connected via network interconnect to the nBE_SANs to provide a distributed, high performance, policy based or dynamically reconfigurable, centrally managed, data storage acceleration system. The hardware and software architectural solutions eliminate BE_SAN controller bottlenecks and improve performance and scalability. In an embodiment, the nBE_SAN (BE_SAN) firmware recognize controller overload conditions, informs Distributed Resource Manager (DRM), and, based on the DRM provided optimal topology information, delegates part of its workload to additional controllers. The nFE_SAN firmware and additional hardware using functionally independent and redundant CPUs and memory that mitigate single points of failure and accelerates write performance.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: September 5, 2023
    Inventor: Branislav Radovanovic
  • Patent number: 11740817
    Abstract: A system enables entities to access a single platform in order to utilize electronic data storage for storing different types of information. One or more computers may operate an electronic data storage processing network that entities can access when updating information in electronic data storage. The electronic data storage processing network may operate a plurality of electronic data storage processing modules, which can include an aggregator module, a formatter module, an operator signer module, and a validator module. Based on the specific use case for which electronic data storage is utilized, recordable data that is to be added to the electronic data storage can be processed by the appropriate aggregating, formatting, signing, and validating functions provided by the electronic data storage processing modules.
    Type: Grant
    Filed: September 30, 2022
    Date of Patent: August 29, 2023
    Assignee: Visa International Service Association
    Inventor: Quan Wang
  • Patent number: 11740807
    Abstract: Techniques described herein relate to a method for managing data protection services for data clusters. The method includes identifying, by a mapping module of a data protection manager, a first discovery event associated with a first data cluster; in response to identifying the first discovery event: obtaining first data cluster topology information associated with the first data cluster from the first data cluster; obtaining data cluster data protection information from a data cluster data protection information repository; mapping first protection policies to the first data cluster using the first data cluster topology information and the data cluster data protection information; updating data cluster topology information protection policy mappings using the using the first data cluster topology information and the data cluster data protection information; and initiating performance of first data protection services for the first data cluster based on the first mapped protection policies.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: August 29, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Shelesh Chopra, Mohammed Abdul Samad, Krishna TN
  • Patent number: 11733866
    Abstract: Methods and systems for electronic storage are provided. A storage system comprises a plurality of storage system front ends, a plurality of storage system back ends, and a plurality of solid state drive (SSD) agents. Each storage system front end resides on a server of a plurality of servers. Each server of the plurality of servers comprises one or more storage system back ends of the plurality of storage system back ends. Each storage system front end is able to receive I/O requests and relay information associated with the I/O requests to a relevant storage system back end. The relevant storage system back end communicates metadata associated with the I/O request to an SSD via an SSD agent.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: August 22, 2023
    Inventors: Maor Ben Dayan, Liran Zvibel, Omri Palmon
  • Patent number: 11733914
    Abstract: A QLC based data storage device leverages a host memory buffer (HMB) to achieve QLC direct write that increases performance of the QLC data storage device and reducing or eliminating disadvantages associated with a QLC folding approach. In one example, the QLC based data storage device includes a controller configured to receive a request to write data to a non-volatile memory, determine whether the request is a sequential write operation, determine whether a HMB of the data storage device is enabled, determine whether a HMB allocation is successful for a quad-level cell direct write, and responsive to determining that the request is not the sequential write operation, the HMB of the data storage device is enabled, and the HMB allocation is successful for the quad-level cell direct write, perform a direct write operation in a quad-level cell block of the non-volatile memory.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: August 22, 2023
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Raviraj Raju, Sridhar Prudvirag Gunda
  • Patent number: 11734071
    Abstract: A method includes allocating, via a tier allocation component, a first portion of data to a first tier memory component and writing the first portion of data to the first tier memory component in response to a first tier free list having an available entry. The method further includes evicting a second portion of data from the first tier memory component in response to the first tier free list being empty when the first portion of data is allocated to the first tier memory component and writing the first portion of data to the first tier memory component in response to evicting the second portion of data.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: August 22, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Robert M. Walker, Paul Rosenfeld
  • Patent number: 11734169
    Abstract: A system establishes spools that have spool regions in first memory. The system communicates first spool insertions into the spools, and from the spools to the storage devices, to write into a first partition of second memory of the storage devices. The first spool insertions include data and are optimized towards a first spool insertion size. The system communicates second spool insertions into the spools, and from the spools to the storage devices, to write into a second partition of the second memory of the storage devices. The second spool insertions include metadata and are optimized towards a second spool insertion size.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: August 22, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Svitlana Tumanova, Ying Gao, Jintao Shen
  • Patent number: 11726673
    Abstract: Disclosed herein are system, method, and computer program product embodiments for utilizing non-RAM memory to implement a cloud storage system. An embodiment operates by receiving a request from an on-premises computer system to securely access a cloud drive by receiving an object specific template for an object. Based on the object specific template, an object specific plugin is selected, wherein the object specific plugin is configured to provide a connection to a cloud-based repository to obtain real time data for the object. An instance of the object is generated and communicated to a cloud plugin, wherein the cloud plugin is configured to communicate to a specific cloud drive through an HTTP client and further upload the instance of the object to the specific cloud drive.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: August 15, 2023
    Assignee: SAP SE
    Inventors: Rajib Saha, Venkata Ramana Murthy K
  • Patent number: 11726674
    Abstract: A computer-implemented method includes receiving, from a user account, an operation request to perform an operation on data stored at a distributed computing environment. The operation request includes an on-premises token associated with the user account. The method also includes extracting, from the on-premises token, an access scope associated with permissions of the user account for accessing the data stored at the distributed computing environment. The method also includes translating the extracted access scope into query parameters compatible with the data stored at the distributed computing environment. The method also includes determining, using the query parameters, whether the operation request can access the data stored at the distributed computing environment. When the operation request can access the data stored at the distributed computing environment, the method includes executing the operation request.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: August 15, 2023
    Assignee: Google LLC
    Inventors: Xiao Yang, Craig Douglas Voisin, Kalyan Pamarthy
  • Patent number: 11726701
    Abstract: A memory expander includes a memory device that stores a plurality of task data. A controller controls the memory device. The controller receives metadata and a management request from an external central processing unit (CPU) through a compute express link (CXL) interface and operates in a management mode in response to the management request. In the management mode, the controller receives a read request and a first address from an accelerator through the CXL interface and transmits one of the plurality of task data to the accelerator based on the metadata in response to the read request.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: August 15, 2023
    Inventors: Chon Yong Lee, Jae-Gon Lee, Kyunghan Lee
  • Patent number: 11726718
    Abstract: Systems, apparatus, and methods are disclosed comprising receiving temperature information corresponding to a write temperature of at least one of multiple pages of non-volatile memory cells of a group of non-volatile memory cells, determining a statistical measure of temperature information for the group non-volatile memory cells using the received temperature information, and storing the determined statistical measure of temperature information for the group of non-volatile memory cells. The stored determined statistical measure of temperature information can be used to optimize or improve one or more storage system operations.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: August 15, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Giuseppe Cariello
  • Patent number: 11726705
    Abstract: According to one embodiment, in a semiconductor device, a first chip is electrically connected to a terminal to which a signal from a host is input. The first chip is electrically connected to a second chip and to a third chip in parallel with the second chip. The first chip includes a first buffer memory and a second buffer memory. The first buffer memory corresponds to the second chip. The second buffer memory corresponds to the third chip. The second chip includes a third buffer memory. The third chip includes a fourth buffer memory. A capacity of the first buffer memory is equal to or larger than a capacity of the third buffer memory. A capacity of the second buffer memory is equal to or larger than a capacity of the fourth buffer memory.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: August 15, 2023
    Assignee: Kioxia Corporation
    Inventor: Tomoaki Suzuki
  • Patent number: 11726672
    Abstract: Provided is a storage device which communicates with a host device and configured to set a secure mode of a plurality of commands different in kind. An operating method of the storage device includes receiving a secure request indicating a protection of a first command and a protection of a second command of the plurality of commands, from the host device; setting a secure mode of the first and second commands, based on the secure request; receiving a first request indicating a request to execute the first command, from the host device; outputting a first response indicating failure of the first command to the host device, based on the first request; receiving a second request indicating a request to execute the second command, from the host device; and outputting a second response indicating failure of the second command to the host device, based on the second request.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Daejin Jung, Dong-Min Kim, Jeong-Woo Park, Kyoung Back Lee
  • Patent number: 11727966
    Abstract: A memory system includes a memory controller with a plurality N of memory-controller blocks, each of which conveys independent transaction requests over external request ports. The request ports are coupled, via point-to-point connections, to from one to N memory devices, each of which includes N independently addressable memory blocks. All of the external request ports are connected to respective external request ports on the memory device or devices used in a given configuration. The number of request ports per memory device and the data width of each memory device changes with the number of memory devices such that the ratio of the request-access granularity to the data granularity remains constant irrespective of the number of memory devices.
    Type: Grant
    Filed: February 6, 2022
    Date of Patent: August 15, 2023
    Assignee: Rambus Inc.
    Inventors: Richard E. Perego, Frederick A. Ware
  • Patent number: 11726668
    Abstract: Disclosed herein is a device equipped with flash memory, which includes memory in which at least one program is recorded and a processor for executing the program. The memory includes flash memory including a data area and a backup area, and the program divides data into two or more segments depending on whether the data can be stored in a single page and stores the same in the data area. The first segment is stored in a page along with a segment number, indicating the sequential position of the divided data, a segment offset, indicating the number of pages between the pages in which the current segment and the next segment are stored, the size of a data file name, the size of the data, and the file name. At least one additional segment may be stored in another page along with the segment number and segment offset thereof.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: August 15, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong-Sung Jeon, Doo-Ho Choi, Ha-Young Seong, Mi-Kyung Oh, Sang-Jae Lee, Ik-Kyun Kim
  • Patent number: 11720495
    Abstract: In described examples, a coherent memory system includes a central processing unit (CPU) and first and second level caches. The CPU is arranged to execute program instructions to manipulate data in at least a first or second secure context. Each of the first and second caches stores a secure code for indicating the at least first or second secure contexts by which data for a respective cache line is received. The first and second level caches maintain coherency in response to comparing the secure codes of respective lines of cache and executing a cache coherency operation in response.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: August 8, 2023
    Assignee: Texas Instmments Incorporated
    Inventors: Abhijeet Ashok Chachad, David Matthew Thompson, Naveen Bhoria
  • Patent number: 11714750
    Abstract: A storage system with a controller having a persistent memory interface to local memory is provided. The persistent memory can be used to store a logical-to-physical address table. A logical-to-physical address table manager, local to the controller or remote in a secondary controller, can be used to access the logical-to-physical address table. The manager can be configured to improve bandwidth and performance in the storage system.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: August 1, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Daniel Helmick, Richard S. Lucky, Stephen Gold, Ryan R. Jones
  • Patent number: 11714554
    Abstract: The invention discloses an aggregation optimized processing method for time-series data, characterized by comprising the following steps: writing a time-series data record into a database, forming a time-series database file, wherein the time-series database file comprises a data file and an index file, the data file comprises multiple data blocks, the index file comprises index blocks, and each index block correspond to one data block; by scanning an index file according to a start time period and a stop time period, extracting all index blocks of the time series that need to be aggregated that meet the time period conditions, and then sorting the index blocks according to the data block offset recorded in the index block; and by scanning the data file according to a data block offset order recorded in sorted index blocks, performing specified reading and calculating on each data block, and aggregating calculation results.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: August 1, 2023
    Assignee: TAOS DATA
    Inventors: Haojun Liao, Shengliang Guan, Hongze Cheng, Jianhui Tao
  • Patent number: 11714568
    Abstract: An improved information management system is described herein that provides on-demand or live mount access to virtual machine data in a secondary copy format. For example, instead of restoring all of the virtual machine data in the secondary copy format to a virtual disk that is then mounted to a virtual machine, the improved information management system can, in response to request to access virtual machine data in a secondary copy format, create a virtual disk having a universal network component (UNC) path and create a virtual machine configured to access data via the UNC path. Once created and booted, the administrator or user can attempt to access the desired virtual machine data via the virtual machine.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: August 1, 2023
    Assignee: Commvault Systems, Inc.
    Inventors: Satish Chandra Kilaru, Henry Wallace Dornemann, Sagar Mardur Dasharatha, Sandeep Prakash Nashikkar
  • Patent number: 11714558
    Abstract: Systems, apparatuses, and methods related to predictive memory management are described. Error correction operations can be performed on a memory system and can include a latency associated with performing various error correction techniques on data and the health of physical addresses used to store the data can be predicted based on that latency information. In an example, a method can include determining, by a controller, latency information corresponding to one or more error correction operations performed on data received by the controller, and assigning, based on the latency information corresponding to a health of physical address locations corresponding to the data, and taking an action involving the physical address locations based, at least in part, on the information corresponding to the health of the plurality of physical address locations corresponding to the data.
    Type: Grant
    Filed: October 11, 2021
    Date of Patent: August 1, 2023
    Assignee: Mircon Technology, Inc.
    Inventor: Reshmi Basu